Initializing Expansion Adapters Installed in a Computer System Having Similar Expansion Adapters
    11.
    发明申请
    Initializing Expansion Adapters Installed in a Computer System Having Similar Expansion Adapters 失效
    初始化安装在具有类似扩展适配器的计算机系统中的扩展适配器

    公开(公告)号:US20080040525A1

    公开(公告)日:2008-02-14

    申请号:US11463758

    申请日:2006-08-10

    IPC分类号: G06F13/00

    CPC分类号: G06F13/385

    摘要: Methods, apparatus, and products are disclosed for initializing expansion adapters installed in a computer system having similar expansion adapters that include detecting an expansion adapter installed in a computer system having a plurality of expansion adapters, the detected expansion adapter having an option ROM containing initialization code, identifying similar expansion adapters installed in the computer system that correspond to the detected expansion adapter, each of the identified similar expansion adapters having an option ROM containing initialization code, disabling the option ROM of each of the identified similar expansion adapters, and initializing the plurality of expansion adapters installed in the computer system without executing the initialization code of the identified similar expansion adapters.

    摘要翻译: 公开了用于初始化安装在具有类似扩展适配器的计算机系统中的扩展适配器的方法,装置和产品,该扩展适配器包括检测安装在具有多个扩展适配器的计算机系统中的扩展适配器,检测到的扩展适配器具有包含初始化代码 识别安装在与所检测到的扩展适配器对应的计算机系统中的类似扩展适配器,每个识别的类似扩展适配器具有包含初始化代码的选项ROM,禁用每个所标识的类似扩展适配器的选项ROM,以及初始化多个 的扩展适配器安装在计算机系统中,而不执行所识别的类似扩展适配器的初始化代码。

    Updating programmable logic devices in a multi-node system configured for symmetric multiprocessing
    12.
    发明授权
    Updating programmable logic devices in a multi-node system configured for symmetric multiprocessing 有权
    在配置为对称多处理的多节点系统中更新可编程逻辑器件

    公开(公告)号:US08793480B2

    公开(公告)日:2014-07-29

    申请号:US13443329

    申请日:2012-04-10

    摘要: Updating programmable logic devices (‘PLDs’) in a symmetric multiprocessing (‘SMP’) computer, each compute node of the SMP computer including a PLD coupled for data communications through a bus adapter, the bus adapter adapted for data communications through a set of one or more input/output (‘I/O’) memory addresses, including configuring the primary compute node with an update of the configuration instructions for the PLDs; assigning, by the PLDs at boot time in an SMP boot, a unique, separate set of one or more I/O addresses to each bus adapter on each compute node; and providing, by the primary compute node during the SMP boot, the update to all compute nodes, writing the update as a data transfer to each of the PLDs through each bus adapter at the unique, separate set of one or more I/O addresses for each bus adapter.

    摘要翻译: 在对称多处理(“SMP”)计算机中更新可编程逻辑器件(“PLD”),SMP计算机的每个计算节点包括耦合用于通过总线适配器进行数据通信的PLD,总线适配器适于通过一组 一个或多个输入/输出('I / O')存储器地址,包括使用PLD的配置指令的更新配置主计算节点; 在引导时,PLD在SMP引导中为每个计算节点上的每个总线适配器分配独特的一组一个或多个I / O地址; 并且在SMP引导期间由主计算节点向所有计算节点提供更新,通过每个总线适配器以唯一的单独的一个或多个I / O地址集合将更新作为数据传输写入到每个PLD 为每个总线适配器。

    Method for securely merging multiple nodes having trusted platform modules
    13.
    发明授权
    Method for securely merging multiple nodes having trusted platform modules 有权
    用于安全地合并具有可信平台模块的多个节点的方法

    公开(公告)号:US08589672B2

    公开(公告)日:2013-11-19

    申请号:US12270888

    申请日:2008-11-14

    摘要: Method, apparatus and computer program product are provided for operating a plurality of computer nodes while maintaining trust. A primary computer node and at least one secondary computer node are connected into a cluster, wherein each of the clustered computer nodes includes a trusted platform module (TPM) that is accessible to software and includes security status information about the respective computer node. Each clustered computer node is then merged into a single node with only the TPM of the primary computer node being accessible to software. The TPM of the primary computer node is updated to include the security status information of each TPM in the cluster. Preferably, the step of merging is controlled by power on self test (POST) basic input output system (BIOS) code associated with a boot processor in the primary node.

    摘要翻译: 提供了用于操作多个计算机节点同时保持信任的方法,装置和计算机程序产品。 主计算机节点和至少一个辅助计算机节点连接到集群中,其中每个集群计算机节点包括可由软件访问的可信平台模块(TPM),并且包括关于相应计算机节点的安全状态信息。 然后将每个集群计算机节点合并到单个节点,只有主计算机节点的TPM才能被软件访问。 更新主计算机节点的TPM以包括集群中每个TPM的安全状态信息。 优选地,合并步骤由与主节点中的引导处理器相关联的上电自检(POST)基本输入输出系统(BIOS)代码来控制。

    Updating Programmable Logic Devices
    14.
    发明申请
    Updating Programmable Logic Devices 有权
    更新可编程逻辑器件

    公开(公告)号:US20100325404A1

    公开(公告)日:2010-12-23

    申请号:US12486132

    申请日:2009-06-17

    摘要: Updating programmable logic devices (‘PLDs’) in a symmetric multiprocessing (‘SMP’) computer, each compute node of the SMP computer including a PLD coupled for data communications through a bus adapter, the bus adapter adapted for data communications through a set of one or more input/output (‘I/O’) memory addresses, including configuring the primary compute node with an update of the configuration instructions for the PLDs; assigning, by the PLDs at boot time in an SMP boot, a unique, separate set of one or more I/O addresses to each bus adapter on each compute node; and providing, by the primary compute node during the SMP boot, the update to all compute nodes, writing the update as a data transfer to each of the PLDs through each bus adapter at the unique, separate set of one or more I/O addresses for each bus adapter.

    摘要翻译: 在对称多处理(“SMP”)计算机中更新可编程逻辑器件(“PLD”),SMP计算机的每个计算节点包括耦合用于通过总线适配器进行数据通信的PLD,总线适配器适于通过一组 一个或多个输入/输出('I / O')存储器地址,包括使用PLD的配置指令的更新配置主计算节点; 在引导时,PLD在SMP引导中为每个计算节点上的每个总线适配器分配独特的一组一个或多个I / O地址; 并且在SMP引导期间由主计算节点向所有计算节点提供更新,通过每个总线适配器以唯一的单独的一个或多个I / O地址集合将更新作为数据传输写入每个PLD 为每个总线适配器。

    SYSTEM FOR MONITORING AUDIBLE TONES IN A MULTIPLE PLANAR CHASSIS
    15.
    发明申请
    SYSTEM FOR MONITORING AUDIBLE TONES IN A MULTIPLE PLANAR CHASSIS 失效
    用于监视多个平面组织中的可视化音调的系统

    公开(公告)号:US20080219461A1

    公开(公告)日:2008-09-11

    申请号:US12125782

    申请日:2008-05-22

    IPC分类号: H04R29/00

    摘要: Aspects for monitoring audible tones indicative of operational status of each planar in a multiple planar chassis are described. Included in the aspects is the monitoring of a speaker channel of each planar of a plurality of planars in a common chassis for state changes of beep tones. An operational status of a specific planar emitting the beep tones is identified based on the state changes.

    摘要翻译: 描述了用于监视指示多平面机架中每个平面的操作状态的可听音调的方面。 在这些方面中包括在公共机箱中监视多个平面中的每个平面的扬声器通道,以用于蜂鸣音的状态改变。 基于状态变化来识别发出蜂鸣音的特定平面的操作状态。

    System for monitoring audible tones in a multiple planar chassis
    16.
    发明授权
    System for monitoring audible tones in a multiple planar chassis 失效
    用于监视多平面底盘中的声音的系统

    公开(公告)号:US08265285B2

    公开(公告)日:2012-09-11

    申请号:US12125782

    申请日:2008-05-22

    IPC分类号: H04R29/00

    摘要: Aspects for monitoring audible tones indicative of operational status of each planar in a multiple planar chassis are described. Included in the aspects is the monitoring of a speaker channel of each planar of a plurality of planars in a common chassis for state changes of beep tones. An operational status of a specific planar emitting the beep tones is identified based on the state changes.

    摘要翻译: 描述了用于监视指示多平面机架中每个平面的操作状态的可听音调的方面。 在这些方面中包括在公共机箱中监视多个平面中的每个平面的扬声器通道,以用于蜂鸣音的状态改变。 基于状态变化来识别发出蜂鸣音的特定平面的操作状态。

    System For Monitoring Audible Tones In A Multiple Planar Chassis
    17.
    发明申请
    System For Monitoring Audible Tones In A Multiple Planar Chassis 审中-公开
    用于监视多平面机箱中的声音的系统

    公开(公告)号:US20120201392A1

    公开(公告)日:2012-08-09

    申请号:US13450971

    申请日:2012-04-19

    IPC分类号: H04R29/00

    摘要: Aspects for monitoring audible tones indicative of operational status of each planar in a multiple planar chassis are described. Included in the aspects is the monitoring of a speaker channel of each planar of a plurality of planars in a common chassis for state changes of beep tones. An operational status of a specific planar emitting the beep tones is identified based on the state changes.

    摘要翻译: 描述了用于监视指示多平面机架中每个平面的操作状态的可听音调的方面。 在这些方面中包括在公共机箱中监视多个平面中的每个平面的扬声器通道,以用于蜂鸣音的状态改变。 基于状态变化来识别发出蜂鸣音的特定平面的操作状态。

    Expedient preparation of memory for video execution
    19.
    发明授权
    Expedient preparation of memory for video execution 有权
    为视频执行提供便利的内存准备

    公开(公告)号:US08195927B2

    公开(公告)日:2012-06-05

    申请号:US11932849

    申请日:2007-10-31

    CPC分类号: G06F13/4068

    摘要: A computer system that initializes a fraction of the computer system's memory for execution of video during booting of the computer system is provided. The computer system can include a first portion of BIOS code on a ROM device, wherein the first portion includes instructions for initializing the fraction. The computer system further can include a second portion of BIOS code that copies itself to the fraction upon completion of initialization of the fraction, wherein the second portion executes on the fraction and wherein the second portion initializes system memory and initializes a video buffer. The computer system further can include a copy of the second portion located on the ROM device, wherein the copy of the second portion executes until video buffer initialization is completed but before all of the system memory is initialized. Further, the video buffer displays video before all of the computer system's memory is initialized.

    摘要翻译: 提供了一种在计算机系统引导期间初始化计算机系统的存储器的一部分用于执行视频的计算机系统。 计算机系统可以在ROM设备上包括BIOS代码的第一部分,其中第一部分包括用于初始化分数的指令。 计算机系统还可以包括第二部分BIOS代码,其在完成分数初始化时将其自身复制到分数,其中第二部分在分数上执行,其中第二部分初始化系统存储器并初始化视频缓冲器。 计算机系统还可以包括位于ROM设备上的第二部分的副本,其中第二部分的副本执行直到视频缓冲器初始化完成,但是在所有系统存储器被初始化之前。 此外,在所有计算机系统的存储器被初始化之前,视频缓冲器显示视频。

    Structure for initializing expansion adapters installed in a computer system having similar expansion adapters
    20.
    发明授权
    Structure for initializing expansion adapters installed in a computer system having similar expansion adapters 有权
    用于初始化安装在具有类似扩展适配器的计算机系统中的扩展适配器的结构

    公开(公告)号:US07987438B2

    公开(公告)日:2011-07-26

    申请号:US12113469

    申请日:2008-05-01

    IPC分类号: G06F17/50 G06F13/00

    CPC分类号: G06F13/387

    摘要: A design structure embodied in a machine readable storage medium for at designing, manufacturing, and/or testing a design is disclosed for initializing expansion adapters installed in a computer system having similar expansion adapters that include detecting an expansion adapter installed in a computer system having a plurality of expansion adapters, the detected expansion adapter having an option ROM containing initialization code, identifying similar expansion adapters installed in the computer system that correspond to the detected expansion adapter, each of the identified similar expansion adapters having an option ROM containing initialization code, disabling the option ROM of each of the identified similar expansion adapters, and initializing the plurality of expansion adapters installed in the computer system without executing the initialization code of the identified similar expansion adapters.

    摘要翻译: 公开了一种体现在用于设计,制造和/或测试设计的机器可读存储介质中的设计结构,用于初始化安装在具有类似扩展适配器的计算机系统中的扩展适配器,其包括检测安装在具有 多个扩展适配器,检测到的扩展适配器具有包含初始化代码的选项ROM,识别安装在与检测到的扩展适配器对应的计算机系统中的类似扩展适配器,每个识别的类似扩展适配器具有包含初始化代码的选项ROM,禁用 每个所识别的类似扩展适配器的选项ROM,以及初始化安装在计算机系统中的多个扩展适配器,而不执行所识别的类似扩展适配器的初始化代码。