Storage compute appliance with user authentication and memory allocation capabilities

    公开(公告)号:US10909272B2

    公开(公告)日:2021-02-02

    申请号:US15885144

    申请日:2018-01-31

    Abstract: Method and apparatus for managing data in a data storage device configured as a storage compute appliance. In some embodiments, the data storage device has a controller circuit and a non-volatile memory (NVM) with an overall data storage capacity. A processor authenticates each of a plurality of authorized users of the NVM via data exchanges between a host device and the processor without reference to an external authentication authority device. Upon authentication, each authorized user is allocated a separate portion of the overall data storage capacity of the NVM using an allocation model. The size of at least one of the separate portions is subsequently adjusted based on an access history of the NVM. The storage device may be a key-value storage device so that a separate set of key values is provided to each authorized user to identify data blocks stored to and retrieved from the NVM.

    Memory access operation suspend/resume

    公开(公告)号:US10509747B2

    公开(公告)日:2019-12-17

    申请号:US15982210

    申请日:2018-05-17

    Abstract: A memory controller manages memory access operations through a flash memory interface of a memory array of a solid-state storage device connected to a host. The memory controller executes a first memory access operation in the memory array. The first memory access operation has a first priority. The memory controller detects a suspending memory access operation available for execution in the memory array and having a higher priority than the first priority. The detection operation distinguishes between suspending memory access operations and non-suspending memory access operations. The memory controller suspends execution of the first memory access operation in the memory array and executes one or more memory access operations having higher priorities than the first priority and being available for execution in the memory array. The memory controller resumes the execution of the first memory access operation in the memory array.

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