DISPLAY DEVICE
    11.
    发明申请
    DISPLAY DEVICE 审中-公开

    公开(公告)号:US20200183241A1

    公开(公告)日:2020-06-11

    申请号:US16790351

    申请日:2020-02-13

    Inventor: Atsushi HIROSE

    Abstract: To provide a display device in which parasitic capacitance between wirings can be reduced while preventing increase in wiring resistance. To provide a display device with improved display quality. To provide a display device with low power consumption. A pixel of the liquid crystal display device includes a signal line, a scan line intersecting with the signal line, a first electrode projected from the signal line, a second electrode facing the first electrode, and a pixel electrode connected to the second electrode. Part of the scan line has a loop shape, and part of the first electrode is located in a region overlapped with an opening of the scan line. In other words, part of the first electrode is not overlapped with the scan line.

    DISPLAY DEVICE
    13.
    发明申请
    DISPLAY DEVICE 审中-公开

    公开(公告)号:US20180149940A1

    公开(公告)日:2018-05-31

    申请号:US15884440

    申请日:2018-01-31

    Inventor: Atsushi HIROSE

    Abstract: To provide a display device in which parasitic capacitance between wirings can be reduced while preventing increase in wiring resistance. To provide a display device with improved display quality. To provide a display device with low power consumption. A pixel of the liquid crystal display device includes a signal line, a scan line intersecting with the signal line, a first electrode projected from the signal line, a second electrode facing the first electrode, and a pixel electrode connected to the second electrode. Part of the scan line has a loop shape, and part of the first electrode is located in a region overlapped with an opening of the scan line. In other words, part of the first electrode is not overlapped with the scan line.

    SEMICONDUCTOR DEVICE AND OPERATION METHOD THEREOF
    17.
    发明申请
    SEMICONDUCTOR DEVICE AND OPERATION METHOD THEREOF 审中-公开
    半导体器件及其操作方法

    公开(公告)号:US20150263680A1

    公开(公告)日:2015-09-17

    申请号:US14723928

    申请日:2015-05-28

    Inventor: Atsushi HIROSE

    CPC classification number: H03F3/08 H01L31/09 H03F3/082

    Abstract: In a semiconductor device, power consumption is reduced. Further, a standby circuit is formed of a few elements, and thus increase in the circuit area of the semiconductor device is prevented. The standby circuit provided in the semiconductor device is formed of only one transistor and voltage supplied to the transistor is switched, whereby output current of the semiconductor device is controlled. As a result, the output current of the semiconductor device in a standby state can be substantially zero, so that the power consumption can be reduced. By using an oxide semiconductor for a semiconductor layer of a transistor, leakage current can be suppressed as low as possible.

    Abstract translation: 在半导体器件中,功耗降低。 此外,备用电路由几个元件形成,因此防止了半导体器件的电路面积的增加。 设置在半导体器件中的待机电路仅由一个晶体管形成,并且提供给晶体管的电压被切换,从而控制半导体器件的输出电流。 结果,处于待机状态的半导体器件的输出电流可以基本上为零,从而可以降低功耗。 通过使用氧化物半导体用于晶体管的半导体层,可以将泄漏电流抑制得尽可能低。

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