公开(公告)号：US20230325646A1

公开(公告)日：2023-10-12

申请号：US17848381

申请日：2022-06-23

Applicant: Silicon Storage Technology, Inc.

Inventor： Hieu Van Tran ,  THUAN VU ,  STANLEY HONG ,  STEPHEN TRINH ,  STEVEN LEMKE ,  LOUISA SCHNEIDER ,  NHAN DO

IPC: G06N3/063

CPC classification number: G06N3/063

Abstract: Numerous examples are disclosed of an artificial neural network comprising a plurality of reference arrays used for configuration of a vector-by-matrix multiplication array. In one example, a system comprises a vector-by-matrix multiplication array in an artificial neural network; and a plurality of reference arrays characterized by different I-V curves, wherein one or more of the plurality of reference arrays are used to generate input voltage the vector-by-matrix multiplication array during operation.

公开(公告)号：US20210209457A1

公开(公告)日：2021-07-08

申请号：US16830733

申请日：2020-03-26

Applicant: Silicon Storage Technology, Inc.

Inventor： Hieu Van Tran ,  STEVEN LEMKE ,  VIPIN TIWARI ,  NHAN DO ,  MARK REITEN

IPC: G06N3/063 ,  G06F11/16 ,  G11C29/44 ,  G11C13/00

Abstract: Numerous embodiments are provided for compensating for drift error in non-volatile memory cells within a VMM array in an analog neuromorphic memory system. For example, in one embodiment, a circuit is provided for compensating for drift error during a read operation, the circuit comprising a data drift monitoring circuit coupled to the array for generating an output indicative of data drift; and a bitline compensation circuit for generating a compensation current in response to the output from the data drift monitoring circuit and injecting the compensation current into one or more bitlines of the array.

公开(公告)号：US20200335511A1

公开(公告)日：2020-10-22

申请号：US16919697

申请日：2020-07-02

Applicant: Silicon Storage Technology, Inc.

Inventor： HIEU VAN TRAN ,  STEVEN LEMKE ,  VIPIN TIWARI ,  NHAN DO ,  MARK REITEN

IPC: H01L27/11531 ,  G06N3/08 ,  G11C16/04 ,  H01L29/788

Abstract: Numerous embodiments of a precision tuning algorithm and apparatus are disclosed for precisely and quickly depositing the correct amount of charge on the floating gate of a non-volatile memory cell within a vector-by-matrix multiplication (VMM) array in an artificial neural network. Selected cells thereby can be programmed with extreme precision to hold one of N different values.