Solid state image sensing device and method for subsampling using inter-column analog domain signal summation
    11.
    发明申请
    Solid state image sensing device and method for subsampling using inter-column analog domain signal summation 有权
    使用列间模拟域信号求和的固态图像感测装置和子采样方法

    公开(公告)号:US20060203110A1

    公开(公告)日:2006-09-14

    申请号:US11370634

    申请日:2006-03-08

    Applicant: Su-Hun Lim

    Inventor: Su-Hun Lim

    CPC classification number: H04N5/363 H04N5/3575 H04N5/378 H04N9/045

    Abstract: Provided are a solid state image sensing device and method for sub-sampling using inter-column analog domain signal summation, where, in the solid state image sensing device, a CDS unit receives reset signals from neighboring columns of the same color in an APS array, receives video signals from pixels generating the reset signals, and generates modulation signals respectively corresponding to the differences between the reset signals and the video signals, the modulation signals are activated according to activation of the previous modulation signals, and a digital signal output circuit generates a corresponding digital signal based on the final modulation signal corresponding to the sum of inter-column analog video signals among the modulation signals.

    Abstract translation: 提供了一种使用列间模拟域信号求和的子采样的固态图像感测装置和方法,其中在固态图像感测装置中,CDS单元从APS阵列中的相同颜色的相邻列接收复位信号 从产生复位信号的像素接收视频信号,并产生分别对应于复位信号与视频信号之差的调制信号,调制信号根据先前调制信号的激活而被激活,数字信号输出电路产生 基于对应于调制信号之间的列间模拟视频信号之和的最终调制信号的对应的数字信号。

    Sub-sampling with higher display quality in image-sensing device
    12.
    发明授权
    Sub-sampling with higher display quality in image-sensing device 有权
    在图像感测装置中具有较高显示质量的子采样

    公开(公告)号:US07724294B2

    公开(公告)日:2010-05-25

    申请号:US11035007

    申请日:2005-01-12

    CPC classification number: H04N5/374 H04N5/347

    Abstract: An image-sensing device includes a driver and an array of pixels. The driver controls the array of pixels to output a combined image signal that is a combination of at least two image signals for at least two aligned pixels in at least two rows, for reducing vertical resolution in the sub-sampling mode. In addition, a mixing circuit further averages the resulting combined signals for M consecutive odd or even columns for reducing horizontal resolution in the sub-sampling mode.

    Abstract translation: 图像感测装置包括驱动器和像素阵列。 驱动器控制像素阵列以输出组合图像信号,该组合图像信号是用于至少两行中的至少两个对准像素的至少两个图像信号的组合,用于减小子采样模式中的垂直分辨率。 此外,混合电路进一步平均用于M个连续奇数或偶数列的所得到的组合信号,以减小子采样模式中的水平分辨率。

    Driving an image sensor with reduced area and high image quality
    13.
    发明申请
    Driving an image sensor with reduced area and high image quality 有权
    驱动图像传感器,减少面积和高图像质量

    公开(公告)号:US20080001067A1

    公开(公告)日:2008-01-03

    申请号:US11825198

    申请日:2007-07-05

    Abstract: A solid-state image-sensing device includes a pixel array and an averaging unit. The pixel array includes a matrix of pixels and includes a respective output line for each of a plurality of pixel groupings such as for each column of pixels. The averaging unit receives respective signals from first and second output lines of the pixel array to generate a pulse width signal that indicates an average of such respective signals. A respective signal of the first output line is generated from combining photocurrents from a first set of at least two pixels sensing a same first color in the pixel array.

    Abstract translation: 固态图像感测装置包括像素阵列和平均单元。 像素阵列包括像素矩阵,并且包括用于多个像素分组中的每一个的相应输出线,例如针对每列像素。 平均单元从像素阵列的第一和第二输出线接收相应的信号,以产生指示这些各个信号的平均值的脉冲宽度信号。 通过组合来自感测像素阵列中的相同第一颜色的至少两个像素的第一组的光电流来生成第一输出行的相应信号。

    Column analog-to-digital conversion apparatus and method supporting a high frame rate in a sub-sampling mode
    14.
    发明授权
    Column analog-to-digital conversion apparatus and method supporting a high frame rate in a sub-sampling mode 失效
    在子采样模式下支持高帧速率的列模数转换装置和方法

    公开(公告)号:US07230558B2

    公开(公告)日:2007-06-12

    申请号:US11403026

    申请日:2006-04-12

    Applicant: Su-Hun Lim

    Inventor: Su-Hun Lim

    CPC classification number: H04N5/3745 H04N5/3456 H04N5/3458 H04N5/3575

    Abstract: A column analog-to-digital conversion apparatus includes a first correlated double sampling (CDS) and comparison unit of a CDS and comparison circuit for generating a first comparison result signal in response to a first pixel output signal and a ramp signal, a second CDS and comparison unit of the CDS and comparison circuit for generating a second comparison result signal in response to the first pixel output signal and the ramp signal in a sub-sampling mode, and a data buffer for determining a code value of a most significant bit (MSB) based on the second comparison result signal, determining code values of remaining lower bits based on a counting value outputted from a counter, and generating a digital code including the MSB and the remaining lower bits.

    Abstract translation: 列模数转换装置包括CDS和比较电路的第一相关双采样(CDS)和比较单元,用于响应于第一像素输出信号和斜坡信号产生第一比较结果信号,第二CDS 以及CDS和比较电路的比较单元,用于响应于副采样模式中的第一像素输出信号和斜坡信号产生第二比较结果信号;以及数据缓冲器,用于确定最高有效位的代码值( MSB),基于从计数器输出的计数值来确定剩余较低位的代码值,以及生成包括MSB和其余较低位的数字代码。

    Column analog-to-digital converter of a CMOS image sensor for preventing a sun black effect
    15.
    发明申请
    Column analog-to-digital converter of a CMOS image sensor for preventing a sun black effect 有权
    用于防止太阳黑影响的CMOS图像传感器的列模数转换器

    公开(公告)号:US20060170803A1

    公开(公告)日:2006-08-03

    申请号:US11328591

    申请日:2006-01-10

    Applicant: Su-Hun Lim

    Inventor: Su-Hun Lim

    CPC classification number: H04N5/335 H04N5/243 H04N5/3598 H04N5/378

    Abstract: A column analog-to-digital (ADC) circuit for preventing a sun black effect in a CMOS image sensor (CIS) is provided. The ADC circuit includes: a comparator having a signal voltage input port and a reference voltage input port, comparing a reset voltage output from one of a plurality of CIS pixels with a reference voltage in a reset sampling period, and outputting an overflow sensing signal when the reset voltage is lower than the reference voltage; and a digital converter converting the output of the comparator into digital data, wherein the digital converter comprises a first latch storing the overflow sensing signal and outputting a flag signal indicating an overflow in response to the overflow sensing signal in a signal sampling period, when the overflow sensing signal is output from the comparator in a first portion of the reset sampling period.

    Abstract translation: 提供了一种用于防止CMOS图像传感器(CIS)中的日光黑影响的列模数(ADC)电路。 该ADC电路包括:具有信号电压输入端口和参考电压输入端口的比较器,将来自多个CIS像素中的一个输出的复位电压与复位采样周期中的参考电压进行比较,并且当输出溢出检测信号时, 复位电压低于参考电压; 以及将所述比较器的输出转换为数字数据的数字转换器,其中所述数字转换器包括存储所述溢出检测信号的第一锁存器,并且在所述信号采样周期中响应于所述溢出检测信号输出指示溢出的标志信号, 溢出检测信号在复位采样周期的第一部分从比较器输出。

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