利索-全球专利检索

  1. 登录
  2. 注册

搜索结果

24 条记录 (耗时 0.037 秒)

    Thin film transistor array panel for a liquid crystal display
    11.
    发明授权
    Thin film transistor array panel for a liquid crystal display 有权
    用于液晶显示器的薄膜晶体管阵列面板

    公开(公告)号：US06900854B1

    公开(公告)日：2005-05-31

    申请号：US10626617

    申请日：2003-07-25

    申请人： Dong-Gyu Kim ,  Jun-Ho Song ,  Jong-Woong Chang ,  Jae-Ho Choi ,  Byoung-Sun Na ,  Young-Bae Park ,  Sung-Wook Huh

    发明人： Dong-Gyu Kim ,  Jun-Ho Song ,  Jong-Woong Chang ,  Jae-Ho Choi ,  Byoung-Sun Na ,  Young-Bae Park ,  Sung-Wook Huh

    IPC分类号： G02F1/13 ,  G02F1/1343 ,  G02F1/1362 ,  H01L21/77 ,  H01L21/84 ,  H01L29/10 ,  H01L29/12

    CPC分类号： G02F1/134336 ,  G02F1/1362 ,  G02F1/136286 ,  G02F2001/13606 ,  H01L27/124 ,  H01L27/1288 ,  H01L29/12

    摘要： A gate wire including a gate line extending in the horizontal direction, and a gate electrode is formed on an insulating substrate. A gate insulating layer is formed on the gate wire and covers the same. A semiconductor pattern is formed on the gate insulating layer 30, and formed on the semiconductor pattern are a data wire having a date line in the vertical direction, a source electrode, a drain electrode separated from the source electrode opposite the source electrode with respect to the gate electrode, and an align pattern located on both sides of the data line. A passivation layer is formed on the data wire and the align pattern, and has contact holes exposing the drain electrode and an opening exposing the substrate between the data line and the align pattern. Here, the align pattern adjacent to the data line is exposed through the opening, and the semiconductor pattern and the gate insulating layer are under-cut. A pixel electrode connected to the drain electrode through the contact hole is formed on the passivation layer. Here, the opening is located between the data line and the pixel electrode. In this structure, misalignment occurring in the manufacturing process of a thin film transistor panel for a liquid crystal display is minimized, and stitch defects are prevented by uniformity forming a coupling capacitance between the data line and the pixel electrode. Shorts between the data line and the pixel electrode are prevented by forming the opening between the data line and the pixel electrode.

    摘要翻译： 包括在水平方向延伸的栅极线的栅极线和在绝缘基板上形成栅电极。 栅极绝缘层形成在栅极导线上并覆盖其上。 在栅极绝缘层30上形成半导体图案，在半导体图案上形成有在垂直方向上具有日期线的数据线，源电极，与源电极相对的源电极分离的漏电极相对于 栅极电极和位于数据线两侧的对准图案。 在数据线和对准图案上形成钝化层，并且具有暴露漏电极的接触孔和在数据线和对准图案之间暴露衬底的开口。 这里，与数据线相邻的对准图案通过开口露出，并且半导体图案和栅极绝缘层被切割。 通过接触孔连接到漏电极的像素电极形成在钝化层上。 这里，开口位于数据线和像素电极之间。 在这种结构中，在用于液晶显示器的薄膜晶体管面板的制造过程中发生的偏移被最小化，并且通过在数据线和像素电极之间形成耦合电容的均匀性来防止缝合缺陷。 通过在数据线和像素电极之间形成开口来防止数据线与像素电极之间的短路。

    THIN FILM TRANSISTOR ARRAY SUBSTRATE, METHOD FOR MANUFACTURING THE SAME AND SYSTEM FOR INSPECTING THE SUBSTRATE
    14.
    发明申请
    THIN FILM TRANSISTOR ARRAY SUBSTRATE, METHOD FOR MANUFACTURING THE SAME AND SYSTEM FOR INSPECTING THE SUBSTRATE 有权
    薄膜晶体管阵列基板，其制造方法和用于检测基板的系统

    公开(公告)号：US20100044707A1

    公开(公告)日：2010-02-25

    申请号：US12574915

    申请日：2009-10-07

    申请人： Hyang-Shik KONG ,  Sung-Wook Huh ,  Young-Bae Park

    发明人： Hyang-Shik KONG ,  Sung-Wook Huh ,  Young-Bae Park

    IPC分类号： H01L29/786

    CPC分类号： G02F1/1362 ,  G02F1/13458 ,  G02F2001/136254 ,  H01L21/32134 ,  H01L21/32136 ,  H01L27/124 ,  H01L27/1255 ,  H01L27/1288

    摘要： Disclosed is a thin film transistor substrate and a system for inspecting the same. The thin film transistor substrate comprises gate wiring formed on an insulation substrate and including gate lines, and gate electrodes and gate pads connected to the gate lines; a gate insulation layer covering the gate wiring; a semiconductor layer formed over the gate insulation layer; data wiring formed over the gate insulation layer and including data pads; a protection layer covering the data wiring; auxiliary pads connected to the data pads through contact holes formed in the protection layer; and a pad auxiliary layer formed protruding a predetermined height under the data pads. The inspection system for determining whether a thin film transistor substrate is defective, in which the thin film transistor substrate comprises gate wiring including gate lines, gate electrodes and gate pads, and data wiring including source electrodes and drain electrodes, includes a probe pin for contacting the gate pads or data pads and transmitting a corresponding signal, wherein a contact tip at a distal end of the probe pin for contacting the gate pads or the data pads is rounded, and a radius of the rounded contact tip is 2 μm or less, or the rounded contact tip is coated with gold (Au).

    摘要翻译： 公开了一种薄膜晶体管基板及其检查系统。 薄膜晶体管基板包括形成在绝缘基板上并包括栅极线的栅极布线，以及连接到栅极线的栅电极和栅极焊盘; 覆盖栅极布线的栅极绝缘层; 形成在所述栅绝缘层上的半导体层; 数据布线形成在栅极绝缘层上并包括数据焊盘; 覆盖数据线的保护层; 辅助焊盘通过形成在保护层中的接触孔连接到数据焊盘; 以及在数据焊盘下方突出预定高度形成的焊盘辅助层。 用于确定薄膜晶体管基板是否缺陷的检查系统，其中薄膜晶体管基板包括包括栅极线，栅电极和栅极焊盘的栅极布线，以及包括源电极和漏电极的数据布线，包括用于接触的探针 所述栅极焊盘或数据焊盘并传输相应的信号，其中用于接触所述栅极焊盘或所述数据焊盘的所述探针的远端处的接触尖端是圆形的，并且所述圆形接触尖端的半径为2μm或更小， 或圆形接触尖端涂有金（Au）。

    Thin film transistor array panel for liquid crystal display and method of manufacturing the same
    15.
    发明授权
    Thin film transistor array panel for liquid crystal display and method of manufacturing the same 有权
    用于液晶显示器的薄膜晶体管阵列面板及其制造方法

    公开(公告)号：US06798442B1

    公开(公告)日：2004-09-28

    申请号：US09450333

    申请日：1999-11-29

    申请人： Dong-Gyu Kim ,  Jun-Ho Song ,  Jong-Woong Chang ,  Jae-Ho Choi ,  Byoung-Sun Na ,  Young-Bae Park ,  Sung-Wook Huh

    发明人： Dong-Gyu Kim ,  Jun-Ho Song ,  Jong-Woong Chang ,  Jae-Ho Choi ,  Byoung-Sun Na ,  Young-Bae Park ,  Sung-Wook Huh

    IPC分类号： B02F11336

    CPC分类号： G02F1/136286 ,  G02F2001/136295 ,  H01L27/124

    摘要： A gate wire including a gate line extending in the horizontal direction, and a gate electrode is formed on an insulating substrate. A gate insulating layer is formed on the gate wire and covers the same. A semiconductor pattern is formed on the gate insulating layer 30, and formed on the semiconductor pattern are a data wire having a data line in the vertical direction, a source electrode, a drain electrode separated from the source electrode opposite the source electrode with respect to the gate electrode, and an align pattern located on both sides of the data line. A passivation layer is formed on the data wire and the align pattern, and has contact holes exposing the drain electrode and an opening exposing the substrate between the data line and the align pattern. Here, the align pattern adjacent to the data line is exposed through the opening, and the semiconductor pattern and the gate insulating layer are under-cut. A pixel electrode connected to the drain electrode through the contact hole is formed on the passivation layer. Here, the opening is located between the data line and the pixel electrode. In this structure, misalignment occurring in the manufacturing process of a thin film transistor panel for a liquid crystal display is minimized, and stitch defects are prevented by uniformly forming a coupling capacitance between the data line and the pixel electrode. Shorts between the data line and the pixel electrode are prevented by forming the opening between the data line and the pixel electrode.

    摘要翻译： 包括在水平方向延伸的栅极线的栅极线和在绝缘基板上形成栅电极。 栅极绝缘层形成在栅极导线上并覆盖其上。 在栅极绝缘层30上形成半导体图案，在半导体图案上形成有在垂直方向上具有数据线的数据线，源电极，与源极相对的源电极分离的漏电极相对于 栅极电极和位于数据线两侧的对准图案。 在数据线和对准图案上形成钝化层，并且具有暴露漏电极的接触孔和在数据线和对准图案之间暴露衬底的开口。 这里，与数据线相邻的对准图案通过开口露出，并且半导体图案和栅极绝缘层被切割。 通过接触孔连接到漏电极的像素电极形成在钝化层上。 这里，开口位于数据线和像素电极之间。 在这种结构中，在用于液晶显示器的薄膜晶体管面板的制造过程中发生的偏移被最小化，并且通过在数据线和像素电极之间均匀地形成耦合电容来防止缝合缺陷。 通过在数据线和像素电极之间形成开口来防止数据线与像素电极之间的短路。

    Thin film transistor array substrate, method for manufacturing the same and system for inspecting the substrate
    18.
    发明授权
    Thin film transistor array substrate, method for manufacturing the same and system for inspecting the substrate 有权

    公开(公告)号：US07626203B2

    公开(公告)日：2009-12-01

    申请号：US11668345

    申请日：2007-01-29

    申请人： Hyang-Shik Kong ,  Sung-Wook Huh ,  Young-Bae Park

    发明人： Hyang-Shik Kong ,  Sung-Wook Huh ,  Young-Bae Park

    IPC分类号： H01L29/76 ,  H01L21/00 ,  H01L29/04

    CPC分类号： G02F1/1362 ,  G02F1/13458 ,  G02F2001/136254 ,  H01L21/32134 ,  H01L21/32136 ,  H01L27/124 ,  H01L27/1255 ,  H01L27/1288

    摘要： Disclosed is a thin film transistor substrate and a system for inspecting the same. The thin film transistor substrate comprises gate wiring formed on an insulation substrate and including gate lines, and gate electrodes and gate pads connected to the gate lines; a gate insulation layer covering the gate wiring; a semiconductor layer formed over the gate insulation layer; data wiring formed over the gate insulation layer and including data pads; a protection layer covering the data wiring; auxiliary pads connected to the data pads through contact holes formed in the protection layer; and a pad auxiliary layer formed protruding a predetermined height under the data pads. The inspection system for determining whether a thin film transistor substrate is defective, in which the thin film transistor substrate comprises gate wiring including gate lines, gate electrodes and gate pads, and data wiring including source electrodes and drain electrodes, includes a probe pin for contacting the gate pads or data pads and transmitting a corresponding signal, wherein a contact tip at a distal end of the probe pin for contacting the gate pads or the data pads is rounded, and a radius of the rounded contact tip is 2 μm or less, or the rounded contact tip is coated with gold (Au).