公开(公告)号：US5007152A

公开(公告)日：1991-04-16

申请号：US435210

申请日：1989-11-09

Applicant: Atsushi Tomizawa ,  Susumu Inoue ,  Takeshi Masui

Inventor： Atsushi Tomizawa ,  Susumu Inoue ,  Takeshi Masui

IPC: B21B27/05

CPC classification number: B21B27/05

Abstract: A variable-crown roll is disclosed, which comprises a curved arbor, and a plurality of antifriction bearings which are mounted on said arbor, said bearings being asymmetrically disposed with respect to the lengthwise center of said arbor, and bearings on one side of the lengthwise center of said arbor being symmetric with respect to said bearings on the other side of the lengthwise center.

公开(公告)号：US4485143A

公开(公告)日：1984-11-27

申请号：US390135

申请日：1982-06-18

Applicant: Susumu Inoue ,  Isao Sakashita ,  Kazunori Meguro ,  Kunio Hamaguchi

Inventor： Susumu Inoue ,  Isao Sakashita ,  Kazunori Meguro ,  Kunio Hamaguchi

IPC: C04B41/50 ,  C04B41/87 ,  B32B15/00

CPC classification number: C04B41/009 ,  C04B41/5062 ,  C04B41/87 ,  Y10T428/263

Abstract: A silicon carbide material for low-melting point fusion metal composed of recrystallization silicon carbide or silicon nitride coupled silicon carbide and containing free silicon and silicon oxide in a total amount of 5% by weight or below. More preferably, the silicon carbide material is formed on the surface with a film of vapor phase growth silicon carbide or silicon nitride, and on this film or in place of this film silicon nitride and/or boron nitride is coated.

Abstract translation: 一种用于低熔点熔融金属的碳化硅材料，由重结晶碳化硅或氮化硅结合碳化硅组成，并含有总量为5重量％或更低的游离硅和氧化硅。 更优选地，碳化硅材料在气相生长碳化硅或氮化硅的膜的表面上形成，并且在该膜上或代替该膜，氮化硅和/或氮化硼被涂覆。

公开(公告)号：USD677719S1

公开(公告)日：2013-03-12

申请号：US29407240

申请日：2011-11-25

Applicant: Susumu Inoue ,  Emi Akahane ,  Wataru Suzuki ,  Tomoko Iwasaki ,  Takayuki Iijima ,  Seiya Hayashi ,  Mayu Arai

Designer： Susumu Inoue ,  Emi Akahane ,  Wataru Suzuki ,  Tomoko Iwasaki ,  Takayuki Iijima ,  Seiya Hayashi ,  Mayu Arai

公开(公告)号：US07667249B2

公开(公告)日：2010-02-23

申请号：US11977333

申请日：2007-10-24

Applicant: Susumu Inoue ,  Yo Takeda ,  Yutaka Maruo

Inventor： Susumu Inoue ,  Yo Takeda ,  Yutaka Maruo

IPC: H01L31/062 ,  H01L31/113 ,  H01L29/06 ,  H01L31/072 ,  H01L31/0328

CPC classification number: H01L31/02164 ,  H01L27/0207 ,  H01L27/105 ,  H01L27/11519 ,  H01L27/11521 ,  H01L27/11558 ,  H01L27/14623 ,  H01L29/66825 ,  H01L29/788

Abstract: A semiconductor device includes: a semiconductor element provided on a semiconductor layer; a light-blocking wall provided around the semiconductor element; and a wiring layer electrically coupled to the semiconductor element and extended from an aperture not having the light-blocking wall to an outside of the light-blocking wall; wherein the wiring layer has a pattern containing a first section positioned in the aperture and a second section which has a width not narrower than a width of the aperture by providing a branched portion intersecting with an extension direction of the wiring layer; and wherein a surface of the branched portion facing outside of the light-blocking wall includes thereon a convex part.

Abstract translation: 半导体器件包括：设置在半导体层上的半导体元件; 设置在半导体元件周围的遮光壁; 以及布线层，其电耦合到所述半导体元件并且从不具有所述遮光壁的孔延伸到所述遮光壁的外部; 其中所述布线层具有包含定位在所述孔中的第一部分的图案和通过提供与所述布线层的延伸方向相交的分支部分而具有不窄于所述孔宽度的宽度的第二部分; 并且其中所述分支部分的面向所述遮光壁外侧的表面包括凸起部分。

公开(公告)号：US20090147101A1

公开(公告)日：2009-06-11

申请号：US12292338

申请日：2008-11-17

Applicant: Keiji Tatani ,  John Rennie ,  Susumu Inoue ,  Atsushi Toda

Inventor： Keiji Tatani ,  John Rennie ,  Susumu Inoue ,  Atsushi Toda

IPC: H04N9/73

CPC classification number: H04N9/045 ,  H01L27/14621 ,  H01L27/14627

Abstract: A solid-state imaging device is provided. The solid-state imaging device includes a plurality of arrayed pixels, an optical inner filter layer, and an inner-layer lens. Each of the plurality of arrayed pixels includes a photoelectric conversion portion and a pixel transistor. The optical inner filter layer is configured to block infrared light and faces a light-receiving surface of the photoelectric conversion portion of a desired pixel among the arrayed pixels. The inner-layer lens is formed below the optical inner filter layer.

Abstract translation: 提供固态成像装置。 固态成像装置包括多个阵列像素，光学内部滤光器层和内部透镜。 多个排列像素中的每一个包括光电转换部分和像素晶体管。 光学内部滤波器层被配置为阻挡红外光并且面对阵列像素之中所需像素的光电转换部分的光接收表面。 内层透镜形成在光学内滤光层的下方。

公开(公告)号：US07538117B2

公开(公告)日：2009-05-26

申请号：US11378307

申请日：2006-03-20

Applicant: Hitoshi Harada ,  Hiroyuki Chiba ,  Yuki Komatsu ,  Susumu Inoue ,  Naoki Ozeki

Inventor： Hitoshi Harada ,  Hiroyuki Chiba ,  Yuki Komatsu ,  Susumu Inoue ,  Naoki Ozeki

IPC: A01N43/54 ,  A61K31/505

CPC classification number: C07D405/14 ,  C07D405/06

Abstract: Crystals of 5-[2-amino-4-(2-furyl)pyrimidin-5-yl]-1-methylpyridin-2(1H)-one having a diffraction peak at a diffraction angle (2θ±0.2°) of 9.7° and/or 21.9° in a powder X-ray diffraction are suitable for an active ingredient of a preventing and therapeutic agent for diseases such as constipation. Crystals of 5-[2-amino-4-(2-furyl)pyrimidin-5-yl]-1-methylpyridin-2(1H)-one hydrate and amorphous 5-[2-amino-4-(2-furyl)pyrimidin-5-yl]-1-methylpyridin-2(1H)-one hydrate are also suitable for an active ingredient of a preventing and therapeutic agent for diseases such as constipation.

Abstract translation: 在衍射角（2θ±0.2°）为9.7°的衍射峰的5- [2-氨基-4-（2-呋喃基）嘧啶-5-基] -1-甲基吡啶-2（1H） - 酮的晶体 和/或21.9°在粉末X射线衍射中适用于诸如便秘的疾病的预防和治疗剂的活性成分。 5- [2-氨基-4-（2-呋喃基）嘧啶-5-基] -1-甲基吡啶-2（1H） - 酮水合物和无定形的5- [2-氨基-4-（2-呋喃基） 嘧啶-5-基] -1-甲基吡啶-2（1H） - 酮水合物也适用于诸如便秘等疾病的预防和治疗剂的活性成分。

公开(公告)号：US20080067564A1

公开(公告)日：2008-03-20

申请号：US11977333

申请日：2007-10-24

Applicant: Susumu Inoue ,  Yo Takeda ,  Yutaka Maruo

Inventor： Susumu Inoue ,  Yo Takeda ,  Yutaka Maruo

IPC: H01L31/113

CPC classification number: H01L31/02164 ,  H01L27/0207 ,  H01L27/105 ,  H01L27/11519 ,  H01L27/11521 ,  H01L27/11558 ,  H01L27/14623 ,  H01L29/66825 ,  H01L29/788

Abstract: A semiconductor device includes: a semiconductor element provided on a semiconductor layer; a light-blocking wall provided around the semiconductor element; and a wiring layer electrically coupled to the semiconductor element and extended from an aperture not having the light-blocking wall to an outside of the light-blocking wall; wherein the wiring layer has a pattern containing a first section positioned in the aperture and a second section which has a width not narrower than a width of the aperture by providing a branched portion intersecting with an extension direction of the wiring layer; and wherein a surface of the branched portion facing outside of the light-blocking wall includes thereon a convex part.

Abstract translation: 半导体器件包括：设置在半导体层上的半导体元件; 设置在半导体元件周围的遮光壁; 以及布线层，其电耦合到所述半导体元件并且从不具有所述遮光壁的孔延伸到所述遮光壁的外部; 其中所述布线层具有包含定位在所述孔中的第一部分的图案和通过提供与所述布线层的延伸方向相交的分支部分而具有不窄于所述孔宽度的宽度的第二部分; 并且其中所述分支部分的面向所述遮光壁外侧的表面包括凸起部分。

公开(公告)号：US20070078151A1

公开(公告)日：2007-04-05

申请号：US11378307

申请日：2006-03-20

Applicant: Hitoshi Harada ,  Hiroshi Ishihara ,  Yoshiaki Sato ,  Hiroyuki Chiba ,  Yuki Komatsu ,  Susumu Inoue ,  Naoki Ozeki

Inventor： Hitoshi Harada ,  Hiroshi Ishihara ,  Yoshiaki Sato ,  Hiroyuki Chiba ,  Yuki Komatsu ,  Susumu Inoue ,  Naoki Ozeki

IPC: A61K31/506 ,  C07D405/14

CPC classification number: C07D405/14 ,  C07D405/06

Abstract: Crystals of 5-[2-amino-4-(2-furyl)pyrimidin-5-yl]-1-methylpyridin-2(1H)-one having a diffraction peak at a diffraction angle (2θ±0.2°) of 9.7° and/or 21.9° in a powder X-ray diffraction are suitable for an active ingredient of a preventing and therapeutic agent for diseases such as constipation. Crystals of 5-[2-amino-4-(2-furyl)pyrimidin-5-yl]-1-methylpyridin-2(1H)-one hydrate and amorphous 5-[2-amino-4-(2-furyl)pyrimidin-5-yl]-1-methylpyridin-2(1H)-one hydrate are also suitable for an active ingredient of a preventing and therapeutic agent for diseases such as constipation.

Abstract translation: 在衍射角（2θ±0.2°）为9.7°的衍射峰的5- [2-氨基-4-（2-呋喃基）嘧啶-5-基] -1-甲基吡啶-2（1H） - 酮的晶体 和/或21.9°在粉末X射线衍射中适用于诸如便秘的疾病的预防和治疗剂的活性成分。 5- [2-氨基-4-（2-呋喃基）嘧啶-5-基] -1-甲基吡啶-2（1H） - 酮水合物和无定形的5- [2-氨基-4-（2-呋喃基） 嘧啶-5-基] -1-甲基吡啶-2（1H） - 酮水合物也适用于诸如便秘等疾病的预防和治疗剂的活性成分。

公开(公告)号：US07126175B2

公开(公告)日：2006-10-24

申请号：US11288458

申请日：2005-11-29

Applicant: Susumu Inoue ,  Yo Takeda ,  Yutaka Maruo

Inventor： Susumu Inoue ,  Yo Takeda ,  Yutaka Maruo

IPC: H01L31/062 ,  H01L31/113

CPC classification number: H01L23/552 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A semiconductor device comprising: a first light shielded region including a first semiconductor element, the first light shielded region being defined by a first light shielding wall provided in the periphery thereof; a second light shielded region including a second semiconductor element, the second light shielded region being defined by a second light shielding wall provided in the periphery thereof and being provided in a position adjacent to the first light shielded region; a first opening provided in the first light shielding wall; a second opening provided in the second light shielding wall and positioned facing to the first opening; a first wiring layer coupled with the first semiconductor element and brought out to the outside of the first light shielded region from the first opening; a second wiring layer coupled with the second semiconductor element and brought out to the outside of the second light shielded region from the second opening; and a light shielding film provided at least above a region sandwiched between the first light shielded region and the second light shielded region.

Abstract translation: 一种半导体器件，包括：包括第一半导体元件的第一遮光区域，所述第一遮光区域由设置在其周边的第一遮光壁限定; 第二遮光区域，包括第二半导体元件，所述第二遮光区域由设置在其周边的第二遮光壁限定，并且设置在与所述第一遮光区域相邻的位置; 设置在第一遮光壁上的第一开口; 第二开口，设置在所述第二遮光壁上并且面向所述第一开口定位; 与所述第一半导体元件耦合并从所述第一开口导出到所述第一遮光区域的外部的第一布线层; 与所述第二半导体元件耦合并从所述第二开口导出到所述第二遮光区域的外部的第二布线层; 以及设置在夹在第一遮光区域和第二遮光区域之间的区域的至少上方的遮光膜。

公开(公告)号：US07031194B2

公开(公告)日：2006-04-18

申请号：US10915363

申请日：2004-08-11

Applicant: Susumu Inoue

Inventor： Susumu Inoue

IPC: G11C16/06

CPC classification number: G11C16/08 ,  G11C8/08 ,  G11C16/0466

Abstract: A nonvolatile semiconductor memory that reduces disturbing voltage to a non-selected memory cell during a write operation. The nonvolatile semiconductor memory according to exemplary embodiments of the present invention include a memory cell array, a word line control circuit, and a line control circuit. The memory cell array includes a plurality of memory cells provided in matrix form, a plurality of word lines, a plurality of bit lines, and a plurality of source lines. The word line control circuit controls the plurality of word lines. The line control circuit controls the plurality of bit lines and the plurality of source lines. Each of the memory cells includes a gate electrode coupled to the word lines, a first impurity region, a second impurity region, and an electron trap region provided in between the gate electrode and a substrate. The electron trap region is provided at least on the first impurity region side of the first impurity region side and the second impurity region side. During a write operation in a selected memory cell, the word line control circuit supplies a selection voltage to a selected word line coupled to the selected memory cell, and also supplies an erase-error preventing voltage to a non-selected word line.

Abstract translation: 一种非易失性半导体存储器，其在写入操作期间减少对未选择的存储器单元的干扰电压。 根据本发明的示例性实施例的非易失性半导体存储器包括存储单元阵列，字线控制电路和线路控制电路。 存储单元阵列包括以矩阵形式提供的多个存储单元，多个字线，多个位线和多条源极线。 字线控制电路控制多个字线。 线路控制电路控制多条位线和多条源极线。 每个存储单元包括耦合到字线的栅电极，设置在栅电极和衬底之间的第一杂质区，第二杂质区和电子陷阱区。 至少在第一杂质区侧和第二杂质区侧的第一杂质区侧设置电子捕获区。 在所选择的存储单元中的写入操作期间，字线控制电路将选择电压提供给与所选存储单元耦合的选定字线，并且还向未选择的字线提供擦除错误防止电压。