公开(公告)号：US20230317373A1

公开(公告)日：2023-10-05

申请号：US18189126

申请日：2023-03-23

Applicant: TAIYO YUDEN CO., LTD.

Inventor： Riki SUEMASA ,  Hidetoshi MASUDA

IPC: H01G4/008 ,  H01G4/30

CPC classification number: H01G4/0085 ,  H01G4/30

Abstract: A ceramic electronic device includes a multilayer chip in which each of a plurality of dielectric layers and each of a plurality of internal electrode layers are alternately stacked. There are a concentration peak of a first metal and a concentration peak of a second metal at different positions in a stacking direction of the plurality of internal electrode layers and the plurality of dielectric layers between a dielectric layer and an internal electrode layer next to the dielectric layer, the first metal and the second metal being different from a main component metal of the plurality of internal electrode layers. The second metal is easier to ionize than the first metal. The concentration peak of the second metal is closer to the dielectric layer than the concentration peak of the first metal.

公开(公告)号：US20140226257A1

公开(公告)日：2014-08-14

申请号：US14164747

申请日：2014-01-27

Applicant: TAIYO YUDEN CO., LTD.

Inventor： Yoshinari TAKE ,  Hidetoshi MASUDA

IPC: H01G4/005

CPC classification number: H01G4/302 ,  H01G4/012 ,  H01G4/1209

Abstract: A capacitor according to the present invention includes a dielectric layer, a first external electrode layer, a second external electrode layer, a first internal electrode, and a second internal electrode. The dielectric layer is formed of a metal oxide having a crystalline structure and includes a first surface, a second surface on the opposite side to the first surface, and a plurality of through holes communicating with the first surface and the second surface. The first external electrode layer is disposed on the first surface. The second external electrode layer is disposed on the second surface. The first internal electrode is formed in through holes, and is connected to the first external electrode layer. The second internal electrode is formed in the through holes, and is connected to the second external electrode layer.

Abstract translation: 根据本发明的电容器包括电介质层，第一外部电极层，第二外部电极层，第一内部电极和第二内部电极。 电介质层由具有晶体结构的金属氧化物形成，包括第一表面，与第一表面相反的一侧的第二表面，以及与第一表面和第二表面连通的多个通孔。 第一外部电极层设置在第一表面上。 第二外部电极层设置在第二表面上。 第一内部电极形成为通孔，并与第一外部电极层连接。 第二内部电极形成在通孔中，并且连接到第二外部电极层。

公开(公告)号：US20140009866A1

公开(公告)日：2014-01-09

申请号：US13933706

申请日：2013-07-02

Applicant: Taiyo Yuden Co., Ltd.

Inventor： Hidetoshi MASUDA ,  Shinya MASUNO ,  Yoshinari TAKE

IPC: H01G4/005

CPC classification number: H01G4/005 ,  H01G4/10 ,  H01G4/232 ,  H01G4/302 ,  H01G9/045 ,  H01G9/048 ,  H01G9/07

Abstract: There is provided a capacitor including a dielectric layer having a first plane, a second plane opposite to the first plane, and a plurality of through-holes communicated with the first plane and the second plane; a first external conductor layer disposed on a part of the first plane; a second external conductor layer disposed on the second plane; a third external conductor layer disposed on another part of the first plane; a first internal conductor housed in a part of a plurality of the through-holes and connected to the first external conductor layer; a second internal conductor housed in another part of a plurality of the through-holes and connected to the second external conductor layer; and a third internal conductor housed in the other part of a plurality of the through-holes and connected to the second external conductor layer and the third external conductor layer.

Abstract translation: 提供一种电容器，包括具有第一平面的电介质层，与第一平面相对的第二平面，以及与第一平面和第二平面连通的多个通孔; 设置在所述第一平面的一部分上的第一外部导体层; 设置在第二平面上的第二外部导体层; 设置在第一平面的另一部分上的第三外部导体层; 容纳在多个通孔的一部分中并连接到第一外部导体层的第一内部导体; 第二内部导体，其容纳在多个所述通孔的另一部分中并连接到所述第二外部导体层; 以及容纳在多个通孔的另一部分中并连接到第二外部导体层和第三外部导体层的第三内部导体。

公开(公告)号：US20130329337A1

公开(公告)日：2013-12-12

申请号：US13910314

申请日：2013-06-05

Applicant: Taiyo Yuden Co., Ltd.

Inventor： Hidetoshi MASUDA ,  Yoshinari TAKE

IPC: H01G4/005

CPC classification number: H01G4/005 ,  H01G4/012 ,  H01G4/232 ,  H01G4/302 ,  H01G9/012 ,  H01G9/045 ,  H01G9/048

Abstract: A capacitor includes a dielectric layer, a first external electrode layer, a second external electrode layer, a first internal electrode portion, a second internal electrode portion, and a close contact portion. The first internal electrode portion is provided on a first through-hole portion, one end of the first internal electrode portion being connected to the first external electrode layer. The second internal electrode portion is provided on a second through-hole portion, one end of the second internal electrode portion being connected to the second external electrode layer. The close contact portion brings at least any one of the first external electrode layer and the second external electrode layer into close contact with the dielectric layer, the close contact portion being provided on a third through-hole portion.

Abstract translation: 电容器包括电介质层，第一外部电极层，第二外部电极层，第一内部电极部分，第二内部电极部分和紧密接触部分。 第一内部电极部分设置在第一通孔部分上，第一内部电极部分的一端连接到第一外部电极层。 第二内部电极部分设置在第二通孔部分上，第二内部电极部分的一端连接到第二外部电极层。 紧密接触部分使第一外部电极层和第二外部电极层中的至少一个与电介质层紧密接触，紧密接触部分设置在第三通孔部分上。

公开(公告)号：US20250111996A1

公开(公告)日：2025-04-03

申请号：US18980465

申请日：2024-12-13

Applicant: TAIYO YUDEN CO., LTD.

Inventor： Hidetoshi MASUDA

IPC: H01G4/30 ,  C04B35/468 ,  C04B35/64 ,  H01G4/008 ,  H01G4/012 ,  H01G4/12

Abstract: A ceramic electronic device includes a multilayer structure in which each of a plurality of dielectric layers of which a main component is ceramic and each of three or more of internal electrode layers are alternately stacked. The three or more of internal electrode layers include Ni and Sn, wherein Sn is distributed entirely in the three or more of internal electrode layers. An internal electrode layer having a larger Sn concentration is closer to an outermost edge in a stacking direction than an internal electrode layer having a smaller Sn concentration and being located on a center side of the stacking direction, in a relationship of at least two of the three or more of internal electrode layers.

公开(公告)号：US20240249888A1

公开(公告)日：2024-07-25

申请号：US18593625

申请日：2024-03-01

Applicant: TAIYO YUDEN CO., LTD.

Inventor： Hidetoshi MASUDA

IPC: H01G4/30 ,  C04B35/468 ,  C04B35/64 ,  H01G4/008 ,  H01G4/012 ,  H01G4/12

CPC classification number: H01G4/30 ,  C04B35/4682 ,  C04B35/64 ,  H01G4/008 ,  H01G4/012 ,  H01G4/1218

Abstract: A ceramic electronic device includes a multilayer structure in which each of a plurality of dielectric layers of which a main component is ceramic and each of a plurality of internal electrode layers are alternately stacked. The plurality of internal electrode layers include Ni and Sn. Each of an upper section and a lower section of the plurality of internal electrode layers includes multiple internal electrode layers each having a Sn concentration higher than that of each internal electrode layer of a center section interposed between the upper and lower sections in a stacking direction, which are constituted by top 5% or more and bottom 5% or more of the plurality of internal electrode layers, respectively.

公开(公告)号：US20230326680A1

公开(公告)日：2023-10-12

申请号：US18327805

申请日：2023-06-01

Applicant: TAIYO YUDEN CO., LTD.

Inventor： Kazuki YAMADA ,  Kotaro MIZUNO ,  Yoichi KATO ,  Hidetoshi MASUDA

IPC: H01G4/30 ,  H01G4/008 ,  H01G4/12 ,  C04B35/468 ,  H01G4/012

CPC classification number: H01G4/30 ,  H01G4/008 ,  H01G4/1218 ,  C04B35/4682 ,  H01G4/012 ,  C04B2235/65

Abstract: A manufacturing method of a multilayer ceramic electronic device includes: forming each of stack units by forming each of internal electrode patterns on each of dielectric green sheets, the each of internal electrode patterns including Ni, Sn and Au; forming a multilayer structure by stacking the each of stack units; and firing the multilayer structure, whereby each internal electrode layer is formed from the each of internal electrode patterns and each dielectric layer is formed from the each of the dielectric green sheets wherein, in the each internal electrode layer, an Au concentration near each interface between the each internal electrode layer and the each dielectric layer is larger than an Au concentration in each center portion in a thickness direction.

公开(公告)号：US20230298820A1

公开(公告)日：2023-09-21

申请号：US18180036

申请日：2023-03-07

Applicant: TAIYO YUDEN CO., LTD.

Inventor： Hidetoshi MASUDA

IPC: H01G4/12 ,  H01G4/008 ,  H01G4/30

CPC classification number: H01G4/1227 ,  H01G4/008 ,  H01G4/30

Abstract: A ceramic electronic device includes a multilayer chip in which dielectric layers and internal electrode layers are alternately stacked. The internal electrode layers include a main component element and a sub-element. The dielectric layers include a plurality of crystal grains. A segregation portion, in which the sub-element is segregated in shell portions and a grain boundary of the plurality of crystal grains and a sub-element concentration is 1.5 times or more as that in an entire of each of the dielectric layers, is formed. near an interface between each of the internal electrode layers and each of the dielectric layers, each of the internal electrode layers has a high concentration layer, in which the sub-element concentration is 1.5 times or more as that in an entire of each of the internal electrode layers.

公开(公告)号：US20220139630A1

公开(公告)日：2022-05-05

申请号：US17372401

申请日：2021-07-09

Applicant: TAIYO YUDEN CO., LTD.

Inventor： Kazuki YAMADA ,  Kotaro MIZUNO ,  Yoichi KATO ,  Hidetoshi MASUDA

IPC: H01G4/30 ,  H01G4/008 ,  H01G4/012 ,  H01G4/12 ,  C04B35/468

Abstract: A ceramic electronic device includes a multilayer chip in which a plurality of dielectric layers of which a main component is ceramic and a plurality of internal electrode layers are stacked. The plurality of internal electrode layers include Ni, Sn and Au.

公开(公告)号：US20160233026A1

公开(公告)日：2016-08-11

申请号：US15023001

申请日：2015-03-16

Applicant: TAIYO YUDEN CO., LTD.

Inventor： Hidetoshi MASUDA

IPC: H01G4/10 ,  H01G4/228

CPC classification number: H01G4/10 ,  H01G4/012 ,  H01G4/232 ,  H01G4/248 ,  H01G4/302

Abstract: A capacitor includes a dielectric layer, through-holes, a first external electrode layer, a second external electrode layer, first internal electrodes, and second internal electrodes. The dielectric layer is formed by anodic oxidation of metal. The through-holes are a plurality of through-holes that communicate with a first surface of the dielectric layer and a second surface that is the opposite side of the first surface.

Abstract translation: 电容器包括电介质层，通孔，第一外部电极层，第二外部电极层，第一内部电极和第二内部电极。 介电层由金属的阳极氧化形成。 通孔是与电介质层的第一表面连通的多个通孔和与第一表面相对的第二表面。