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    Isolation Circuits for Digital Communications and Methods to Provide Isolation for Digital Communications
    16.
    发明申请
    Isolation Circuits for Digital Communications and Methods to Provide Isolation for Digital Communications 审中-公开
    数字通信隔离电路和数字通信隔离方法

    公开(公告)号：US20160277048A1

    公开(公告)日：2016-09-22

    申请号：US15166426

    申请日：2016-05-27

    Applicant: TEXAS INSTRUMENTS INCORPORATED

    Inventor： Bradley Allen Kramer ,  Mark W. Morgan ,  Swaminathan Sankaran

    IPC: H04B1/04 ,  H04L25/49

    CPC classification number: H04B1/0475 ,  H01L2224/48091 ,  H03F1/02 ,  H03F3/24 ,  H04B2001/0408 ,  H04B2001/045 ,  H04L25/0266 ,  H04L25/069 ,  H04L25/49 ,  H01L2924/00014

    Abstract: Isolation circuits for digital communications and methods to provide isolation for digital communications are disclosed. An example isolation circuit includes an isolation barrier, a burst encoder in a first circuit, and an edge pattern detector in a second circuit. The example isolation barrier electrically isolates the first circuit from the second circuit. The example burst encoder generates a first pattern in response to receiving a rising edge on an input signal and generates a second pattern in response to receiving a falling edge on the input signal. The example edge pattern detector detects the first pattern or the second pattern received from the burst encoder via the isolation barrier, sets an output signal at a first signal level in response to detecting the first pattern, and sets the output signal at a second signal level in response to detecting the second pattern.

    Abstract translation: 公开了用于数字通信的隔离电路和用于提供用于数字通信的隔离的方法。 示例性隔离电路包括隔离栅，第一电路中的突发编码器和第二电路中的边缘图案检测器。 示例性隔离屏障将第一电路与第二电路电隔离。 响应于在输入信号上接收上升沿，示例性突发编码器产生第一模式，并且响应于在输入信号上接收到下降沿而产生第二模式。 示例性边缘模式检测器经由隔离屏障检测从脉冲串编码器接收的第一模式或第二模式，响应于检测到第一模式而将输出信号设置在第一信号电平，并将输出信号设置在第二信号电平 响应于检测到第二图案。

    METHOD AND CIRCUITRY FOR MULTI-STAGE AMPLIFICATION
    17.
    发明申请
    METHOD AND CIRCUITRY FOR MULTI-STAGE AMPLIFICATION 有权
    用于多级放大的方法和电路

    公开(公告)号：US20150091642A1

    公开(公告)日：2015-04-02

    申请号：US14066980

    申请日：2013-10-30

    Applicant: Texas Instruments Incorporated

    Inventor： Swaminathan Sankaran ,  Bradley Allen Kramer ,  Hassan Ali ,  Nirmal C. Warke

    IPC: H03F1/00

    CPC classification number: H03F3/45 ,  H03F1/00 ,  H03F1/42 ,  H03F3/45475 ,  H03F2200/36 ,  H03F2200/411 ,  H03F2200/537

    Abstract: In an amplifier, a first stage receives a differential input voltage, which is formed by first and second input voltages, and outputs a first differential current in response thereto on first and second lines having respective first and second line voltages. A second stage receives the first and second line voltages and outputs a second differential current in response thereto on third and fourth lines having respective third and fourth line voltages. A transformer includes first and second coils. A first terminal of the first coil is coupled through a first resistor to the first line. A second terminal of the first coil is coupled through a second resistor to the second line. A first terminal of the second coil is coupled through a third resistor to the third line. A second terminal of the second coil is coupled through a fourth resistor to the fourth line.

    Abstract translation: 在放大器中，第一级接收由第一和第二输入电压形成的差分输入电压，并且在具有相应的第一和第二线电压的第一和第二线上响应于此输出第一差分电流。 第二级接收第一和第二线电压，并在具有相应的第三和第四线电压的第三和第四线上响应于此输出第二差分电流。 变压器包括第一和第二线圈。 第一线圈的第一端子通过第一电阻器耦合到第一线路。 第一线圈的第二端子通过第二电阻器耦合到第二线路。 第二线圈的第一端子通过第三电阻器耦合到第三线路。 第二线圈的第二端子通过第四电阻器耦合到第四线路。

    Low loss galvanic isolation circuitry
    18.
    发明授权
    Low loss galvanic isolation circuitry 有权

    公开(公告)号：US10523175B2

    公开(公告)日：2019-12-31

    申请号：US15466961

    申请日：2017-03-23

    Applicant: Texas Instruments Incorporated

    Inventor： Swaminathan Sankaran ,  Bradley Allen Kramer ,  Baher Haroun

    IPC: H01P5/02 ,  H03H7/03 ,  H03H7/01 ,  H03H7/09

    Abstract: Disclosed examples include digital isolator modules, isolation circuitry and low-loss multi-order bandpass filter circuits, including a capacitive coupled galvanic isolation circuit with first and second coupling capacitors individually including a first plate and a second plate, and a bond wire connecting the first plates of the coupling capacitors, a first circuit with a first inductor coupled to form a first resonant tank circuit with a first parasitic capacitor associated with the second plate of the first coupling capacitor, and a second circuit with a second inductor coupled to form a second resonant tank circuit with a second parasitic capacitor associated with the second plate of the second coupling capacitor.

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