SYNCHRONOUS BOOTSTRAP HALF BRIDGE RECTIFIER
    11.
    发明公开

    公开(公告)号:US20240364232A1

    公开(公告)日:2024-10-31

    申请号:US18768245

    申请日:2024-07-10

    IPC分类号: H02M7/219 H02M1/08

    CPC分类号: H02M7/219 H02M1/08

    摘要: Described embodiments include a rectifier circuit comprising a first resistor with first and second resistor terminals, and a second resistor with third and fourth resistor terminals. The first and third resistor terminals are coupled to an auxiliary power terminal. A current source is coupled between the second resistor terminal and a ground terminal. An amplifier has a first amplifier input coupled to the second resistor terminal, and a second amplifier input coupled to the fourth resistor terminal. A first transistor is coupled between the fourth resistor terminal and a damping terminal, and has a first control terminal coupled to the first amplifier output. A gate drive circuit has an input coupled to the damping terminal. A second transistor is coupled between the damping terminal and a bootstrap supply terminal, and has a second control terminal coupled to an output of the gate drive circuit.

    Edge correction to mitigate total harmonic distortion in class D amplifier
    14.
    发明授权
    Edge correction to mitigate total harmonic distortion in class D amplifier 有权
    边缘校正,以减轻D类放大器的总谐波失真

    公开(公告)号:US09467097B2

    公开(公告)日:2016-10-11

    申请号:US14324886

    申请日:2014-07-07

    发明人: Cetin Kaya

    IPC分类号: H03F3/38 H03F3/217 H03F1/32

    摘要: A circuit includes an amplifier output stage that includes a high switch and a low switch that generates a pulse width modulated (PWM) output signal to provide a load current to a load in response to a PWM input signal. The circuit includes a high gate drive that drives the high switch with a PWM high drive signal derived from the PWM input signal. This includes a low gate drive that drives the low switch with a PWM low drive signal derived from the PWM input signal. The circuit includes an edge corrector that adjusts at least one of a leading edge and a trailing edge of the PWM input signal to compensate for response time differences with respect to a direction of the load current to the load.

    摘要翻译: 电路包括放大器输出级,其包括高开关和低开关,其产生脉宽调制(PWM)输出信号,以响应于PWM输入信号向负载提供负载电流。 该电路包括一个高栅极驱动器,用PWM驱动信号驱动高开关,PWM信号来自PWM输入信号。 这包括一个低栅极驱动器,通过从PWM输入信号得到的PWM低驱动信号驱动低开关。 电路包括边缘校正器,其调整PWM输入信号的前沿和后沿中的至少一个,以补偿相对于负载的负载电流的方向的响应时间差。

    ENHANCEMENT MODE STARTUP CIRCUIT WITH JFET EMULATION

    公开(公告)号:US20210265992A1

    公开(公告)日:2021-08-26

    申请号:US17314523

    申请日:2021-05-07

    摘要: A startup circuit adapted to be coupled to an input voltage supply and operable to supply an output voltage at an output terminal, the startup circuit including: a first transistor having a first control terminal, a first current terminal and a second current terminal, the first current terminal adapted to be coupled to the input voltage supply and the second current terminal coupled to the output terminal; a precharge circuit having a first terminal, a second terminal and a third terminal, the second terminal adapted to be coupled to the input voltage supply and the third terminal coupled to the first control terminal; a current limiter coupled to the precharge circuit, the first control terminal and the second current terminal; a second transistor having a second control terminal, a third current terminal and a fourth current terminal, the third current terminal coupled to the precharge circuit and the second control terminal adapted to be coupled to a control signal; and a third transistor having a third control terminal, a fifth current terminal and a sixth current terminal, the fifth current terminal coupled to the first control terminal and the third control terminal is adapted to be coupled to the control signal.

    Current sensor
    16.
    发明授权

    公开(公告)号:US11029338B2

    公开(公告)日:2021-06-08

    申请号:US15960588

    申请日:2018-04-24

    发明人: Cetin Kaya

    IPC分类号: G01R1/20 G01R19/00 H03F1/30

    摘要: A current sensor includes a die and a shunt resistor having a first temperature coefficient and having a first node and a second node fabricated onto the die, wherein the shunt resistor is for passing the current that is to be sensed. A first compensation resistor is fabricated onto the die and is coupled to the first node of the shunt resistor, wherein the first compensation resistor is proximate the shunt resistor and has a temperature coefficient that is similar to the temperature coefficient of the shunt resistor. A second compensation resistor is fabricated onto the die and is coupled to the second node of the shunt resistor, wherein the second compensation resistor is proximate the shunt resistor and has a temperature coefficient that is the close to the temperature coefficient of the shunt resistor.

    GATE DRIVERS AND AUTO-ZERO COMPARATORS

    公开(公告)号:US20210044286A1

    公开(公告)日:2021-02-11

    申请号:US16942390

    申请日:2020-07-29

    IPC分类号: H03K17/082 H03K19/0185

    摘要: Gate drivers and auto-zero comparators are disclosed. An example integrated circuit includes a transistor comprising a gate terminal and a current terminal, a gallium nitride (GaN) gate driver coupled to the gate terminal, the GaN gate driver configured to adjust operation of the transistor, and an enhancement mode GaN comparator coupled to at least one of the transistor the GaN gate driver, the enhancement mode GaN comparator configured to compare a voltage to a reference voltage, the voltage based on current from the current terminal, the GaN gate driver configured to adjust the operation of the transistor based on the comparison.

    Delaying turn on time to transistor comparing global, peak current

    公开(公告)号:US10673432B1

    公开(公告)日:2020-06-02

    申请号:US16219345

    申请日:2018-12-13

    发明人: Cetin Kaya

    摘要: Methods, apparatus, systems and articles of manufacture are disclosed to control parallel transistors. An example system includes a first transistor coupled in parallel to a second transistor, a pulse width modulation generator coupled to the first transistor. The pulse width modulation generator is to generate a first signal. The example system further includes a first switch timing controller coupled to the pulse width modulation generator. The first switch timing controller is to compare a first peak current of the first transistor with a second peak current and generate a second signal based on the comparison of the first peak current and the second peak current. The example system further includes a gate driver coupled to the first switch timing controller and the gate driver is to control the first transistor in response to the second signal.

    Current sensor
    20.
    发明授权

    公开(公告)号:US09983233B2

    公开(公告)日:2018-05-29

    申请号:US14611427

    申请日:2015-02-02

    发明人: Cetin Kaya

    IPC分类号: G01R1/20 G01R19/00 H03F1/30

    摘要: A current sensor includes a die and a shunt resistor having a first temperature coefficient and having a first node and a second node fabricated onto the die, wherein the shunt resistor is for passing the current that is to be sensed. A first compensation resistor is fabricated onto the die and is coupled to the first node of the shunt resistor, wherein the first compensation resistor is proximate the shunt resistor and has a temperature coefficient that is similar to the temperature coefficient of the shunt resistor. A second compensation resistor is fabricated onto the die and is coupled to the second node of the shunt resistor, wherein the second compensation resistor is proximate the shunt resistor and has a temperature coefficient that is the close to the temperature coefficient of the shunt resistor.