公开(公告)号：US20210159403A1

公开(公告)日：2021-05-27

申请号：US17142539

申请日：2021-01-06

Applicant: Texas Instruments Incorporated

Inventor： Ming Li ,  Yiqi Tang ,  Jie Chen ,  Enis Tuncer ,  Usman Mahmood Chaudhry ,  Tony Ray Larson ,  Rajen Manicon Murugan ,  John Paul Tellkamp ,  Satyendra Singh Chauhan

IPC: H01L43/14 ,  H01L43/06 ,  G01R15/20 ,  H01L23/495 ,  G01R33/07

Abstract: A Hall-effect sensor package includes and an IC die including a Hall-Effect element and a leadframe including leads on a first side providing a first field generating current (FGC) path including ≥1 first FGC input pin coupled by a reduced width first curved head over or under the Hall-effect sensor element to ≥1 first FGC output pin, and second leads on a second side of the package. Some leads on the second side are attached to bond pads on the IC die including the output of the Hall-effect element. A clip is attached at one end to the first FGC input pin and at another end to a location on the first FGC output pin, having a reduced width second curved head in between that is over or under the Hall-effect sensor element opposite the first head.

公开(公告)号：US10439065B2

公开(公告)日：2019-10-08

申请号：US15975022

申请日：2018-05-09

Applicant: Texas Instruments Incorporated

Inventor： John Paul Tellkamp ,  Andrew Couch

IPC: H01L29/78 ,  H01L23/495 ,  H01L23/64 ,  H01F19/08 ,  H01L23/00

Abstract: A packaged multichip isolation device includes leadframe including a first and second die pad, with a first and second lead extending outside a molded body having a downward extending lead bend near their outer ends. A first integrated circuit (IC) die on the first die pad has a first bond pad connected to the first lead that realizes a transmitter or receiver. A second IC die on the second die pad has a second bond pad connected to the second lead that realizes another of the transmitter and receiver. An isolation component is in a signal path of the isolation device including a capacitive isolator, or inductors for transformer isolation on or between the die. A midpoint of the thickness of the die pad is raised above a top level of the leads and in an opposite vertical direction relative to the downward extending bend of the external leads.

公开(公告)号：US20190109061A1

公开(公告)日：2019-04-11

申请号：US16028179

申请日：2018-07-05

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： John Paul Tellkamp ,  Chang-Yen Ko

IPC: H01L23/31 ,  H01L23/495

Abstract: In one instance, a semiconductor isolation package includes a leadframe that includes a plurality of leadframe leads. At least one of the plurality of leadframe leads includes a lead body having a first end that comprises an external pin portion and a second end. The lead body has a leg portion coupled to a central lead portion that is coupled to an edge bend portion. The edge bend portion is formed by a first bend on the lead body proximate the second end between the central lead portion and edge bend portion. The first bend is in the direction of the first end on the leg portion. The edge bend assists in shielding electronic fields. Other aspects are presented.

公开(公告)号：US09239353B2

公开(公告)日：2016-01-19

申请号：US13922428

申请日：2013-06-20

Applicant: Texas Instruments Incorporated

Inventor： John Paul Tellkamp

IPC: G01R31/26 ,  G01R31/12 ,  G01R31/28

CPC classification number: G01R31/129 ,  G01R31/2623 ,  G01R31/2862

Abstract: A method of testing an integrated circuit clearance distance device (“ICCDD”) having a predetermined clearance distance in air requirement and a predetermined isolation voltage limit including calculating a value of the breakdown voltage at the predetermined clearance distance for at least one gas; and selecting a gas in which the ICCDD has a breakdown voltage that is less than the predetermined isolation voltage.

Abstract translation: 一种在空气要求中具有预定间隙距离的集成电路间隙距离装置（“ICCDD”）和预定的隔离电压极限的方法，包括计算至少一种气体在预定间隙距离处的击穿电压值; 以及选择其中ICCDD具有小于预定隔离电压的击穿电压的气体。

公开(公告)号：US20130130411A1

公开(公告)日：2013-05-23

申请号：US13746067

申请日：2013-01-21

Applicant: Texas Instruments Incorporated

Inventor： John Paul Tellkamp

IPC: H01L21/66

CPC classification number: H01L22/14 ,  H01L23/49565 ,  H01L23/544 ,  H01L2223/54406 ,  H01L2223/54433 ,  H01L2223/54473 ,  H01L2223/54486 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A method of making an IC device includes providing a stack of leadframe sheets each including a plurality of leadframes and an interleaf member interposed between adjacent ones of the leadframe sheets. The interleaf members include indicia that identifies the leadframes sheets. The stack of leadframe sheets is loaded onto an assembly machine. A first interleaf member is removed from the first leadframe sheet. The first leadframe sheet is transferred onto a mounting surface of the assembly machine. Semiconductor die are attached to leadframes on the first leadframe sheet. The method can include reading the indicia from the first interleaf member to determine a part number and lead finish for the first leadframe sheet, verifying the part number for the first leadframe sheet by comparing to a build list, and transferring the first leadframe sheet onto a mounting surface of the assembly machine only if the part number is verified.

Abstract translation: 一种制造IC器件的方法包括提供一堆引线框片，每个引线框片片包括多个引线框和插入相邻引线框片之间的插入件。 插页成员包括标识引线框片的标记。 引线框架的堆叠被装载到组装机上。 从第一引线框架片上移除第一夹层构件。 第一引线框片被转移到组装机的安装表面上。 半导体管芯附接到第一引线框架片上的引线框架。 该方法可以包括从第一插页构件读取标记以确定第一引线框片的部件号和引线完成，通过与构建列表进行比较来验证第一引线框片的部件号，以及将第一引线框片传送到 装配机的安装面仅在零件编号被验证的情况下。