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公开(公告)号：US11004942B2
公开(公告)日：2021-05-11
申请号：US15859429
申请日：2017-12-30
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Michael Lueders , Johan Strydom
Abstract: In some examples, a system comprises a bi-directional gallium nitride (GaN) device including first and second switches and a substrate, the first switch including a first gate and a first source, the second switch including a second gate and a second source, and the substrate shared between the first and second switches. The system include a third switch coupled to the first source and the substrate. The system includes a fourth switch coupled to the second source and the substrate and a comparator having inputs coupled to the first and second sources and outputs coupled to the third and fourth switches.
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12.发明授权公开(公告)号：US10581335B1
公开(公告)日：2020-03-03
申请号：US16412102
申请日：2019-05-14
Applicant: Texas Instruments Incorporated
Inventor： Cetin Kaya , Paul Brohlin , Michael Lueders , Johan Strydom
Abstract: Methods, systems, and apparatus to facilitate high side control of a switching power converter are disclosed. An example apparatus includes a latch including a first node coupled to a first source of a first switch and an output coupled to a first gate of the first switch; a first diode coupled to the first node and a second node; a second diode coupled to the second node and ground; a second switch coupled to a voltage source and the second node; and a third switch including a third gate coupled to the second switch, a third source coupled to the second node, and a third drain coupled to the latch.
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公开(公告)号：US10547296B2
公开(公告)日：2020-01-28
申请号：US15993144
申请日：2018-05-30
Applicant: Texas Instruments Incorporated
Inventor： Gaetano Maria Walter Petrina , Michael Lueders , Nicola Rasera
IPC: H03K5/1534 , H02M1/08 , H03K5/13 , H03K5/00
Abstract: Methods, apparatus, systems, and articles of manufacture are disclosed for cross-conduction detection. An example apparatus includes a cross detector circuit including a first transistor and a second transistor, the first transistor coupled to a load, a third transistor coupled to a first controlled delay circuit and the first transistor, a fourth transistor coupled to a second controlled delay circuit and to the third transistor at a phase node, and a control circuit coupled to the first controlled delay circuit, the second controlled delay circuit, and the load.
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公开(公告)号：US10014777B1
公开(公告)日：2018-07-03
申请号：US15672429
申请日：2017-08-09
Applicant: Texas Instruments Incorporated
Inventor： Ivan Shumkov , Erich Bayer , Joerg Kirchner , Ruediger Ganz , Michael Lueders , Martin Priess , Nicola Rasera
IPC: H02M3/158
CPC classification number: H02M3/1582
Abstract: Disclosed examples include inverting buck-boost DC-DC converter circuits with a switching circuit to alternate between first and second buck mode phases for buck operation in a first mode, including connecting an inductor and a capacitor in series between an input node and a reference node to charge the inductor and the capacitor in the first buck mode phase, and connecting the inductor and the capacitor in parallel between an output node and the reference node to discharge the inductor and the capacitor to the output node. For boost operation in a second mode, the switching circuit alternates between connecting the inductor and the capacitor in series between the input node and the reference node to discharge the inductor and charge the capacitor in a first boost mode phase, and connecting the inductor between the input node and the reference node to charge the inductor and connecting the capacitor between the first output node and the reference node to discharge the capacitor to deliver power to the output node in a second boost mode phase.
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公开(公告)号：US09748841B2
公开(公告)日：2017-08-29
申请号：US14840183
申请日：2015-08-31
Inventor： Maurizio Granato , Giovanni Frattini , Pietro Giannelli , Michael Lueders , Christian Rott
CPC classification number: H02M3/158 , H02M2001/0003
Abstract: Described examples include DC to DC converters and systems with switching circuitry formed by four series-connected switches, inductors connected between the ends of the switching circuitry and corresponding output nodes, and with a flying capacitor coupled across interior switches of the switching circuitry and a second capacitor coupled across the ends of the switching circuitry. A control circuit operates the switching circuit to control a voltage signal across the output nodes using a first clock signal and a phase shifted second clock signal to reduce output ripple current and enhance converter efficiency using valley current control. The output inductors are wound on a common core in certain examples.
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Patent Agency Ranking
公开(公告)号：US20250080098A1
公开(公告)日：2025-03-06
申请号：US18664044
申请日：2024-05-14
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Michael Lueders , Jerrin James
Abstract: An apparatus includes a first transistor having a first transistor control terminal and coupled between a power terminal and a switching terminal. The apparatus further includes a second transistor having a second transistor control terminal and coupled between the switching terminal and a ground terminal. The apparatus further includes a first switch coupled between the power terminal and the second transistor control terminal, the first switch having a first switch control terminal; The apparatus further includes a second switch coupled between the second control terminal and the ground terminal, the second switch having a second switch control terminal. The apparatus also includes a controller having a control input, a first control output, and a second control output, the control input coupled to the second transistor control terminal, the first control output coupled to the first switch control terminal, and the second control output coupled to the second switch control terminal.
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公开(公告)号：US12113062B2
公开(公告)日：2024-10-08
申请号：US17137784
申请日：2020-12-30
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Naveen Tipirneni , Maik Peter Kaufmann , Michael Lueders , Jungwoo Joh
IPC: H01L27/06 , H01L21/8252 , H01L29/20 , H01L29/66 , H01L29/778 , H01L49/02 , H02M3/156 , H03K3/037
CPC classification number: H01L27/0629 , H01L21/8252 , H01L27/0605 , H01L28/60 , H01L29/2003 , H01L29/66462 , H01L29/7781 , H02M3/156 , H03K3/0377
Abstract: The present invention provides a capacitor having a first structure made of a metal layer and a second structure made of the same metal layer and a dielectric layer between the first and the second metal structure, wherein the dielectric layer has a relative permittivity greater than 4, in particular greater than 6. It also provides a monolithically integrated circuit including such a capacitor and optionally other components. A method of manufacturing such a capacitor is also provided.
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公开(公告)号：US11728798B2
公开(公告)日：2023-08-15
申请号：US16719813
申请日：2019-12-18
Applicant: Texas Instruments Incorporated
Inventor： Gaetano Maria Walter Petrina , Michael Lueders , Nicola Rasera
IPC: H03K5/1534 , H02M1/08 , H03K5/13 , H02M1/38 , H03K5/00
CPC classification number: H03K5/1534 , H02M1/08 , H02M1/38 , H03K5/13 , H03K2005/00078
Abstract: Methods, apparatus, systems, and articles of manufacture are disclosed for cross-conduction detection. An example apparatus includes a cross detector circuit including a first transistor and a second transistor, the first transistor coupled to a load, a third transistor coupled to a first controlled delay circuit and the first transistor, a fourth transistor coupled to a second controlled delay circuit and to the third transistor at a phase node, and a control circuit coupled to the first controlled delay circuit, the second controlled delay circuit, and the load.
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公开(公告)号：US11621708B2
公开(公告)日：2023-04-04
申请号：US17314523
申请日：2021-05-07
Applicant: Texas Instruments Incorporated
Inventor： Michael Lueders , Johan Strydom , Cetin Kaya , Maik Peter Kaufmann
Abstract: A startup circuit adapted to be coupled to an input voltage supply and operable to supply an output voltage at an output terminal, the startup circuit including: a first transistor having a first control terminal, a first current terminal and a second current terminal, the first current terminal adapted to be coupled to the input voltage supply and the second current terminal coupled to the output terminal; a precharge circuit having a first terminal, a second terminal and a third terminal, the second terminal adapted to be coupled to the input voltage supply and the third terminal coupled to the first control terminal; a current limiter coupled to the precharge circuit, the first control terminal and the second current terminal; a second transistor having a second control terminal, a third current terminal and a fourth current terminal, the third current terminal coupled to the precharge circuit and the second control terminal adapted to be coupled to a control signal; and a third transistor having a third control terminal, a fifth current terminal and a sixth current terminal, the fifth current terminal coupled to the first control terminal and the third control terminal is adapted to be coupled to the control signal.
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公开(公告)号：US20230038798A1
公开(公告)日：2023-02-09
申请号：US17873395
申请日：2022-07-26
Applicant: Texas Instruments Incorporated
Inventor： Michael Lueders , Cetin Kaya , Johan Strydom , Paul Brohlin
Abstract: Described embodiments include a rectifier circuit comprising a first resistor with first and second resistor terminals, and a second resistor with third and fourth resistor terminals. The first and third resistor terminals are coupled to an auxiliary power terminal. A current source is coupled between the second resistor terminal and a ground terminal. An amplifier has a first amplifier input coupled to the second resistor terminal, and a second amplifier input coupled to the fourth resistor terminal. A first transistor is coupled between the fourth resistor terminal and a damping terminal, and has a first control terminal coupled to the first amplifier output. A gate drive circuit has an input coupled to the damping terminal. A second transistor is coupled between the damping terminal and a bootstrap supply terminal, and has a second control terminal coupled to an output of the gate drive circuit.
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