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公开(公告)号：US09651980B2
公开(公告)日：2017-05-16
申请号：US14664803
申请日：2015-03-20
Applicant: Texas Instruments Incorporated
Inventor： Subrato Roy
CPC classification number: G05F3/267
Abstract: A bandgap reference voltage generator includes a first and a second bipolar junction transistor, which is biased at a lower current per unit emitter area than that of the first transistor. Accordingly, the base to emitter voltage of first transistor is higher than that of the second transistor and a delta VBE is generated at the base of the first transistor with respect to the base of the second transistor. A first voltage divider generates a divided voltage of a VBE (fractional VBE) at a first center node. The fractional VBE is added to the VBE of the first transistor and subtracted from the VBE of the second transistor by closed loop feedback action to generate a temperature compensated reference voltage at the base of second transistor. The reference voltage can be amplified to higher voltage levels by using a resistor divider at the base of second transistor.
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公开(公告)号：US11996830B2
公开(公告)日：2024-05-28
申请号：US17514968
申请日：2021-10-29
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Kushal D. Murthy , Subrato Roy , Dilip Kumar Jain , Abhijeet Gopal Godbole
IPC: H03K17/08 , G01R19/165 , G05F3/18 , H02H3/18 , H03K17/0812 , H03K17/687
CPC classification number: H03K17/08122 , G01R19/16538 , G05F3/18 , H02H3/18 , H03K17/687
Abstract: One example described herein includes a power switch control system. The system includes a first monitoring terminal coupled to a first terminal of a power transistor and a second monitoring terminal coupled to a second terminal of the power transistor. The power transistor and the power switch control system can form an ideal diode between the first monitoring terminal arranged as an anode and the second monitoring terminal arranged as a cathode. The system further includes a reverse current controller coupled to the first monitoring terminal and the second monitoring terminal and is configured to control activation of the power transistor to conduct a reverse current from the second monitoring terminal to the first monitoring terminal in response to a reverse voltage arranged as a cathode voltage at the second monitoring terminal being greater than an anode voltage at the first monitoring terminal.
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公开(公告)号：US11914412B2
公开(公告)日：2024-02-27
申请号：US17850600
申请日：2022-06-27
Applicant: Texas Instruments Incorporated
Inventor： Sanjeev Praphulla Chandra Nyshadham , Subrato Roy
Abstract: In described examples, a circuit includes a first current mirror circuit. The first current mirror circuit is coupled to a power input terminal. A first stage is coupled to the first current mirror circuit, and a second stage is coupled to the first stage and to the first current mirror circuit. An amplifier is coupled to the first and second stages. The amplifier has first and second input terminals. The first input terminal is coupled to the first stage, and the second input terminal is coupled to the second stage. A second current mirror circuit is coupled to the first stage, the second stage and the amplifier.
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14.发明申请公开(公告)号：US20200028345A1
公开(公告)日：2020-01-23
申请号：US16428493
申请日：2019-05-31
Applicant: Texas Instruments Incorporated
Inventor： Subrato Roy , Ankur Chauhan , Vishal Gupta
Abstract: Methods, apparatus, systems and articles of manufacture are disclosed for preventing undesired triggering of short circuit or over current protection. An example apparatus includes an output terminal; a voltage detection device coupled to a voltage detection input terminal and the output terminal and including a voltage detection output coupled to a logic gate first input terminal; a pulse extender coupled between a logic gate output and a selecting node; a multiplexer coupled to the selecting node and configured to be coupled to a first protection circuit, a second protection circuit, and a driver; and a switch coupled between an input terminal and the output terminal and including a switch gate terminal coupled to the driver.
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公开(公告)号：US10348280B2
公开(公告)日：2019-07-09
申请号：US15857135
申请日：2017-12-28
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Ankur Chauhan , Subrato Roy
IPC: G01R19/00 , G01R1/30 , H02H5/04 , G05F1/00 , G05F3/16 , G01K3/10 , H03K5/08 , G05F1/46 , G05F1/573
Abstract: An example current limiting apparatus comprises a first transistor to carry a first current; a sense transistor coupled to the first transistor, the sense transistor to carry a sense current that is a function of the first current; a first amplifier coupled to the first transistor and the sense transistor, the amplifier to achieve a common voltage potential on terminals of the first and the sense transistors; a second amplifier coupled to the first amplifier and the sense transistor, the second amplifier to control the first and sense transistors based on the sense current; and a circuit coupled to the first and second amplifiers, the circuit to control an input to the second amplifier based on an input to the first amplifier such that a current limit of the first transistor remains below a programmed current limit of the first transistor.
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Patent Agency Ranking
公开(公告)号：US20160274616A1
公开(公告)日：2016-09-22
申请号：US14664803
申请日：2015-03-20
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Subrato Roy
IPC: G05F3/26
CPC classification number: G05F3/267
Abstract: A bandgap reference voltage generator includes a first and a second bipolar junction transistor, which is biased at a lower current per unit emitter area than that of the first transistor. Accordingly, the base to emitter voltage of first transistor is higher than that of the second transistor and a delta VBE is generated at the base of the first transistor with respect to the base of the second transistor. A first voltage divider generates a divided voltage of a VBE (fractional VBE) at a first center node. The fractional VBE is added to the VBE of the first transistor and subtracted from the VBE of the second transistor by closed loop feedback action to generate a temperature compensated reference voltage at the base of second transistor. The reference voltage can be amplified to higher voltage levels by using a resistor divider at the base of second transistor.
Abstract translation: 带隙参考电压发生器包括第一和第二双极结型晶体管，其以比第一晶体管的每单位发射极面积更低的电流偏置。 因此，第一晶体管的基极对发射极电压高于第二晶体管的基极至发射极电压，并且在第一晶体管的基极处相对于第二晶体管的基极产生增量VBE。 第一分压器在第一中心节点处产生VBE（分数VBE）的分压。 将分数VBE加到第一晶体管的VBE中，并通过闭环反馈作用从第二晶体管的VBE减去，以在第二晶体管的基极处产生温度补偿参考电压。 通过在第二晶体管的基极使用电阻分压器，可将参考电压放大到更高的电压电平。
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17.发明申请公开(公告)号：US20150115929A1
公开(公告)日：2015-04-30
申请号：US14503545
申请日：2014-10-01
Applicant: Texas Instruments Incorporated
Inventor： Sumantra Seth , Subrato Roy , Deepak Verma
Abstract: The disclosure provides a voltage regulator for generating piece-wise linear regulated supply voltage. The voltage regulator includes a first clamp circuit that receives a reference voltage and an analog supply voltage. A second clamp circuit receives the reference voltage. A voltage divider circuit is coupled to the first clamp circuit and the second clamp circuit. The voltage divider circuit receives a peripheral supply voltage and generates a regulated supply voltage.
Abstract translation: 本公开提供了用于产生分段线性稳压电源电压的电压调节器。 电压调节器包括接收参考电压和模拟电源电压的第一钳位电路。 第二钳位电路接收参考电压。 分压器电路耦合到第一钳位电路和第二钳位电路。 分压器电路接收外围电源电压并产生稳定的电源电压。
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公开(公告)号：US12164324B2
公开(公告)日：2024-12-10
申请号：US18419784
申请日：2024-01-23
Applicant: Texas Instruments Incorporated
Inventor： Sanjeev Praphulla Chandra Nyshadham , Subrato Roy
Abstract: In described examples, a circuit includes a first current mirror circuit. The first current mirror circuit is coupled to a power input terminal. A first stage is coupled to the first current mirror circuit, and a second stage is coupled to the first stage and to the first current mirror circuit. An amplifier is coupled to the first and second stages. The amplifier has first and second input terminals. The first input terminal is coupled to the first stage, and the second input terminal is coupled to the second stage. A second current mirror circuit is coupled to the first stage, the second stage and the amplifier.
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公开(公告)号：US20230417829A1
公开(公告)日：2023-12-28
申请号：US17846397
申请日：2022-06-22
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： HARSH PATEL , Aalok Dyuti Saha , Sanjeev Praphulla Chandra Nyshadham , Subrato Roy , Gaurav Kumar Mittal
CPC classification number: G01R31/3008 , G01R19/2506
Abstract: One example includes a method for measuring a quiescent current in a switching voltage regulator. The method includes generating a mathematical model of a circuit design associated with the switching voltage regulator. The mathematical model includes measurable parameters to describe a switching current of a power switch of the switching voltage regulator. The method also includes fabricating a circuit comprising the switching voltage regulator based on the circuit design. The fabricated circuit includes the power switch and conductive I/O. The method also includes coupling the conductive I/O of the fabricated circuit to a circuit test fixture and providing electrical signals to the conductive I/O via the circuit test fixture. The method also includes measuring the measurable parameters in response to the electrical signals and applying the measurable parameters to the mathematical model to calculate the switching current. The method further includes calculating the quiescent current based on the switching current.
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公开(公告)号：US20220413539A1
公开(公告)日：2022-12-29
申请号：US17850600
申请日：2022-06-27
Applicant: Texas Instruments Incorporated
Inventor： Sanjeev Praphulla Chandra Nyshadham , Subrato Roy
Abstract: In described examples, a circuit includes a first current mirror circuit. The first current mirror circuit is coupled to a power input terminal. A first stage is coupled to the first current mirror circuit, and a second stage is coupled to the first stage and to the first current mirror circuit. An amplifier is coupled to the first and second stages. The amplifier has first and second input terminals. The first input terminal is coupled to the first stage, and the second input terminal is coupled to the second stage. A second current mirror circuit is coupled to the first stage, the second stage and the amplifier.
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