公开(公告)号：US11626848B2

公开(公告)日：2023-04-11

申请号：US17333395

申请日：2021-05-28

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Sudheer Prasad

IPC: H03F3/45 ,  H03G3/30

Abstract: In one example an amplifier includes a bias circuit, an open-loop gain stage including a first PMOS having a gate coupled to a first node, a source coupled to a second node, a drain coupled to a third node, and a bulk coupled to the bias circuit, a second PMOS having a gate coupled to a ground node, a source coupled to the second node, a drain coupled to a fourth node, and a bulk coupled to the bias circuit, a first NMOS having a drain and a gate coupled to the third node and a source coupled to a fifth node, a second NMOS having a drain coupled to the fourth node, a gate coupled to the third node, and a source coupled to the fifth node, an adjustable resistor coupleable between the third and fourth nodes, and a buffer stage coupled to the open-loop gain stage.

公开(公告)号：US20230223395A1

公开(公告)日：2023-07-13

申请号：US17854998

申请日：2022-06-30

Applicant: Texas Instruments Incorporated

Inventor： Sunglyong Kim ,  Sudheer Prasad ,  Sreeram N. S. ,  Sandip Lashkare ,  Christopher Kocon

IPC: H01L27/02

CPC classification number: H01L27/0255 ,  H01L27/0292

Abstract: Electrostatic discharge (ESD) protection devices with high current capability are described. The ESD protection device may include a pair of bidirectional diodes (first and second bidirectional diodes) connected in series. Each of the bidirectional diodes includes a low capacitance (LC) diode and a bypass diode connected in parallel. During ESD events, current flows through the LC diode of the first bidirectional diode and the bypass diode of the second bidirectional diode. Particular arrangements of the LC diodes and the bypass diodes are devised to facilitate uniform distribution of the current throughout an area occupied by the ESD protection device.

公开(公告)号：US20230223393A1

公开(公告)日：2023-07-13

申请号：US17855105

申请日：2022-06-30

Applicant: Texas Instruments Incorporated

Inventor： Christopher Kocon ,  Sunglyong Kim ,  Sreeram N. S. ,  Sudheer Prasad ,  Sandip Lashkare

IPC: H01L27/02

CPC classification number: H01L27/0248

Abstract: Semiconductor devices with high current capability for ESD or surge protection are described. The semiconductor device includes multiple n-type semiconductor regions in a p-type semiconductor layer. Each of the n-type semiconductor regions may have a footprint with a circular, oval, or obround shape. Moreover, a boundary of the footprint may be spaced apart from an isolation structure that surrounds the p-type semiconductor layer. The n-type semiconductor regions may be coupled to a terminal through individual groups of contacts that are connected to the n-type semiconductor regions, respectively. Additionally, or alternatively, the p-type semiconductor layer surrounded by the isolation structure may not include any re-entrant corner.

公开(公告)号：US20180287602A1

公开(公告)日：2018-10-04

申请号：US16001518

申请日：2018-06-06

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Ankur Chauhan ,  Sudheer Prasad ,  Md. Abidur Rahman ,  Subrato Roy

IPC: H03K17/082 ,  H01L23/525 ,  H03K17/687 ,  G01R19/00

CPC classification number: H03K17/0822 ,  G01R19/0092 ,  H01L23/5256 ,  H03K17/687 ,  H03K2217/0027 ,  H03K2217/0054

Abstract: An apparatus includes: a first power transistor having a first current conduction path coupled between an input for receiving a supply voltage and a node and a first gate terminal coupled to a first gate control signal; a second power transistor having a second current conduction path coupled between the node and an output terminal for supplying a load current to a load; and a second gate terminal coupled to a second gate control signal; and a current sense transistor having a third gate terminal coupled to the first gate control signal, and outputting a sense current. The apparatus further includes: a differential amplifier having an output signal, and a feedback transistor having a gate terminal coupled to the output signal of the differential amplifier; and a resistor coupled between a monitor node and ground.