公开(公告)号：US20240112852A1

公开(公告)日：2024-04-04

申请号：US17957875

申请日：2022-09-30

Applicant: Texas Instruments Incorporated

Inventor： Jeffrey Alan West ,  Byron Lovell Williams ,  Kashyap Barot ,  Sreeram N. S. ,  Viresh Chinchansure

IPC: H01F27/32 ,  H01F41/12

CPC classification number: H01F27/324 ,  H01F41/122 ,  H01F2027/329

Abstract: A microelectronic device includes a galvanic isolation component. The galvanic isolation component includes a lower winding and an upper isolation element over the lower winding. The galvanic isolation component further includes a field suppression structure located interior to the lower winding. The field suppression structure includes a conductive field deflector that is separated from the lower winding by a lateral distance that is half a thickness of the lower winding to twice the thickness of the lower winding. A top surface of the conductive field deflector is substantially coplanar with a bottom surface of the lower winding. The conductive field deflector is electrically connected to a semiconductor material in a substrate. The lower winding is separated from a substrate by a first dielectric layer. The upper isolation element is separated from the lower winding by a second dielectric layer.

公开(公告)号：US20240113094A1

公开(公告)日：2024-04-04

申请号：US17957847

申请日：2022-09-30

Applicant: Texas Instruments Incorporated

Inventor： Jeffrey Alan West ,  Sreeram N. S. ,  Kashyap Barot ,  Thomas Dyer Bonifield ,  Byron Lovell Williams ,  Elizabeth Costner Stewart

IPC: H01L25/18 ,  H01F27/28 ,  H01F27/29 ,  H01F27/32 ,  H01L23/00 ,  H01L27/01

CPC classification number: H01L25/18 ,  H01F27/2804 ,  H01F27/29 ,  H01F27/323 ,  H01L24/05 ,  H01L24/06 ,  H01L24/48 ,  H01L24/49 ,  H01L27/01 ,  H01F2027/2809 ,  H01L2224/05554 ,  H01L2224/05555 ,  H01L2224/05567 ,  H01L2224/05573 ,  H01L2224/05624 ,  H01L2224/05644 ,  H01L2224/06051 ,  H01L2224/06102 ,  H01L2224/06155 ,  H01L2224/0616 ,  H01L2224/4809 ,  H01L2224/48137 ,  H01L2224/48175 ,  H01L2224/4909

Abstract: A microelectronic device includes a galvanic isolation device on a silicon substrate and a semiconductor device on a semiconductor substrate. The galvanic isolation device includes a lower isolation element over the silicon substrate and an upper isolation element above the lower isolation element, separated by a dielectric plateau that comprises inorganic dielectric material extending from the lower isolation element to the upper isolation element. The galvanic isolation device includes lower bond pads connected to the lower isolation element adjacent to the dielectric plateau, and upper bond pads over the dielectric plateau, connected to the upper isolation element. The semiconductor device includes an active component, and device bond pads coupled to the active component. The microelectronic device includes first electrical connections to the lower bond pads and second electrical connections to the upper bond pads. The first electrical connections or the second electrical connections are connected to the device bond pads.

公开(公告)号：US20230223395A1

公开(公告)日：2023-07-13

申请号：US17854998

申请日：2022-06-30

Applicant: Texas Instruments Incorporated

Inventor： Sunglyong Kim ,  Sudheer Prasad ,  Sreeram N. S. ,  Sandip Lashkare ,  Christopher Kocon

IPC: H01L27/02

CPC classification number: H01L27/0255 ,  H01L27/0292

Abstract: Electrostatic discharge (ESD) protection devices with high current capability are described. The ESD protection device may include a pair of bidirectional diodes (first and second bidirectional diodes) connected in series. Each of the bidirectional diodes includes a low capacitance (LC) diode and a bypass diode connected in parallel. During ESD events, current flows through the LC diode of the first bidirectional diode and the bypass diode of the second bidirectional diode. Particular arrangements of the LC diodes and the bypass diodes are devised to facilitate uniform distribution of the current throughout an area occupied by the ESD protection device.

公开(公告)号：US20230223393A1

公开(公告)日：2023-07-13

申请号：US17855105

申请日：2022-06-30

Applicant: Texas Instruments Incorporated

Inventor： Christopher Kocon ,  Sunglyong Kim ,  Sreeram N. S. ,  Sudheer Prasad ,  Sandip Lashkare

IPC: H01L27/02

CPC classification number: H01L27/0248

Abstract: Semiconductor devices with high current capability for ESD or surge protection are described. The semiconductor device includes multiple n-type semiconductor regions in a p-type semiconductor layer. Each of the n-type semiconductor regions may have a footprint with a circular, oval, or obround shape. Moreover, a boundary of the footprint may be spaced apart from an isolation structure that surrounds the p-type semiconductor layer. The n-type semiconductor regions may be coupled to a terminal through individual groups of contacts that are connected to the n-type semiconductor regions, respectively. Additionally, or alternatively, the p-type semiconductor layer surrounded by the isolation structure may not include any re-entrant corner.

公开(公告)号：US20140169038A1

公开(公告)日：2014-06-19

申请号：US14103386

申请日：2013-12-11

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Anant Shankar Kamath ,  Sreeram N. S.

IPC: H03K7/06 ,  H03D3/00

CPC classification number: H03D3/00 ,  H04L25/0268

Abstract: Several circuits and methods for transferring an input data signal in a digital isolator are disclosed. In an embodiment, the digital isolator includes an isolation element, input circuit, and output circuit. The isolation element includes at least one input node and at least one output node, the input circuit is electronically coupled to the input node and generates modulated differential data signals based on modulating the input data signal on a carrier signal. The input circuit operates using a first supply voltage with respect to a first ground. The output circuit is electronically coupled to the output node to receive the modulated differential data signals, operates using a second supply voltage with respect to a second ground and includes a frequency-shift keying demodulator configured to generate a demodulated data signal in response to detection of presence of the carrier signal. The output circuit further generates an output data signal.

Abstract translation: 公开了用于在数字隔离器中传送输入数据信号的几种电路和方法。 在一个实施例中，数字隔离器包括隔离元件，输入电路和输出电路。 隔离元件包括至少一个输入节点和至少一个输出节点，输入电路电耦合到输入节点，并且基于在载波信号上调制输入数据信号来生成调制的差分数据信号。 输入电路使用相对于第一地的第一电源电压来工作。 输出电路电耦合到输出节点以接收经调制的差分数据信号，使用相对于第二接地的第二电源电压进行操作，并且包括频移键控解调器，配置为响应于检测到的信号而产生解调数据信号 存在载波信号。 输出电路还产生输出数据信号。