公开(公告)号：US10116291B2

公开(公告)日：2018-10-30

申请号：US15232521

申请日：2016-08-09

Applicant: Texas Instruments Incorporated

Inventor： Sujan Kundapur Manohar ,  Roland Karl Son ,  Juergen Luebbe ,  Eddie W. Yu

IPC: H02H3/00 ,  H03K5/08 ,  H03K17/0812 ,  H02H3/18 ,  H02H3/08 ,  H03K17/082 ,  H02H9/02 ,  H02H3/087

Abstract: In described examples, a power interface subsystem includes power transistors, each having: a conduction path coupled between a battery terminal and an accessory terminal; and a control terminal. A differential amplifier has: a first input coupled to the battery terminal; a second input coupled to the accessory terminal; and an output node. An offset voltage source is coupled to cause an offset of a selected polarity at one of the inputs to the differential amplifier. The offset has a first polarity in a first operating mode and a second polarity in a second operating mode. Gate control circuitry is coupled to apply a control level at the control terminal(s) of selected one(s) of the power transistors responsive to a voltage at the output node, and to apply an off-state control level to the control terminal(s) of unselected one(s) of the power transistors.

公开(公告)号：US10734313B2

公开(公告)日：2020-08-04

申请号：US15951021

申请日：2018-04-11

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Jeffrey Morroni ,  Rajeev Dinkar Joshi ,  Sreenivasan K. Koduri ,  Sujan Kundapur Manohar ,  Yogesh K. Ramadass ,  Anindya Poddar

IPC: H01L23/495 ,  H01L25/065 ,  H01L23/31 ,  H01L23/29 ,  H01L23/498 ,  H01L25/16 ,  H01L23/50

Abstract: A semiconductor package includes a leadframe and a semiconductor die attached to the leadframe by way of solder posts. In a stacked arrangement, the package also includes a passive component disposed between the leadframe and the semiconductor die and electrically connected to the semiconductor die through the leadframe.

公开(公告)号：US20200159278A1

公开(公告)日：2020-05-21

申请号：US16194784

申请日：2018-11-19

Applicant: Texas Instruments Incorporated

Inventor： Angelo William Pereira ,  Pinar Korkmaz ,  Sujan Kundapur Manohar

IPC: G06F1/04 ,  H03K3/027 ,  H03L7/099 ,  H03B5/06

Abstract: Integrated circuits having self-calibrating oscillators, and methods of operating the same are disclosed. A disclosed example integrated circuit includes a clock generator, a comparator having a first input connected to an output of the clock generator and a second input connected to a reference voltage, a calibration done detector having an input connected to an output of the comparator and an output communicatively coupled to a calibration code register.

公开(公告)号：US10523114B1

公开(公告)日：2019-12-31

申请号：US16205200

申请日：2018-11-29

Applicant: Texas Instruments Incorporated

Inventor： Sujan Kundapur Manohar ,  Yogesh K. Ramadass

IPC: H02M1/44 ,  H02M1/32 ,  H02M3/155 ,  H02M1/00 ,  H02M3/07 ,  G05F3/20 ,  G05F1/569

Abstract: Described herein is a technology for implementing a decoupling circuit (104) to increase reliability of a DC-DC power converter (100). To absorb an overshoot transient voltage, the decoupling circuit includes a first capacitor (214) and a second capacitor (216) that charge energy during a short burst of upward electrical energy. During an undershoot transient voltage, however, the first capacitor and second capacitor discharge energy to a transistor (108). In certain embodiment, such as the transistor that requires higher voltage switching, the decoupling circuit is connected in series with another decoupling circuit.

公开(公告)号：US20170317583A1

公开(公告)日：2017-11-02

申请号：US15234722

申请日：2016-08-11

Applicant: Texas Instruments Incorporated

Inventor： Hassan Pooya Forghani-Zadeh ,  Sujan Kundapur Manohar ,  Ariel Dario Moctezuma

IPC: H02M3/07 ,  H03K5/08

Abstract: In described examples, in response to a voltage at an external power terminal falling below a safe limit: a charge pump is operated at a first frequency to produce a voltage at a charge pump node; and a first controlled current is coupled from the charge pump node to a control terminal of a power switch transistor. The power switch transistor has a conduction path coupled between the external power terminal and an internal power terminal at which an internal power source is connected. In response to the voltage at the external power terminal reaching a selected level: the charge pump is operated at a second frequency, lower than the first frequency; and a second controlled current, lower than the first controlled current, is coupled from the charge pump node to the control terminal of the power switch transistor.

公开(公告)号：US20170047731A1

公开(公告)日：2017-02-16

申请号：US15232521

申请日：2016-08-09

Applicant: Texas Instruments Incorporated

Inventor： Sujan Kundapur Manohar ,  Roland Karl Son ,  Juergen Luebbe ,  Eddie W. Yu

IPC: H02H9/02 ,  H03K5/08 ,  H03K17/687

CPC classification number: H03K5/08 ,  H02H3/08 ,  H02H3/087 ,  H02H3/18 ,  H02H9/02 ,  H03K17/08122 ,  H03K17/0822

Abstract: In described examples, a power interface subsystem includes power transistors, each having: a conduction path coupled between a battery terminal and an accessory terminal; and a control terminal. A differential amplifier has: a first input coupled to the battery terminal; a second input coupled to the accessory terminal; and an output node. An offset voltage source is coupled to cause an offset of a selected polarity at one of the inputs to the differential amplifier. The offset has a first polarity in a first operating mode and a second polarity in a second operating mode. Gate control circuitry is coupled to apply a control level at the control terminal(s) of selected one(s) of the power transistors responsive to a voltage at the output node, and to apply an off-state control level to the control terminal(s) of unselected one(s) of the power transistors.

Abstract translation: 在所述示例中，电源接口子系统包括功率晶体管，每个功率晶体管具有：耦合在电池端子和附件端子之间的导电路径; 和控制终端。 差分放大器具有：耦合到电池端子的第一输入; 耦合到附件终端的第二输入; 和输出节点。 偏移电压源被耦合以在所述差分放大器的输入之一处引起所选极性的偏移。 偏移在第一操作模式中具有第一极性，在第二操作模式中具有第二极性。 门控制电路被耦合以响应于输出节点处的电压而在功率晶体管的所选择的一个或多个控制端上施加控制电平，并且向控制端施加截止状态控制电平（ s）的未选择的一个或多个功率晶体管。