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公开(公告)号：US20200042488A1
公开(公告)日：2020-02-06
申请号：US16404461
申请日：2019-05-06
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Win Naing MAUNG , Saurabh GOYAL , Bhupendra SHARMA , Huanzhang HUANG , Douglas Edward WENTE , Suzanne Mary VINING , Mustafa Ulvi ERDOGAN
Abstract: At least some aspects of the present disclosure provide for a method. In some examples, the method includes receiving, at a circuit, data via a differential input signal, detecting a rising edge in the data received via the differential input signal, and precharging a common mode voltage (Vcm) node of the differential input signal responsive to detecting the rising edge in the data received via the differential input signal, wherein the Vcm node is a floating node.
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公开(公告)号：US20200034323A1
公开(公告)日：2020-01-30
申请号：US16404433
申请日：2019-05-06
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Win Naing MAUNG , Bhupendra SHARMA , Huanzhang HUANG , Douglas Edward WENTE , Suzanne Mary VINING , Mustafa Ulvi ERDOGAN
Abstract: Aspects of the disclosure provide for a method. In at least some examples, the method includes receiving, at a circuit, data via a differential input signal. The method further includes detecting a falling edge in the data received via the differential input signal. The method further includes holding an output of the circuit at a final logical value of the data. The method further includes disabling a transmitter of the circuit while holding the output of the circuit at the final logical value of the data. The method further includes releasing the output of the circuit from the final logical value of the data.
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公开(公告)号：US20160371206A1
公开(公告)日：2016-12-22
申请号：US15186076
申请日：2016-06-17
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Win Naing MAUNG , Charles Michael CAMPBELL , Suzanne Mary VINING
CPC classification number: G06F13/20 , G06F13/102 , G06F13/4282 , Y02D10/14 , Y02D10/151
Abstract: An apparatus and method for configuring a serial communication hub are disclosed herein. A serial communication hub includes an upstream port, a plurality of downstream ports, and a port controller. The port controller is configured to: arrange each of a first of the downstream ports and a second of the downstream ports to individually operate as a first type of serial communication interface; and to arrange the first of the downstream ports and the second of the downstream ports to operate in combination as a second type of serial communication interface.
Abstract translation: 本文公开了一种用于配置串行通信集线器的装置和方法。 串行通信集线器包括上行端口，多个下行端口和端口控制器。 端口控制器被配置为：排列第一下游端口中的每一个和下游端口中的第二个单独地作为第一类型的串行通信接口操作; 并且将第一下游端口和第二下游端口配置为组合作为第二类型的串行通信接口。
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公开(公告)号：US20240356774A1
公开(公告)日：2024-10-24
申请号：US18240827
申请日：2023-08-31
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Win Naing MAUNG , Roy WOJCIECHOWSKI , James SKIDMORE
IPC: H04L12/40
CPC classification number: H04L12/40058 , H04L12/40013 , H04L12/40071 , H04L12/40117
Abstract: A serial bus control circuit includes a link layer control circuit. The link layer control circuit is configured to control isochronous data transfer over a serial bus. The link layer control circuit includes an isochronous cycle timer configured to provide a cycle frame that is less than 125 microseconds in duration. The link layer control circuit can be configured to set the isochronous cycle timer to provide a cycle frame duration that produces an isochronous transfer latency of no more than 50 microseconds.
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Patent Agency Ranking
公开(公告)号：US20210391893A1
公开(公告)日：2021-12-16
申请号：US17458624
申请日：2021-08-27
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Suzanne Mary VINING , Gary CHARD , Win Naing MAUNG , Mark Alan McADAMS
Abstract: At least some aspects of the present disclosure provide for a method. In some examples, the method includes receiving 2-line data in an embedded Universal Serial Bus (eUSB) format. The method further includes encoding the 2-line data into a single signal. The single signal comprises a first symbol corresponding to a first state change of the 2-line data and a second symbol corresponding to a second state change of the 2-line data.
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公开(公告)号：US20210311903A1
公开(公告)日：2021-10-07
申请号：US17347920
申请日：2021-06-15
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Win Naing MAUNG , Suzanne Mary VINING , Yonghui TANG , Douglas Edward WENTE , Huanzhang HUANG
IPC: G06F13/42
Abstract: A serial bus signal conditioner circuit includes receiver circuitry, a mode identification circuit, and an edge-rate booster circuit. The receiver circuitry is configured to receive signals transmitted on a serial bus. The mode identification circuit is coupled to the receiver circuitry, and is configured to identify initiation of or return to high-speed signaling on the serial bus based on sequences of the signals transmitted on the serial bus. The edge-rate booster circuit is coupled to the mode identification circuit, and is configured to identify edges of a differential signal transmitted on the serial bus, and to supply a differential current to the serial bus based on identification of an edge of the differential signal.
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公开(公告)号：US20210240648A1
公开(公告)日：2021-08-05
申请号：US17233677
申请日：2021-04-19
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Win Naing MAUNG , Bhupendra SHARMA , Huanzhang HUANG , Douglas Edward WENTE , Suzanne Mary VINING , Mustafa Ulvi ERDOGAN
Abstract: Aspects of the disclosure provide for a method. In at least some examples, the method includes receiving, at a circuit, data via a differential input signal. The method further includes detecting a falling edge in the data received via the differential input signal. The method further includes holding an output of the circuit at a final logical value of the data. The method further includes disabling a transmitter of the circuit while holding the output of the circuit at the final logical value of the data. The method further includes releasing the output of the circuit from the final logical value of the data.
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公开(公告)号：US20200272590A1
公开(公告)日：2020-08-27
申请号：US15931762
申请日：2020-05-14
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Win Naing MAUNG , Bhupendra SHARMA , Huanzhang HUANG , Douglas Edward WENTE , Suzanne Mary VINING , Mustafa Ulvi ERDOGAN
Abstract: Aspects of the disclosure provide for a method. In at least some examples, the method includes receiving, at a circuit, data via a differential input signal. The method further includes detecting a falling edge in the data received via the differential input signal. The method further includes holding an output of the circuit at a final logical value of the data. The method further includes disabling a transmitter of the circuit while holding the output of the circuit at the final logical value of the data. The method further includes releasing the output of the circuit from the final logical value of the data.
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公开(公告)号：US20200057742A1
公开(公告)日：2020-02-20
申请号：US16414496
申请日：2019-05-16
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Win Naing MAUNG , Yonghui TANG , Huanzhang HUANG , Douglas Edward WENTE
Abstract: Aspects of the present disclosure provide for a system. In at least some examples, the system includes an embedded Universal Serial Bus 2 (eUSB2) device having a first receiver and a first transmitter, a processor, a second transmitter coupled to the processor, a second receiver coupled to the processor, a drive low circuit coupled to the processor second transmitter, and differential signal lines having a length greater than ten inches. The differential signal lines are coupled at a first end to the first receiver and the first transmitter and at a second end to the second transmitter and the second receiver. The processor is configured to control the drive low circuit to drive the differential signal lines low with a logic ‘0’ to cause the first receiver to receive the logic ‘0’ and a value of a signal present on the differential signal lines to reach about 0 volts.
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