公开(公告)号：US11133415B2

公开(公告)日：2021-09-28

申请号：US17007825

申请日：2020-08-31

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Jyun-Hao Lin ,  Chun-Feng Nieh ,  Yu-Chang Lin ,  Huicheng Chang

IPC: H01L29/78 ,  H01L29/10 ,  H01L29/66 ,  H01L29/08 ,  H01L29/167 ,  H01L29/36 ,  H01L21/265 ,  H01L29/165 ,  H01L27/092 ,  H01L21/8238 ,  H01L21/02 ,  H01L27/11 ,  H01L21/306

Abstract: An embodiment is a method of manufacturing a semiconductor device. The method includes forming a fin on a substrate. A gate structure is formed over the fin. A recess is formed in the fin proximate the gate structure. A gradient doped region is formed in the fin with a p-type dopant. The gradient doped region extends from a bottom surface of the recess to a vertical depth below the recess in the fin. A source/drain region is formed in the recess and on the gradient doped regions.

公开(公告)号：US10916546B2

公开(公告)日：2021-02-09

申请号：US16725553

申请日：2019-12-23

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Yu-Chang Lin ,  Chun-Feng Nieh ,  Huicheng Chang ,  Hou-Yu Chen ,  Yong-Yan Lu

IPC: H01L27/092 ,  H01L29/78 ,  H01L29/66 ,  H01L21/265 ,  H01L21/8234 ,  H01L21/8238 ,  H01L21/02 ,  H01L27/12 ,  H01L21/84 ,  H01L29/49 ,  H01L29/165

Abstract: A semiconductor device includes a substrate, a fin structure and an isolation layer formed on the substrate and adjacent to the fin structure. The semiconductor device includes a gate structure formed on at least a portion of the fin structure and the isolation layer. The semiconductor device includes an epitaxial layer including a strained material that provides stress to a channel region of the fin structure. The epitaxial layer has a first region and a second region, in which the first region has a first doping concentration of a first doping agent and the second region has a second doping concentration of a second doping agent. The first doping concentration is greater than the second doping concentration. The epitaxial layer is doped by ion implantation using phosphorous dimer.

公开(公告)号：US10515966B2

公开(公告)日：2019-12-24

申请号：US16105925

申请日：2018-08-20

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Yu-Chang Lin ,  Chun-Feng Nieh ,  Huicheng Chang ,  Hou-Yu Chen ,  Yong-Yan Lu

IPC: H01L27/092 ,  H01L29/78 ,  H01L29/66 ,  H01L21/265 ,  H01L21/8234 ,  H01L21/8238 ,  H01L21/02 ,  H01L27/12 ,  H01L29/49 ,  H01L29/165

Abstract: A semiconductor device includes a substrate, a fin structure and an isolation layer formed on the substrate and adjacent to the fin structure. The semiconductor device includes a gate structure formed on at least a portion of the fin structure and the isolation layer. The semiconductor device includes an epitaxial layer including a strained material that provides stress to a channel region of the fin structure. The epitaxial layer has a first region and a second region, in which the first region has a first doping concentration of a first doping agent and the second region has a second doping concentration of a second doping agent. The first doping concentration is greater than the second doping concentration. The epitaxial layer is doped by ion implantation using phosphorous dimer.

公开(公告)号：US20240379446A1

公开(公告)日：2024-11-14

申请号：US18782255

申请日：2024-07-24

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Yu-Chang Lin ,  Tien-Shun Chang ,  Chun-Feng Nieh ,  Huicheng Chang ,  Yee-Chia Yeo

IPC: H01L21/8234 ,  H01L21/223 ,  H01L21/265 ,  H01L21/8238 ,  H01L27/092 ,  H01L29/66 ,  H01L29/78

Abstract: A method includes forming a source/drain region in a semiconductor fin; after forming the source/drain region, implanting first impurities into the source/drain region; and after implanting the first impurities, implanting second impurities into the source/drain region. The first impurities have a lower formation enthalpy than the second impurities. The method further includes after implanting the second impurities, annealing the source/drain region.

公开(公告)号：US11935793B2

公开(公告)日：2024-03-19

申请号：US16887154

申请日：2020-05-29

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Yu-Chang Lin ,  Tien-Shun Chang ,  Chun-Feng Nieh ,  Huicheng Chang ,  Yee-Chia Yeo

IPC: H01L21/8234 ,  H01L21/223 ,  H01L21/265 ,  H01L21/336 ,  H01L21/8238 ,  H01L27/092 ,  H01L29/66 ,  H01L29/78

CPC classification number: H01L21/823431 ,  H01L21/2236 ,  H01L21/265 ,  H01L21/26506 ,  H01L21/26513 ,  H01L21/2658 ,  H01L21/823418 ,  H01L21/823814 ,  H01L21/823821 ,  H01L27/0924 ,  H01L29/66795 ,  H01L29/785 ,  H01L21/26586 ,  H01L21/823425

Abstract: A method includes forming a source/drain region in a semiconductor fin; after forming the source/drain region, implanting first impurities into the source/drain region; and after implanting the first impurities, implanting second impurities into the source/drain region. The first impurities have a lower formation enthalpy than the second impurities. The method further includes after implanting the second impurities, annealing the source/drain region.

公开(公告)号：US11776911B2

公开(公告)日：2023-10-03

申请号：US17330834

申请日：2021-05-26

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Hung-Ming Chen ,  Yu-Chang Lin ,  Chung-Ting Li ,  Jen-Hsiang Lu ,  Hou-Ju Li ,  Chih-Pin Tsao

IPC: H01L29/66 ,  H01L29/78 ,  H01L23/535 ,  H01L21/768 ,  H01L29/417

CPC classification number: H01L23/535 ,  H01L21/76841 ,  H01L21/76897 ,  H01L29/41791 ,  H01L29/66545 ,  H01L29/66795 ,  H01L29/785 ,  H01L29/7848

Abstract: A method includes forming a gate structure on a substrate; forming a gate spacer on a sidewall of the gate structure; forming a carbon-containing layer on the gate spacer; diffusing carbon from the carbon-containing layer into a portion of the substrate below the gate spacer; forming a recess in the substrate on one side of the gate spacer opposite to the gate structure; and forming an epitaxy feature in the recess of the substrate.

公开(公告)号：US20220359301A1

公开(公告)日：2022-11-10

申请号：US17869558

申请日：2022-07-20

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Yu-Chang Lin ,  Tien-Shun Chang ,  Chun-Feng Nieh ,  Huicheng Chang ,  Yee-Chia Yeo

IPC: H01L21/8234 ,  H01L21/265 ,  H01L29/66 ,  H01L29/78

Abstract: A method includes forming a source/drain region in a semiconductor fin; after forming the source/drain region, implanting first impurities into the source/drain region; and after implanting the first impurities, implanting second impurities into the source/drain region. The first impurities have a lower formation enthalpy than the second impurities. The method further includes after implanting the second impurities, annealing the source/drain region.

公开(公告)号：US20210375687A1

公开(公告)日：2021-12-02

申请号：US16887154

申请日：2020-05-29

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Yu-Chang Lin ,  Tien-Shun Chang ,  Chun-Feng Nieh ,  Huicheng Chang ,  Yee-Chia Yeo

IPC: H01L21/8234 ,  H01L21/265 ,  H01L29/66 ,  H01L29/78

Abstract: A method includes forming a source/drain region in a semiconductor fin; after forming the source/drain region, implanting first impurities into the source/drain region; and after implanting the first impurities, implanting second impurities into the source/drain region. The first impurities have a lower formation enthalpy than the second impurities. The method further includes after implanting the second impurities, annealing the source/drain region.

公开(公告)号：US11024582B2

公开(公告)日：2021-06-01

申请号：US15489905

申请日：2017-04-18

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Hung-Ming Chen ,  Yu-Chang Lin ,  Chung-Ting Li ,  Jen-Hsiang Lu ,  Hou-Ju Li ,  Chih-Pin Tsao

IPC: H01L29/76 ,  H01L23/535 ,  H01L29/66 ,  H01L29/78 ,  H01L21/768 ,  H01L29/417

Abstract: A semiconductor device includes a substrate, a carbon-containing diffusion barrier, a phosphorus-containing source/drain feature, a gate structure, and a gate spacer. The substrate has a channel region. The carbon-containing diffusion barrier is present in the substrate. The phosphorus-containing source/drain feature is present in the substrate, and the carbon-containing diffusion barrier is between the channel region and the phosphorus-containing source/drain feature. The gate is present over the channel region of the substrate. The gate spacer abuts the gate structure and is present over a portion of the phosphorus-containing source/drain feature.

公开(公告)号：US20180301417A1

公开(公告)日：2018-10-18

申请号：US15489905

申请日：2017-04-18

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Hung-Ming Chen ,  Yu-Chang Lin ,  Chung-Ting Li ,  Jen-Hsiang Lu ,  Hou-Ju Li ,  Chih-Pin Tsao

IPC: H01L23/535 ,  H01L29/06 ,  H01L29/66 ,  H01L29/78 ,  H01L21/768

Abstract: A semiconductor device includes a substrate, a carbon-containing diffusion barrier, a phosphorus-containing source/drain feature, a gate structure, and a gate spacer. The substrate has a channel region. The carbon-containing diffusion barrier is present in the substrate. The phosphorus-containing source/drain feature is present in the substrate, and the carbon-containing diffusion barrier is between the channel region and the phosphorus-containing source/drain feature. The gate is present over the channel region of the substrate. The gate spacer abuts the gate structure and is present over a portion of the phosphorus-containing source/drain feature.