公开(公告)号：US11640986B2

公开(公告)日：2023-05-02

申请号：US17363645

申请日：2021-06-30

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Yu-Chang Lin ,  Tien-Shun Chang ,  Szu-Ying Chen ,  Chun-Feng Nieh ,  Sen-Hong Syue ,  Huicheng Chang

IPC分类号： H01L29/76 ,  H01L29/66 ,  H01L27/092 ,  H01L29/78 ,  H01L21/8238 ,  H01L21/265 ,  H01L21/324

摘要： A semiconductor device, and a method of manufacturing, is provided. A dummy gate is formed on a semiconductor substrate. An interlayer dielectric (ILD) is formed over the semiconductor fin. A dopant is implanted into the ILD. The dummy gate is removed and an anneal is performed on the ILD. The implantation and the anneal lead to an enhancement of channel resistance by a reduction in interlayer dielectric thickness and to an enlargement of critical dimensions of a metal gate.

公开(公告)号：US20210328044A1

公开(公告)日：2021-10-21

申请号：US17363645

申请日：2021-06-30

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Yu-Chang Lin ,  Tien-Shun Chang ,  Szu-Ying Chen ,  Chun-Feng Nieh ,  Sen-Hong Syue ,  Huicheng Chang

IPC分类号： H01L29/66 ,  H01L27/092 ,  H01L29/78 ,  H01L21/8238 ,  H01L21/265 ,  H01L21/324

摘要： A semiconductor device, and a method of manufacturing, is provided. A dummy gate is formed on a semiconductor substrate. An interlayer dielectric (ILD) is formed over the semiconductor fin. A dopant is implanted into the ILD. The dummy gate is removed and an anneal is performed on the ILD. The implantation and the anneal lead to an enhancement of channel resistance by a reduction in interlayer dielectric thickness and to an enlargement of critical dimensions of a metal gate.

公开(公告)号：US20200058505A1

公开(公告)日：2020-02-20

申请号：US16665139

申请日：2019-10-28

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Tien-Shun Chang ,  Chun-Feng Nieh ,  Huicheng Chang

IPC分类号： H01L21/033 ,  H01L21/768 ,  H01L21/426 ,  H01L21/308 ,  H01L21/266 ,  H01L21/3215 ,  H01L21/311

摘要： Embodiments described herein relate generally to methods for forming a mask for patterning a feature in semiconductor processing. In an embodiment, a dielectric layer is formed over a substrate. A mask is formed over the dielectric layer. Forming the mask includes depositing a first layer over the dielectric layer; implanting in a first implant process a dopant species through a patterned material and into the first layer at a first energy; after implanting in the first implant process, implanting in a second implant process the dopant species through the patterned material and into the first layer at a second energy greater than the first energy; and forming mask portions of the mask comprising selectively removing portions of the first layer that are not implanted with the dopant species.

公开(公告)号：US12100738B2

公开(公告)日：2024-09-24

申请号：US18306851

申请日：2023-04-25

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Yu-Chang Lin ,  Tien-Shun Chang ,  Chun-Feng Nieh ,  Huicheng Chang

IPC分类号： H01L29/10 ,  H01L21/225 ,  H01L21/265 ,  H01L21/266 ,  H01L21/324 ,  H01L29/06 ,  H01L29/66 ,  H01L29/78

CPC分类号： H01L29/1054 ,  H01L21/2253 ,  H01L21/26513 ,  H01L21/26586 ,  H01L21/266 ,  H01L21/324 ,  H01L29/0653 ,  H01L29/6659 ,  H01L29/66795 ,  H01L29/7834 ,  H01L29/7851

摘要： A FinFET is provided including a channel region containing a constituent element and excess atoms, the constituent element belonging to a group of the periodic table of elements, wherein said excess atoms are nitrogen, or belong to said group of the periodic table of elements, and a concentration of said excess atoms in the channel region is in the range between about 1019 cm−3 and about 1020 cm−3.

公开(公告)号：US20220028707A1

公开(公告)日：2022-01-27

申请号：US16934762

申请日：2020-07-21

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Yu-Chang Lin ,  Tien-Shun Chang ,  Chun-Feng Nieh ,  Huicheng Chang ,  Yee-Chia Yeo

IPC分类号： H01L21/67 ,  H01L21/265

摘要： Embodiments of an ion cryo-implantation process utilize a post implantation heating stage to heat the implanted wafer while under the heavy vacuum used during cryo-implantation. The implanted wafer is then transferred to load locks which are held at a lesser vacuum than the heavy vacuum.

公开(公告)号：US10714344B2

公开(公告)日：2020-07-14

申请号：US16665139

申请日：2019-10-28

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Tien-Shun Chang ,  Chun-Feng Nieh ,  Huicheng Chang

IPC分类号： H01L21/033 ,  H01L21/768 ,  H01L21/311 ,  H01L21/3215 ,  H01L21/266 ,  H01L21/308 ,  H01L21/426

摘要： Embodiments described herein relate generally to methods for forming a mask for patterning a feature in semiconductor processing. In an embodiment, a dielectric layer is formed over a substrate. A mask is formed over the dielectric layer. Forming the mask includes depositing a first layer over the dielectric layer; implanting in a first implant process a dopant species through a patterned material and into the first layer at a first energy; after implanting in the first implant process, implanting in a second implant process the dopant species through the patterned material and into the first layer at a second energy greater than the first energy; and forming mask portions of the mask comprising selectively removing portions of the first layer that are not implanted with the dopant species.

公开(公告)号：US20230377913A1

公开(公告)日：2023-11-23

申请号：US18364588

申请日：2023-08-03

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Yu-Chang Lin ,  Tien-Shun Chang ,  Chun-Feng Nieh ,  Huicheng Chang ,  Yee-Chia Yeo

IPC分类号： H01L21/67 ,  H01L21/265

CPC分类号： H01L21/67098 ,  H01L21/265 ,  H01L21/67196 ,  H01L21/67213 ,  H01L21/67248 ,  H01L21/67207

摘要： Embodiments of an ion cryo-implantation process utilize a post implantation heating stage to heat the implanted wafer while under the heavy vacuum used during cryo-implantation. The implanted wafer is then transferred to load locks which are held at a lesser vacuum than the heavy vacuum.

公开(公告)号：US20230016619A1

公开(公告)日：2023-01-19

申请号：US17684876

申请日：2022-03-02

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Tien-Shun Chang ,  Yu-Kang Liu ,  Su-Hao Liu ,  Huicheng Chang ,  Yee-Chia Yeo

IPC分类号： H01J37/317 ,  H01J37/304

摘要： A method includes moving a plurality of sensors along a translation path with respect to an ion beam, acquiring sensor signals produced by the plurality of sensors, converting the acquired sensor signals into a data set representative of a two-dimensional (2D) profile of the ion beam, generating a plurality of first one-dimensional (1D) profiles of the ion beam from the data set, generating a plurality of second 1D profiles of the ion beam by spatially inverting each of the plurality of first 1D profiles, generating a plurality of third 1D profiles of the ion beam by superposing first current density values of each of the plurality of first 1D profiles with second current density values of a corresponding one of the plurality of second 1D profiles and determining whether to continue an implantation process with the ion beam in accordance with the plurality of third 1D profiles.

公开(公告)号：US11450757B2

公开(公告)日：2022-09-20

申请号：US17013615

申请日：2020-09-06

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Yu-Chang Lin ,  Chun-Feng Nieh ,  Huicheng Chang ,  Wei-Ting Chien ,  Chih-Pin Tsao ,  Hou-Ju Li ,  Tien-Shun Chang

IPC分类号： H01L29/66 ,  H01L21/8238 ,  H01L29/78 ,  H01L27/092 ,  H01L21/225 ,  H01L21/324 ,  H01L29/08

摘要： A finFET device and methods of forming a finFET device are provided. The method includes depositing a dummy gate over and along sidewalls of a fin extending upwards from a semiconductor substrate, forming a first gate spacer along a sidewall of the dummy gate, and plasma-doping the first gate spacer with carbon to form a carbon-doped gate spacer. The method further includes forming a source/drain region adjacent a channel region of the fin and diffusing carbon from the carbon-doped gate spacer into a first region of the fin to provide a first carbon-doped region. The first carbon-doped region is disposed between at least a portion of the source/drain region and the channel region of the fin.

公开(公告)号：US20230268423A1

公开(公告)日：2023-08-24

申请号：US17676637

申请日：2022-02-21

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Tien-Shun Chang ,  Kuo-Ju Chen ,  Su-Hao Liu ,  Huicheng Chang ,  Yee-Chia Yeo

IPC分类号： H01L29/66 ,  H01L27/088 ,  H01L29/78 ,  H01L29/06 ,  H01L21/8234

CPC分类号： H01L29/66795 ,  H01L27/0886 ,  H01L29/7851 ,  H01L29/0649 ,  H01L29/66545 ,  H01L21/823431 ,  H01L21/823418 ,  H01L21/823481

摘要： A method of forming a semiconductor device includes forming a first dummy gate structure over a first region of a substrate and a second dummy gate structure over a second region of the substrate, the first region and the second region of the substrate having a first composition, the first composition having a first etch rate; implanting the first region of the substrate with dopants laterally adjacent to the first dummy gate structure, wherein after the implanting the first region, the first region has a second composition having a second etch rate, the second etch rate being different from the first etch rate; etching a first recess in the first region of the substrate having the second composition and a second recess in the second region having the first composition; and epitaxially growing a first source/drain region in the first recess and a second source/drain region in the second recess.