公开(公告)号：US20250113591A1

公开(公告)日：2025-04-03

申请号：US18479005

申请日：2023-09-30

Applicant: Texas Instruments Incorporated

Inventor： Alexei Sadovnikov

IPC: H01L29/78 ,  H01L21/265 ,  H01L29/66

Abstract: A method forms an integrated circuit, by steps including, in a first implant, forming in a semiconductor substrate a first and second region of a first semiconductor type, each of the first and second region having a first dopant concentration; in a second implant, forming in the semiconductor substrate a third and fourth region of the first semiconductor type, the third region at least partially overlapping the first region and the fourth region at least partially overlapping the second region, each of the third and fourth region having a second dopant concentration different than the first dopant concentration; forming a transistor source within the first and third regions; and forming one of a diode anode or a diode cathode in the second and fourth regions.

公开(公告)号：US12218190B2

公开(公告)日：2025-02-04

申请号：US17731510

申请日：2022-04-28

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Alexei Sadovnikov ,  Guruvayurappan S. Mathur

IPC: H01L29/06 ,  H01L21/762 ,  H01L29/78

Abstract: A method of manufacturing an integrated circuit includes forming first and second false collector regions of a first conductivity type adjacent to a surface of an epitaxial layer of semiconductor material. The first false collector region is located laterally on a first side of a base region. The base region is formed within the epitaxial layer and has a second conductivity type. The second false collector region is located laterally on a second side of the base region. The second side is opposite the first side of the base region. The base region is a base of a parasitic bipolar junction in an isolation region of an active semiconductor device.

公开(公告)号：US12136625B2

公开(公告)日：2024-11-05

申请号：US17512908

申请日：2021-10-28

Applicant: Texas Instruments Incorporated

Inventor： Pushpa Mahalingam ,  Alexei Sadovnikov

IPC: H01L27/092 ,  H01L21/265 ,  H01L21/266 ,  H01L21/8238

Abstract: A microelectronic device including an analog MOS transistor. The analog transistor has a body well having a first conductivity type in a semiconductor material of a substrate of the microelectronic device. The body well extends deeper in the substrate than a field relief dielectric layer at the top surface of the semiconductor material. The analog transistor has a drain well and a source well having a second, opposite, conductivity type in the semiconductor material, both contacting the body well. The drain well and the source well extend deeper in the substrate than the field relief dielectric layer. The analog transistor has a gate on a gate dielectric layer over the body well. The drain well and the source well extend partway under the gate at the top surface of the semiconductor material.

公开(公告)号：US20240290844A1

公开(公告)日：2024-08-29

申请号：US18652020

申请日：2024-05-01

Applicant: Texas Instruments Incorporated

Inventor： Mahalingam Nandakumar ,  Alexei Sadovnikov ,  Henry Litzmann Edwards ,  Jarvis Benjamin Jacobs

IPC: H01L29/26 ,  H01L21/8238 ,  H01L27/092 ,  H01L29/66 ,  H01L29/78

CPC classification number: H01L29/26 ,  H01L21/823892 ,  H01L27/092 ,  H01L29/66659 ,  H01L29/66681 ,  H01L29/7816 ,  H01L29/7835

Abstract: A semiconductor device including drain extended metal oxide semiconductor field effect transistor (MOSFET) includes a source region and a drain region each having a first dopant type spaced apart along a surface of a semiconductor material having a second opposite conductivity type. A gate electrode over the semiconductor material surface between the source region and the drain region. A diffusion suppression implant region in the semiconductor material extends from the source region under the gate electrode. The diffusion suppression implant region includes a body region having the second opposite conductivity type and comprises at least one of carbon, nitrogen, and fluorine.

公开(公告)号：US20240088305A1

公开(公告)日：2024-03-14

申请号：US18514413

申请日：2023-11-20

Applicant: Texas Instruments Incorporated

Inventor： Umamaheswari Aghoram ,  Akram Ali Salman ,  Binghua Hu ,  Alexei Sadovnikov

IPC: H01L29/866 ,  H01L27/02 ,  H01L29/66

CPC classification number: H01L29/866 ,  H01L27/0255 ,  H01L29/66106 ,  H01L27/0259

Abstract: A semiconductor device which includes two or more integrated deep trench features configured as a Zener diode. The Zener diode includes a plurality of deep trenches extending into semiconductor material of the substrate and a dielectric deep trench liner that includes a dielectric material. The deep trench further includes a doped sheath contacting the deep trench liner and an electrically conductive deep trench filler material within the deep trench. The doped sheath of adjacent deep trenches overlap and form a region of higher doping concentration which sets the breakdown voltage of the Zener diode. The Zener diode can be used as a triggering diode to limit the voltage on other components in a semiconductor device.

公开(公告)号：US20230317775A1

公开(公告)日：2023-10-05

申请号：US17731510

申请日：2022-04-28

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Alexei Sadovnikov ,  Guruvayurappan S. Mathur

IPC: H01L29/06 ,  H01L21/762

CPC classification number: H01L29/0623 ,  H01L21/76202 ,  H01L21/76232 ,  H01L29/063 ,  H01L29/7823

Abstract: A method of manufacturing an integrated circuit includes forming first and second false collector regions of a first conductivity type adjacent to a surface of an epitaxial layer of semiconductor material. The first false collector region is located laterally on a first side of a base region. The base region is formed within the epitaxial layer and has a second conductivity type. The second false collector region is located laterally on a second side of the base region. The second side is opposite the first side of the base region. The base region is a base of a parasitic bipolar junction in an isolation region of an active semiconductor device.

公开(公告)号：US20230136827A1

公开(公告)日：2023-05-04

申请号：US17515531

申请日：2021-10-31

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Gang Xue ,  Pushpa Mahalingam ,  Alexei Sadovnikov

IPC: H01L29/78 ,  H01L29/423 ,  H01L29/45 ,  H01L29/66

Abstract: Described examples include an integrated circuit having a transistor with a first gate on a first gate insulating layer. The transistor also has second gate separated from the first gate by a gate gap. The integrated circuit also includes a channel well at the gate gap extending under the first gate and the second gate. The transistor has a first source in the channel adjacent to an edge of the first gate. The transistor having a second source formed in the channel adjacent to an edge of the second gate separated from the first source by a channel gap. The transistor has at least one back-gate contact, the at least one back-gate contact separated from the first gate by a first back-gate contact gap and separated from the second gate by a second back-gate contact gap.

公开(公告)号：US20230066563A1

公开(公告)日：2023-03-02

申请号：US17459991

申请日：2021-08-27

Applicant: Texas Instruments Incorporated

Inventor： Umamaheswari Aghoram ,  Akram Ali Salman ,  Binghua Hu ,  Alexei Sadovnikov

IPC: H01L29/866 ,  H01L27/02 ,  H01L29/66

Abstract: A semiconductor device which includes two or more integrated deep trench features configured as a Zener diode. The Zener diode includes a plurality of deep trenches extending into semiconductor material of the substrate and a dielectric deep trench liner that includes a dielectric material. The deep trench further includes a doped sheath contacting the deep trench liner and an electrically conductive deep trench filler material within the deep trench. The doped sheath of adjacent deep trenches overlap and form a region of higher doping concentration which sets the breakdown voltage of the Zener diode. The Zener diode can be used as a triggering diode to limit the voltage on other components in a semiconductor device.

公开(公告)号：US20210242308A1

公开(公告)日：2021-08-05

申请号：US16781674

申请日：2020-02-04

Applicant: Texas Instruments Incorporated

Inventor： Alexei Sadovnikov ,  Natalia Lavrovskaya

IPC: H01L29/08 ,  H01L29/36 ,  H01L29/66 ,  H01L29/732 ,  H01L21/8249 ,  H01L29/10 ,  H01L27/06 ,  H01L21/265 ,  H01L21/266

Abstract: A semiconductor device includes a bipolar junction transistor having a collector, a base, and an emitter. The collector includes a current collection region, a constriction region laterally adjacent to the current collection region, and a contact region laterally adjacent to the constriction region, located opposite from the current collection region. The current collection region, the constriction region laterally, and the contact region all have the same conductivity type. The base includes a current transmission region contacting the current collection region and a constricting well laterally adjacent to, and contacting, the current transmission region and contacting the constriction region. The current transmission region and the constricting well have an opposite conductivity type than the current collection region, the constriction region laterally, and the contact region.

公开(公告)号：US11024649B2

公开(公告)日：2021-06-01

申请号：US16829970

申请日：2020-03-25

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Alexei Sadovnikov ,  Jeffrey A. Babcock

IPC: H01L21/70 ,  H01L27/12 ,  H01L29/06 ,  H01L29/08 ,  H01L27/082 ,  H01L29/66 ,  H01L29/732 ,  H01L29/10 ,  H01L23/535 ,  H01L29/735

Abstract: Complementary high-voltage bipolar transistors in silicon-on-insulator (SC) integrated circuits is disclosed. In one disclosed embodiment, a collector region is formed in an epitaxial silicon layer disposed over a buried insulator layer. A base region and an emitter are disposed over the collector region. An n-type region is formed under the buried insulator layer (BOX) by implanting donor impurity through the active region of substrate and BOX into a p-substrate. Later in the process flow this n-type region is connected from the top by doped poly-silicon plug and is biased at Vcc. In this case it will deplete lateral portion of PNP collector region and hence, will increase its BV.