公开(公告)号：US20100135988A1

公开(公告)日：2010-06-03

申请号：US12585882

申请日：2009-09-28

申请人： Toshio Doi ,  Hideharu Abe

发明人： Toshio Doi ,  Hideharu Abe

IPC分类号： A61K39/395 ,  C12Q1/00 ,  C12Q1/68 ,  G01N33/53 ,  C12Q1/48 ,  G01N33/561 ,  A61K31/7088

CPC分类号： C12Q1/6883 ,  A61K45/06 ,  C07K16/2863 ,  C07K2317/76 ,  C12Q2600/106 ,  C12Q2600/158 ,  G01N33/6893 ,  G01N2333/4703 ,  G01N2333/4706 ,  G01N2333/51 ,  G01N2333/71

摘要： A method of detecting proliferative diseases causing sclerosis, comprising measuring the expression of at least one substance selected from the group consisting of STAT3, phosphorylated STAT3, Smad1, phosphorylated Smad1, activin receptor-like kinase 1, activin receptor-like kinase 3 and bone morphogenetic proteins in a biological sample. A kit therefor. A prophylactic and/or therapeutic agent for proliferative diseases causing sclerosis, comprising as an active ingredient a substance having an inhibitory effect on the expression of at least one substance selected from the group consisting of STAT3, phosphorylated STAT3, Smad1 and phosphorylated Smad1. A method of identifying substances effective in preventing and/or treating proliferative diseases causing sclerosis, comprising judging whether or not a test substance inhibits the expression of at least one substance selected from the group consisting of STAT3, phosphorylated STAT3, Smad1 and phosphorylated Smad1. A kit therefor.

摘要翻译： 一种检测引起硬化的增殖性疾病的方法，包括测量选自STAT3，磷酸化STAT3，Smad1，磷酸化Smad1，激活素受体样激酶1，激活素受体样激酶3和骨形态发生的至少一种物质的表达 生物样品中的蛋白质。 一个套件。 一种引起硬化的增殖性疾病的预防和/或治疗剂，其包含作为活性成分的对STAT3，磷酸化STAT3，Smad1和磷酸化Smad1中选择的至少一种物质的表达具有抑制作用的物质。 鉴定有效预防和/或治疗引起硬化的增殖性疾病的物质的方法，包括判断测试物质是否抑制至少一种选自STAT3，磷酸化STAT3，Smad1和磷酸化Smad1的物质的表达。 一个套件。

公开(公告)号：US20070053360A1

公开(公告)日：2007-03-08

申请号：US11488005

申请日：2006-07-18

申请人： Shunsuke Hino ,  Toshio Doi ,  Motoyuki Unno

发明人： Shunsuke Hino ,  Toshio Doi ,  Motoyuki Unno

IPC分类号： H04L12/56

CPC分类号： H04L12/10 ,  H04L41/08 ,  H04L43/0876 ,  H04L43/16

摘要： There is provided a network connection apparatus including a plurality of line connection parts 201 connected to network lines 111 to transmit and receive packets, a transmission destination decision part 104 for deciding a transmission destination on the basis of header information of packet received by a first one of the plurality of line connection parts, a packet transfer part 103 for transferring packets to a second line connection destination corresponding to the transmission destination decided by the transmission destination decision part, a power supply part 102 for supplying power to the line connection parts and a power control part 203 for controlling supply of power to each of the line connection parts from the power supply part.

摘要翻译： 提供了一种网络连接装置，包括连接到网络线111以发送和接收分组的多个线路连接部分201，用于基于由第一个分组接收的分组的报头信息来确定发送目的地的发送目的地判定部分104 多个线路连接部分的分组传送部分103，用于将分组传送到与由发送目的地决定部分确定的发送目的地相对应的第二线路连接目的地的分组传送部分103，用于向线路连接部分供电的电源部分102 功率控制部203，用于控制从电源部向每个线路连接部供电。

公开(公告)号：US5901949A

公开(公告)日：1999-05-11

申请号：US923365

申请日：1997-09-04

申请人： Takayoshi Muranaka ,  Hiroshi Miyawaki ,  Masanori Nakano ,  Toshio Doi ,  Kozo Mano

发明人： Takayoshi Muranaka ,  Hiroshi Miyawaki ,  Masanori Nakano ,  Toshio Doi ,  Kozo Mano

IPC分类号： G03D15/00 ,  G03D15/10 ,  B65H39/06

CPC分类号： G03D15/005 ,  B65H2405/551

摘要： A photograph collating system for combining and collating negative films and prints. The system includes a conveyer mechanism (70) extending through a negative film intake station (71) for receiving the negative films from a negative film outlet (60), a print intake station (73) for receiving the prints from a print outlet (50), and a collating station (74) for collating the negative films and prints.The conveyer mechanism (70) includes trays (100) for transporting the negative films (2) and the prints (3), a guide circuit (80) defining a transport passage of the trays, and a drive device (90) for moving the trays along the guide circuit (80). Each of the trays having moved to the collating station (74) is disengaged from the drive device by contact with a preceding one of the trays in a direction of transport.

摘要翻译： 一种用于组合和整理底片和印花的照片整理系统。 该系统包括一个延伸穿过负片进纸台（71）的输送机构（70），用于从负片出口（60）接收负片，一个用于从打印出口（50）接收打印件的打印进纸台 ）和用于整理负片和打印件的对照台（74）。 传送机构（70）包括用于传送负片（2）和打印件（3）的托盘（100），限定托盘的传送通道的引导电路（80）和驱动装置 托盘沿引导电路（80）。 已经移动到对照站（74）的每个托盘通过与传送方向上的前一个托盘接触而从驱动装置脱离。

公开(公告)号：US5323175A

公开(公告)日：1994-06-21

申请号：US822483

申请日：1992-01-17

申请人： Toshio Doi ,  Shigeo Mizugaki ,  Yoshinori Hayashi

发明人： Toshio Doi ,  Shigeo Mizugaki ,  Yoshinori Hayashi

IPC分类号： G06F3/153 ,  G06F12/04 ,  G09G5/22 ,  G09G5/24 ,  G09G1/14

CPC分类号： G09G5/24

摘要： In order to reduce the capacity of a character ROM without reducing the character information, n-bit bit pattern data and sequence data having information necessary for composing n-bit m components are stored in first memory means (character ROM). Second memory means has addresses corresponding to each display position on the screen and holds addresses for the first memory means as a data. In accordance with the address from the second memory means and the sequence data from the first memory means, address modifying means produces an address of a scanning line with respect to pertinent character for the first memory means. According to this address, the bit pattern data is read out from the first memory means.

摘要翻译： 为了在不减少字符信息的情况下降低字符ROM的容量，将具有组成n位m分量所需的信息的n位位模式数据和序列数据存储在第一存储装置（字符ROM）中。 第二存储器装置具有与屏幕上的每个显示位置相对应的地址，并且将第一存储器装置的地址保存为数据。 根据来自第二存储器装置的地址和来自第一存储装置的序列数据，地址修改装置产生关于第一存储装置的相关字符的扫描行的地址。 根据该地址，从第一存储装置读出位模式数据。

公开(公告)号：US20120188874A1

公开(公告)日：2012-07-26

申请号：US13357927

申请日：2012-01-25

申请人： TAKESHI KUMAGAI ,  Nobuhito Matsuyama ,  Takeshi Aimoto ,  Toshio Doi ,  Kazuo Sugai

发明人： TAKESHI KUMAGAI ,  Nobuhito Matsuyama ,  Takeshi Aimoto ,  Toshio Doi ,  Kazuo Sugai

IPC分类号： H04L12/26 ,  H04L12/56

CPC分类号： H04L47/6275 ,  H04L47/2441 ,  H04L47/60 ,  H04L49/9036

摘要： A relay device of relaying a communication packet is disclosed, which comprises: an input module configured to receive the communication packet as an input; a buffer configured to have a plurality of queues and temporarily accumulated the received communication packet; a sorter configured to sort the received communication packet to one of the plurality of queues, depending on a specific value obtained by a predetermined function that gives an aggregate output from an input which is transfer information regarding transfer of the communication packet; and a band controller configured to control a bandwidth for each of the plurality of queues and output communication packets accumulated in the plurality of queues for transmission of the communication packets. This ensures the quality of service, while saving the capacity of the buffer used for the queues.

摘要翻译： 公开了一种中继通信分组的中继装置，包括：输入模块，用于接收通信分组作为输入; 配置为具有多个队列并临时累积所接收的通信分组的缓冲器; 分拣机，被配置为根据通过给出来自关于通信分组的传送的传输的信息的输入的聚合输出的预定功能获得的特定值，将接收到的通信分组排序到多个队列中的一个队列; 以及频带控制器，被配置为控制所述多个队列中的每一个的带宽，并且输出在所述多个队列中累积的通信分组，以发送所述通信分组。 这确保了服务质量，同时节省了用于队列的缓冲区的容量。

公开(公告)号：US07764599B2

公开(公告)日：2010-07-27

申请号：US11672152

申请日：2007-02-07

申请人： Toshio Doi ,  Yukimasa Komahara

发明人： Toshio Doi ,  Yukimasa Komahara

IPC分类号： G01R31/08

CPC分类号： H04L45/22 ,  H04L45/00 ,  H04L45/02 ,  H04L45/28 ,  H04L45/54

摘要： A network routing device according to the invention transmits a packet via a second port based upon destination information included in the packet received via a first port referring to a routing table. In addition, the network routing device calculates beforehand a third port which is a transfer destination when a fault occurs in a destination connected to the second port. Further, the network routing device holds scenario information including a combination of the second port and the third port and updates the routing table based upon the scenario information when a fault is detected in either of the ports.

摘要翻译： 根据本发明的网络路由设备基于参考路由表经由第一端口接收的分组中包括的目的地信息经由第二端口发送分组。 此外，网络路由装置在连接到第二端口的目的地中发生故障时，预先计算作为传送目的地的第三端口。 此外，网络路由设备保存包括第二端口和第三端口的组合的场景信息，并且当在任一端口中检测到故障时，基于场景信息来更新路由表。

公开(公告)号：US06864247B2

公开(公告)日：2005-03-08

申请号：US10314389

申请日：2002-12-09

申请人： Toshio Doi

发明人： Toshio Doi

IPC分类号： A61K31/593 ,  A61P13/12 ,  A01N45/00

CPC分类号： A61K31/593

摘要： An object of the present invention is to provide pharmaceutical compositions for inhibiting mesangial cell proliferation or mesangial matrix production without causing hypercalcemia.According to the present invention, therapeutic agents for glomerulosclerosis containing 1α,3β-dihydroxy-20α-(3-hydroxy-3-methylbutyloxy)-9,10-seco-5,7,10 (19)-pregnatriene as an active ingredient are provided.

摘要翻译： 本发明的目的是提供用于抑制肾小球系膜细胞增殖或肾小球系膜基质产生而不引起高钙血症的药物组合物。根据本发明，含有1α，3β-二羟基-20α-（3-羟基-3- 甲基丁氧基）-9,10-仲-5,7,10（19） - 三孕烯作为活性成分。

公开(公告)号：US06506741B1

公开(公告)日：2003-01-14

申请号：US09959898

申请日：2001-11-13

申请人： Toshio Doi

发明人： Toshio Doi

IPC分类号： A01N4500

CPC分类号： A61K31/593

摘要： An object of the present invention is to provide pharmaceutical compositions for inhibiting mesangial cell proliferation or mesangial matrix production without causing hypercalcemia. According to the present invention, therapeutic agents for glomerulosclerosis containing 1&agr;,3&bgr;-dihydroxy-20&agr;-(3-hydroxy-3-methylbutyloxy)-9,10-seco-5,7,10 (19)-pregnatriene as an active ingredient are provided.

摘要翻译： 本发明的目的是提供用于抑制肾小球系膜细胞增殖或肾小球系膜基质产生而不引起高钙血症的药物组合物。根据本发明，含有1α，3β-二羟基-20α-（3-羟基-3- 甲基丁氧基）-9,10-仲-5,7,10（19） - 三孕烯作为活性成分。

公开(公告)号：US5669012A

公开(公告)日：1997-09-16

申请号：US720455

申请日：1996-09-30

申请人： Toru Shimizu ,  Shunichi Iwata ,  Toshio Doi ,  Shigeo Mizugaki

发明人： Toru Shimizu ,  Shunichi Iwata ,  Toshio Doi ,  Shigeo Mizugaki

IPC分类号： G06F7/00 ,  G06F9/30 ,  G06F9/305 ,  G06F9/308 ,  G06F9/315 ,  G06F9/34 ,  G06F9/35

CPC分类号： G06F9/30018 ,  G06F9/30032 ,  G06F9/30167

摘要： A data processor being provided with a microdecoder which decodes instruction codes comprising two operation code parts, a source operand specifying part and a destination operand specifying part, wherein an optional bit area of source data (a register of a general register file or a memory) is inserted in an optional bit area (determined by the value of the first operation code part) of a destination register according to the decoding result, and an optional bit area (determined by the value of the second operation code part) of a source register is extracted and stored in an optional bit area of destination (a register of the general register file or the memory), thereby making it possible to "process the insertion and extraction operations to and from optional byte positions of registers" at a high speed with short instruction code size.

摘要翻译： 一种数据处理器，其具有对包括两个操作码部分的指令代码，源操作数指定部分和目的地操作数指定部分进行解码的微解码器，其中源数据的可选位区（通用寄存器文件或存储器的寄存器） 根据解码结果插入到目的地寄存器的可选位区域（由第一操作码部分的值确定）和源寄存器的可选位区域（由第二操作码部分的值确定） 被提取并存储在目的地的可选位区（通用寄存器文件或存储器的寄存器）中，从而使得可以以高速“处理到寄存器的可选字节位置的插入和提取操作”成为可能， 短指令代码大小。

公开(公告)号：US5223733A

公开(公告)日：1993-06-29

申请号：US793296

申请日：1991-11-14

申请人： Toshio Doi ,  Takehisa Hayashi ,  Kenichi Ishibashi ,  Mitsuo Asai

发明人： Toshio Doi ,  Takehisa Hayashi ,  Kenichi Ishibashi ,  Mitsuo Asai

IPC分类号： H01L23/522 ,  H01L27/02

CPC分类号： H01L23/5225 ,  H01L27/0207 ,  H01L2924/0002 ,  H01L2924/3011

摘要： A semiconductor integrated circuit device is provided which include a plurality of cell columns each having a number of unit cells previously fabricated on a semiconductor substrate selected from the plural kinds of unit cells which are formed in desired circuits by electrically connecting circuit devices previously arranged. Each column includes at least one kind of unit cell of a dynamic circuit which has a node in a floating state during the operation of the cell unit. A fixed potential shield layer is also provided on the cell columns so as to cover the nodes of the dynamic circuits. By virtue of this, a wiring area for electrically connecting the desired cell units can be located between the cell columns and above the shield layer. In other words, signal wirings in the wiring area can pass over the nodes of the dynamic circuits. without adverse parasitic effects. The unit cell can also be provided with a precharge circuit comprising a standard cell and an in-cell wiring layer. Further, clock input terminals of the unit cells which are provided with a precharge circuit can be divided into plural groups, with all of said clock input terminals belonging to the same group and having equal load capacitances being connected. Clock buffer cells can be provided for supplying clock signals to the clock signal wirings for each group.

摘要翻译： 提供了一种半导体集成电路器件，其包括多个单元列，每个单元列具有预先制造在半导体衬底上的多个单元电池，半导体衬底选自通过电连接先前布置的电路元件而形成在期望电路中的多种单元电池。 每列包括在单元单元的操作期间具有处于浮置状态的节点的动态电路的至少一种单元。 固定电位屏蔽层也设置在单元列上，以覆盖动态电路的节点。 由此，用于电连接所需单元单元的布线区域可以位于单元列之间并且位于屏蔽层之上。 换句话说，布线区域中的信号布线可以通过动态电路的节点。 无不良寄生效应。 单元电池还可以设置有包括标准单元和单元内布线层的预充电电路。 此外，设置有预充电电路的单元电池的时钟输入端子可以被分成多组，所有的所述时钟输入端子都属于同一组并具有相等的负载电容。 可以提供时钟缓冲单元，用于将时钟信号提供给每个组的时钟信号布线。