公开(公告)号：US20240315095A1

公开(公告)日：2024-09-19

申请号：US18135741

申请日：2023-04-18

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Chuan-Lan Lin ,  Yu-Ping Wang ,  Chien-Ting Lin ,  Chu-Fu Lin ,  Chun-Ting Yeh ,  Chung-Hsing Kuo ,  Yi-Feng Hsu

IPC: H10K59/131

CPC classification number: H10K59/131

Abstract: A semiconductor device includes a substrate having a bonding area and a pad area, a first inter-metal dielectric (IMD) layer on the substrate, a metal interconnection in the first IMD layer, a first pad on the bonding area and connected to the metal interconnection, and a second pad on the pad area and connected to the metal interconnection. Preferably, the first pad includes a first portion connecting the metal interconnection and a second portion on the first portion, and the second pad includes a third portion connecting the metal interconnection and a fourth portion on the third portion, in which top surfaces of the second portion and the fourth portion are coplanar.

公开(公告)号：US11557558B2

公开(公告)日：2023-01-17

申请号：US16984601

申请日：2020-08-04

Applicant: United Microelectronics Corp.

Inventor： Zhirui Sheng ,  Hui-Ling Chen ,  Chung-Hsing Kuo ,  Chun-Ting Yeh ,  Ming-Tse Lin ,  Chien En Hsu

IPC: H01L21/66 ,  H01L23/00 ,  H01L25/065 ,  H01L25/00

Abstract: A structure of semiconductor device is provided, including a first circuit structure, formed on a first substrate. A first test pad is disposed on the first substrate. A second circuit structure is formed on a second substrate. A second test pad is disposed on the second substrate. A first bonding pad of the first circuit structure is bonded to a second bonding pad of the second circuit structure. One of the first test pad and the second test pad is an inner pad while another one of the first test pad and the second test pad is an outer pad, wherein the outer pad surrounds the inner pad.

公开(公告)号：US11450633B2

公开(公告)日：2022-09-20

申请号：US16781937

申请日：2020-02-04

Applicant: United Microelectronics Corp.

Inventor： Ming-Tse Lin ,  Chung-Hsing Kuo ,  Hui-Ling Chen

IPC: H01L23/00

Abstract: A package structure of a semiconductor device includes a first substrate, a second substrate, and a bonding layer. The bonding layer bonds the first substrate and the second substrate. The bonding layer includes an inner bonding pad pattern and an outer bonding pad pattern formed in a dielectric layer. The outer bonding pad pattern surrounds the inner bonding pad pattern. A first bonding pad density of the outer bonding pad pattern is greater than a second bonding pad density of the inner bonding pad pattern.

公开(公告)号：US11164822B1

公开(公告)日：2021-11-02

申请号：US17035385

申请日：2020-09-28

Applicant: United Microelectronics Corp.

Inventor： Chung-Hsing Kuo ,  Chun-Ting Yeh ,  Ming-Tse Lin ,  Hui-Ling Chen ,  Chien-Ming Lai

IPC: H01L23/544 ,  H01L23/488 ,  H01L23/00

Abstract: A structure of semiconductor device is provided. The structure includes a first bonding pattern, formed on a first substrate. A first grating pattern is disposed on the first substrate, having a plurality of first bars extending along a first direction. A second bonding pattern is formed on a second substrate. A second grating pattern, disposed on the second substrate, having a plurality of second bars extending along the first direction. The first bonding pattern is bonded to the second bonding pattern. One of the first grating pattern and the second grating pattern is stacked over and overlapping at the first direction with another one of the first grating pattern and the second grating pattern. A first gap between adjacent two of the first bars is different from a second gap between adjacent two of the second bars.

公开(公告)号：US20210202418A1

公开(公告)日：2021-07-01

申请号：US16781937

申请日：2020-02-04

Applicant: United Microelectronics Corp.

Inventor： MING-TSE LIN ,  Chung-Hsing Kuo ,  Hui-Ling Chen

IPC: H01L23/00

Abstract: A package structure of a semiconductor device includes a first substrate, a second substrate, and a bonding layer. The bonding layer bonds the first substrate and the second substrate. The bonding layer includes an inner bonding pad pattern and an outer bonding pad pattern formed in a dielectric layer. The outer bonding pad pattern surrounds the inner bonding pad pattern. A first bonding pad density of the outer bonding pad pattern is greater than a second bonding pad density of the inner bonding pad pattern.