公开(公告)号：US20210143214A1

公开(公告)日：2021-05-13

申请号：US16699758

申请日：2019-12-02

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Kuo-Hsing Lee ,  Sheng-Yuan Hsueh ,  Ting-Hsiang Huang

IPC: H01L27/22 ,  H01L29/417 ,  H01L23/538 ,  H01L43/12

Abstract: An embedded MRAM structure includes a substrate divided into a memory cell region and a logic device region. An active area is disposed in the memory cell region. A word line is disposed on the substrate and crosses the active area. A source plug is disposed in the active area and at one side of the word line. A drain plug is disposed in the in the active area and at another side of the word line. When viewing from a direction perpendicular to the top surface of the substrate and taking the word line as a symmetric axis, the source plug is a mirror image of the drain plug.

公开(公告)号：US10991757B2

公开(公告)日：2021-04-27

申请号：US16430437

申请日：2019-06-04

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Ting-Hsiang Huang ,  Yi-Chung Sheng ,  Sheng-Yuan Hsueh ,  Kuo-Hsing Lee ,  Chih-Kai Kang

IPC: H01L27/22 ,  H01L43/08 ,  H01L43/02

Abstract: A semiconductor device includes: a substrate having a magnetic tunneling junction (MTJ) region and a logic region; a magnetic tunneling junction (MTJ) on the MTJ region, wherein a top view of the MTJ comprises a circle; and a first metal interconnection on the MTJ. Preferably, a top view of the first metal interconnection comprises a flat oval overlapping the circle.

公开(公告)号：US20250107101A1

公开(公告)日：2025-03-27

申请号：US18974816

申请日：2024-12-10

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Ting-Hsiang Huang ,  Yi-Chung Sheng ,  Sheng-Yuan Hsueh ,  Kuo-Hsing Lee ,  Chih-Kai Kang

IPC: H10B61/00 ,  H10N50/10 ,  H10N50/80

Abstract: A semiconductor device includes a substrate having a magnetic tunneling junction (MTJ) region and a logic region, a magnetic tunneling junction (MTJ) on the MTJ region and a first metal interconnection on the MTJ. Preferably, a top view of the MTJ includes a circle and a top view of the first metal interconnection includes an ellipse overlapping the circle.

公开(公告)号：US20240130140A1

公开(公告)日：2024-04-18

申请号：US18395762

申请日：2023-12-26

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Ting-Hsiang Huang ,  Yi-Chung Sheng ,  Sheng-Yuan Hsueh ,  Kuo-Hsing Lee ,  Chih-Kai Kang

IPC: H10B61/00 ,  H10N50/10 ,  H10N50/80

CPC classification number: H10B61/10 ,  H10N50/10 ,  H10N50/80

Abstract: A semiconductor device includes a substrate having a magnetic tunneling junction (MTJ) region and a logic region, a magnetic tunneling junction (MTJ) on the MTJ region and a first metal interconnection on the MTJ. Preferably, a top view of the MTJ includes a circle and a top view of the first metal interconnection includes an ellipse overlapping the circle.

公开(公告)号：US11271154B2

公开(公告)日：2022-03-08

申请号：US16529740

申请日：2019-08-01

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Chih-Wei Kuo ,  Ting-Hsiang Huang ,  Yu-Tsung Lai ,  Jiunn-Hsiung Liao

IPC: H01L45/00 ,  H01L43/02 ,  H01L41/297

Abstract: A magnetic tunnel junction (MTJ) device includes two magnetic tunnel junction elements and a metal interconnection. The two magnetic tunnel junction elements are arranged side by side at a first direction. The metal interconnection is disposed between the magnetic tunnel junction elements, wherein the metal interconnection includes a contact plug part having a long shape at a top view, and the long shape has a length at a second direction larger than a width at the first direction, wherein the second direction is orthogonal to the first direction.

公开(公告)号：US10985211B1

公开(公告)日：2021-04-20

申请号：US16699758

申请日：2019-12-02

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Kuo-Hsing Lee ,  Sheng-Yuan Hsueh ,  Ting-Hsiang Huang

IPC: H01L27/22 ,  H01L43/12 ,  H01L23/538 ,  H01L29/417

Abstract: An embedded MRAM structure includes a substrate divided into a memory cell region and a logic device region. An active area is disposed in the memory cell region. A word line is disposed on the substrate and crosses the active area. A source plug is disposed in the active area and at one side of the word line. A drain plug is disposed in the in the active area and at another side of the word line. When viewing from a direction perpendicular to the top surface of the substrate and taking the word line as a symmetric axis, the source plug is a mirror image of the drain plug.