公开(公告)号：US20070166854A1

公开(公告)日：2007-07-19

申请号：US11717739

申请日：2007-03-14

申请人： Howard Rhodes

发明人： Howard Rhodes

IPC分类号： H01L21/00

CPC分类号： H01L27/14618 ,  H01L21/76819 ,  H01L21/76837 ,  H01L27/14609 ,  H01L27/14621 ,  H01L27/14627 ,  H01L27/14687 ,  H01L2924/0002 ,  H01L2924/00

摘要： A pixel cell is formed by locating a first passivation layer over the final layer of metal lines. Subsequently, the uneven, non-uniform passivation layer is subjected to a planarization process such as chemical mechanical polishing, mechanical abrasion, or etching. A spin-on-glass layer may be deposited over the non-uniform passivation layer prior to planarization. Once a uniform, flat first passivation layer is achieved over the final metal, a second passivation layer, a color filter array, or a lens forming layer with uniform thickness is formed over the first passivation layer. The passivation layers can be oxide, nitride, a combination of oxide and nitride, or other suitable materials. The color filter array layer may also undergo a planarization process prior to formation of the lens forming layer. The present invention is also applicable to other devices.

摘要翻译： 通过在金属线的最终层上定位第一钝化层来形成像素单元。 随后，对不均匀的不均匀的钝化层进行化学机械抛光，机械磨蚀或蚀刻等平面化处理。 在平坦化之前，可以在非均匀钝化层上沉积旋涂玻璃层。 一旦在最终金属上实现均匀的平坦的第一钝化层，则在第一钝化层上形成第二钝化层，滤色器阵列或具有均匀厚度的透镜形成层。 钝化层可以是氧化物，氮化物，氧化物和氮化物的组合，或其它合适的材料。 在形成透镜形成层之前，滤色器阵列层也可以进行平坦化处理。 本发明也适用于其他装置。

公开(公告)号：US20070096241A1

公开(公告)日：2007-05-03

申请号：US11589206

申请日：2006-10-30

申请人： Howard Rhodes

发明人： Howard Rhodes

IPC分类号： H01L31/06

CPC分类号： H01L27/14609 ,  H01L27/14603 ,  H01L27/14689 ,  H01L31/035272

摘要： A pixel cell with controlled leakage is formed by modifying the location and gate profile of a high dynamic range (HDR) transistor. The HDR transistor may have the gate profile of a transfer gate or a reset gate. The HDR transistor may be located on a side of the photodiode that is the same, opposite to, or perpendicular to the transfer gate. The leakage through the HDR transistor may be controlled by modifying the photodiode implants around the transistor. The photodiode implants at the HDR transistor may be placed similarly to the implants at the transfer gate. However, when the photodiode implants are moved away from the HDR transistor, leakage is reduced. When the photodiode implants are moved farther under the HDR transistor, leakage is increased to the extent desirable. The leakage through the HDR transistor may also be controlled by applying a voltage across the transistor.

摘要翻译： 具有受控泄漏的像素单元通过修改高动态范围（HDR）晶体管的位置和栅极分布来形成。 HDR晶体管可以具有传输门或复位栅的栅极分布。 HDR晶体管可以位于与传输门相同或垂直的光电二极管的一侧。 可以通过修改晶体管周围的光电二极管植入来控制通过HDR晶体管的泄漏。 在HDR晶体管处的光电二极管植入物可以类似于在传输门处的植入物放置。 然而，当光电二极管植入物远离HDR晶体管时，漏电减少。 当光电二极管植入物在HDR晶体管下移动得更远时，泄漏增加到期望的程度。 也可以通过在晶体管两端施加电压来控制通过HDR晶体管的泄漏。

公开(公告)号：US20070063301A1

公开(公告)日：2007-03-22

申请号：US11600891

申请日：2006-11-17

申请人： Howard Rhodes ,  Richard Mauritzson ,  William Quinlin

发明人： Howard Rhodes ,  Richard Mauritzson ,  William Quinlin

IPC分类号： H01L31/00

CPC分类号： H01L27/14603 ,  H01L27/14607 ,  H01L27/14609 ,  H01L27/1463 ,  H01L27/14645 ,  H01L27/14654 ,  H01L27/14689

摘要： Embodiments of the invention provide an image sensor that includes a barrier region for isolating devices. The image sensor comprises a substrate and an array of pixel cells formed on the substrate. Each pixel cell comprises a photo-conversion device. The array comprises a first pixel cell having a first configuration, a second pixel cell having a second configuration, and at least one barrier region formed between the first and second pixel cells for capturing and removing charge. The barrier region comprises a charge accumulation region of a particular conductivity type in a substrate electrically connected to a voltage source terminal. The charge accumulation region accumulates charge and prevents charge transference from a pixel cell or peripheral circuitry on one side of the barrier region to a pixel cell on another side of the barrier region.

摘要翻译： 本发明的实施例提供了一种图像传感器，其包括用于隔离装置的阻挡区域。 图像传感器包括衬底和形成在衬底上的像素单元的阵列。 每个像素单元包括光转换装置。 该阵列包括具有第一配置的第一像素单元，具有第二配置的第二像素单元，以及形成在第一和第二像素单元之间用于捕获和去除电荷的至少一个势垒区域。 阻挡区域包括在电连接到电压源端子的基板中的特定导电类型的电荷累积区域。 电荷累积区域累积电荷并防止从阻挡区域一侧上的像素单元或外围电路到屏障区域另一侧上的像素单元的电荷转移。

公开(公告)号：US20070052035A1

公开(公告)日：2007-03-08

申请号：US11209446

申请日：2005-08-23

申请人： Satyadev Nagaraja ,  Howard Rhodes

发明人： Satyadev Nagaraja ,  Howard Rhodes

IPC分类号： H01L21/8238

CPC分类号： H01L27/14685 ,  H01L27/14609 ,  H01L27/1462 ,  H01L27/14623 ,  H01L27/14687

摘要： An image sensor in which the metal interconnects are coated with an anti-reflective coating is disclosed. The top, bottom and sides of the metal interconnects may be coated to reduce reflection from all directions. The thickness of the coating is chosen to suppress reflection of light of certain wavelengths incident at certain expected angles. In particular, the thickness of the coating may be chosen to reduce reflections from neighboring pixels. The metal may be coated in multiple layers of anti-reflective coating to suppress multiple wavelengths of light or multiple angles of incidence.

摘要翻译： 公开了一种其中金属互连件涂覆有抗反射涂层的图像传感器。 金属互连的顶部，底部和侧面可以被涂覆以减少来自所有方向的反射。 选择涂层的厚度以抑制以某些预期角度入射的某些波长的光的反射。 特别地，可以选择涂层的厚度以减少邻近像素的反射。 金属可以涂覆在多层抗反射涂层中以抑制多个波长的光或多个入射角。

公开(公告)号：US20070031987A1

公开(公告)日：2007-02-08

申请号：US11529631

申请日：2006-09-29

申请人： Chandra Mouli ,  Howard Rhodes

发明人： Chandra Mouli ,  Howard Rhodes

IPC分类号： H01L21/00

CPC分类号： H01L27/14609 ,  H01L27/14603 ,  H01L27/1463 ,  H01L27/14643 ,  H01L27/14689

摘要： Isolation methods and devices for isolating pixels of an image sensor pixel. The isolation structure and methods include forming a biased gate over a field isolation region and adjacent a pixel of an image sensor. The isolation methods also include forming an isolation gate over substantial portions of a field isolation region to isolate pixels in an array of pixels.

摘要翻译： 用于隔离图像传感器像素的像素的隔离方法和设备。 隔离结构和方法包括在场隔离区域上形成偏置栅极并邻近图像传感器的像素。 隔离方法还包括在场隔离区域的大部分上形成隔离栅极以隔离像素阵列中的像素。

公开(公告)号：US20070018269A1

公开(公告)日：2007-01-25

申请号：US11186526

申请日：2005-07-21

申请人： Howard Rhodes

发明人： Howard Rhodes

IPC分类号： H01L27/00

CPC分类号： H01L27/14643 ,  H01L27/14603 ,  H01L27/14609 ,  H01L27/14689

摘要： A pinned photodiode that includes a raised silicon epitaxial layer that serves as a passivating layer. This allows the N−region to be near the surface of the silicon substrate, which enhances linkage to the transfer gate. The photodiode comprises an N−region formed within a P-type region of a semiconductor substrate having a top surface. An epitaxial silicon layer is formed on the top surface of said semiconductor substrate.

摘要翻译： 包括用作钝化层的凸起硅外延层的钉扎光电二极管。 这允许N + - 区域靠近硅衬底的表面，这增强了与传输栅极的连接。 光电二极管包括在具有顶表面的半导体衬底的P型区域内形成的N + - 区域。 在所述半导体衬底的顶表面上形成外延硅层。

公开(公告)号：US20070004199A1

公开(公告)日：2007-01-04

申请号：US11514640

申请日：2006-09-01

申请人： Philip Ireland ,  Howard Rhodes

发明人： Philip Ireland ,  Howard Rhodes

IPC分类号： H01L21/4763 ,  H01L21/44 ,  H01L23/48

CPC分类号： H01L27/10888 ,  H01L21/76897 ,  H01L27/10811 ,  H01L2924/0002 ,  H01L2924/00

摘要： A method and structure are disclosed that are advantageous for aligning a contact plug within a bit line contact corridor (BLCC) to an active area of a DRAM that utilizes an insulated sleeve structure. A sleeve insulator layer is deposited in an opening to protect one or more conductor layers from conductive contacts formed in the opening. The sleeve insulator layer electrically insulates a conductive plug from the conductor layer and self-aligns the BLCC so as to improve contact plug alignment tolerances between the BLCC and the capacitor or conductive components.

摘要翻译： 公开了一种有利于将位线接触走廊（BLCC）内的接触插塞对准利用绝缘套管结构的DRAM的有源区域的方法和结构。 套管绝缘体层沉积在开口中以保护一个或多个导体层与形成在开口中的导电触头。 套管绝缘体层将导电插塞与导体层电绝缘，并使BLCC自对准，以提高BLCC与电容器或导电部件之间的接触插塞对准公差。

公开(公告)号：US20070001235A1

公开(公告)日：2007-01-04

申请号：US11168760

申请日：2005-06-29

申请人： Howard Rhodes

发明人： Howard Rhodes

IPC分类号： H01L29/76

CPC分类号： H01L27/14683 ,  H01L27/14609 ,  H01L27/14636 ,  H01L27/14643

摘要： A pixel cell having a photo-conversion device at a surface of a substrate and at least one contact area from which charge or a signal is output or received. A first insulating layer is located over the photo-conversion device and the at least one contact area. The pixel cell further includes at least one conductor in contact with the at least one contact area. The conductor includes a polysilicon material extending through the first insulating layer and in contact with the at least one contact area. Further, a conductive material, which includes at least one of a silicide and a refractory metal, can be over and in contact with the polysilicon material.

摘要翻译： 具有在基板的表面处的光转换装置的像素单元和输出或接收电荷或信号的至少一个接触区域。 第一绝缘层位于光转换器件和至少一个接触区域之上。 像素单元还包括与至少一个接触区域接触的至少一个导体。 导体包括延伸穿过第一绝缘层并与至少一个接触区域接触的多晶硅材料。 此外，包括硅化物和难熔金属中的至少一种的导电材料可以与多晶硅材料结合并接触。

公开(公告)号：US20060263027A1

公开(公告)日：2006-11-23

申请号：US11493717

申请日：2006-07-26

申请人： Gurtej Sandhu ,  Guy Blalock ,  Howard Rhodes

发明人： Gurtej Sandhu ,  Guy Blalock ,  Howard Rhodes

IPC分类号： G02B6/10

CPC分类号： G02B6/132 ,  G02B6/12004 ,  G02B6/12007 ,  G02B6/136 ,  G02F1/011 ,  G02F1/0147 ,  G02F2203/15

摘要： A resonator for thermo optic devices is formed in the same process steps as a waveguide and is formed in a depression of a lower cladding while the waveguide is formed on a surface of the lower cladding. Since upper surfaces of the resonator and waveguide are substantially coplanar, the aspect ratio, as between the waveguide and resonator in an area where the waveguide and resonator front one another, decreases thereby increasing the bandwidth of the resonator. The depression is formed by photomasking and etching the lower cladding before forming the resonator and waveguide. Pluralities of resonators are also taught that are formed in a plurality of depressions of the lower cladding. To decrease resonator bandwidth, waveguide(s) are formed in the depression(s) of the lower cladding while the resonator is formed on the surface. Thermo optic devices formed with these resonators are also taught.

公开(公告)号：US20060255382A1

公开(公告)日：2006-11-16

申请号：US11487412

申请日：2006-07-17

申请人： Howard Rhodes

发明人： Howard Rhodes

IPC分类号： H01L31/113

CPC分类号： H01L27/14643 ,  H01L27/14603 ,  H01L27/1463 ,  H01L27/14656 ,  H01L27/14689 ,  H01L27/14812

摘要： An imager having a photodiode with a shallow doping profile with respect to the top surface of a substrate is disclosed. An imager with a graded pinned surface layer, self-aligned to a gate stack is provided. A photodiode with a shallow doping profile with respect to the top surface of a substrate and a graded pinned surface layer, self-aligned to a gate stack is provided. These photodiodes exhibit reduced image lag, transfer gate leakage, and photodiode dark current generation.