公开(公告)号：US08411537B2

公开(公告)日：2013-04-02

申请号：US12399750

申请日：2009-03-06

申请人： Weijun Tan ,  Kelly Fitzpatrick ,  Shaohua Yang

发明人： Weijun Tan ,  Kelly Fitzpatrick ,  Shaohua Yang

IPC分类号： G06F11/20

CPC分类号： G11B20/1803 ,  G11B2220/2512 ,  H03M13/1105 ,  H03M13/2957 ,  H03M13/6343

摘要： Various embodiments of the present invention provide systems and methods for data regeneration. For example, a system for regenerating data is disclosed. The system includes a media defect detector that is operable to identify a potential media defect associated with a medium from which an input signal is derived, an attenuation amplitude detector that generates an attenuation factor, and a data detector. The data detector includes a first data path and a second data path. The first data path includes a bank of two or more selectable noise prediction filters and the second data path includes a fixed noise prediction filter and the attenuation factor. The data detector processes a derivative of the input signal using the second data path when the potential media defect is indicated, and processes the derivative of the input signal using the first data path when a media defect is not indicated.

摘要翻译： 本发明的各种实施例提供了用于数据再生的系统和方法。 例如，公开了一种用于再生数据的系统。 该系统包括媒体缺陷检测器，其可操作以识别与从其导出输入信号的介质相关联的潜在介质缺陷，产生衰减因子的衰减幅度检测器和数据检测器。 数据检测器包括第一数据路径和第二数据路径。 第一数据路径包括一组两个或多个可选择的噪声预测滤波器，并且第二数据路径包括固定噪声预测滤波器和衰减因子。 当指示潜在介质缺陷时，数据检测器使用第二数据路径处理输入信号的导数，并且当没有指示介质缺陷时，使用第一数据路径处理输入信号的导数。

公开(公告)号：US08250431B2

公开(公告)日：2012-08-21

申请号：US12512235

申请日：2009-07-30

申请人： Shaohua Yang ,  Zongwang Li ,  Weijun Tan ,  Kelly Fitzpatrick

发明人： Shaohua Yang ,  Zongwang Li ,  Weijun Tan ,  Kelly Fitzpatrick

IPC分类号： H03M13/00

CPC分类号： G11B20/1803 ,  G11B20/10222 ,  G11B2020/10722 ,  G11B2020/10759 ,  G11B2020/1287 ,  G11B2020/1289 ,  G11B2020/185 ,  H03M13/1105 ,  H03M13/27 ,  H03M13/2732 ,  H03M13/3905 ,  H03M13/4146 ,  H03M13/458 ,  H03M13/6343

摘要： Various embodiments of the present invention provide systems and methods for data processing. For example, a data processing circuit is disclosed that includes a first data detection circuit that applies a phase dependent data detection algorithm to a data set such that a first output of the first data detection circuit varies depending upon a phase of the data set presented to the first data detection circuit. A first phase of the data set is presented to the first data detection circuit. The circuits further include a decoder circuit that applies a decoding algorithm to the first output to yield a decoded output, and a phase shift circuit that phase shifts the decoded output such that a second phase of the data set is provided as a phase shifted output. A second detection circuit applies a phase dependent data detection algorithm to the phase shifted output such that a second output of the second data detection circuit varies from the first output at least in part due to a different phase of the data set presented to the second data detection circuit.

摘要翻译： 本发明的各种实施例提供了用于数据处理的系统和方法。 例如，公开了一种数据处理电路，其包括第一数据检测电路，该第一数据检测电路将相关数据检测算法应用于数据组，使得第一数据检测电路的第一输出根据所呈现的数据集的相位而变化 第一数据检测电路。 将数据集的第一阶段呈现给第一数据检测电路。 这些电路还包括对第一输出应用解码算法以产生解码输出的解码器电路，以及相位移动电路，使得解码输出相移，使得提供数据组的第二相作为相移输出。 第二检测电路将相位相关数据检测算法应用于相移输出，使得第二数据检测电路的第二输出至少部分地由于呈现给第二数据的数据集的相位而从第一输出变化 检测电路。

公开(公告)号：US20100229031A1

公开(公告)日：2010-09-09

申请号：US12399750

申请日：2009-03-06

申请人： Weijun Tan ,  Kelly Fitzpatrick ,  Shaohua Yang

发明人： Weijun Tan ,  Kelly Fitzpatrick ,  Shaohua Yang

IPC分类号： G06F11/20

CPC分类号： G11B20/1803 ,  G11B2220/2512 ,  H03M13/1105 ,  H03M13/2957 ,  H03M13/6343

摘要： Various embodiments of the present invention provide systems and methods for data regeneration. For example, a system for regenerating data is disclosed. The system includes a media defect detector that is operable to identify a potential media defect associated with a medium from which an input signal is derived, an attenuation amplitude detector that generates an attenuation factor, and a data detector. The data detector includes a first data path and a second data path. The first data path includes a bank of two or more selectable noise prediction filters and the second data path includes a fixed noise prediction filter and the attenuation factor. The data detector processes a derivative of the input signal using the second data path when the potential media defect is indicated, and processes the derivative of the input signal using the first data path when a media defect is not indicated.

摘要翻译： 本发明的各种实施例提供了用于数据再生的系统和方法。 例如，公开了一种用于再生数据的系统。 该系统包括媒体缺陷检测器，其可操作以识别与从其导出输入信号的介质相关联的潜在介质缺陷，产生衰减因子的衰减幅度检测器和数据检测器。 数据检测器包括第一数据路径和第二数据路径。 第一数据路径包括一组两个或多个可选择的噪声预测滤波器，并且第二数据路径包括固定噪声预测滤波器和衰减因子。 当指示潜在介质缺陷时，数据检测器使用第二数据路径处理输入信号的导数，并且当没有指示介质缺陷时，使用第一数据路径处理输入信号的导数。

公开(公告)号：US08762440B2

公开(公告)日：2014-06-24

申请号：US13180311

申请日：2011-07-11

申请人： Weijun Tan ,  Kelly Fitzpatrick

发明人： Weijun Tan ,  Kelly Fitzpatrick

IPC分类号： G06F17/10 ,  H03H21/00

CPC分类号： H03H21/0012 ,  G11B20/10203 ,  G11B20/10296 ,  G11B20/10472 ,  G11B20/1049 ,  G11B2220/2516 ,  G11B2220/415

摘要： Various embodiments of the present invention provide systems and methods for data processing. As an example, a data processing circuit is discussed that includes: a noise predictive filter circuit, a mean calculation circuit, a summation circuit, and a filter tap adaptation circuit. The noise predictive filter circuit is operable to perform a noise predictive filtering process on a data input based upon a selector input to yield a noise predictive output. The selector input is derived from a data detector output. The mean calculation circuit is operable to average two or more instances of the noise predictive output to yield a mean output. The summation circuit is operable to subtract the mean output from the noise predictive output to yield a sum output. The filter tap adaptation circuit is operable to adaptively calculate a filter tap based at least in part on a value derived from the data input and a value derived from the sum output.

摘要翻译： 本发明的各种实施例提供了用于数据处理的系统和方法。 作为示例，讨论了包括：噪声预测滤波器电路，平均计算电路，求和电路和滤波器抽头适配电路的数据处理电路。 噪声预测滤波器电路可操作以基于选择器输入对数据输入执行噪声预测滤波处理，以产生噪声预测输出。 选择器输入是从数据检测器输出导出的。 平均计算电路可操作以平均噪声预测输出的两个或多个实例以产生平均输出。 求和电路可操作地从噪声预测输出中减去平均输出以产生和输出。 滤波器抽头适配电路可操作以至少部分地基于从数据输入导出的值和从和输出导出的值自适应地计算滤波器抽头。

公开(公告)号：US20130016846A1

公开(公告)日：2013-01-17

申请号：US13180311

申请日：2011-07-11

申请人： Weijun Tan ,  Kelly Fitzpatrick

发明人： Weijun Tan ,  Kelly Fitzpatrick

IPC分类号： G10K11/16

CPC分类号： H03H21/0012 ,  G11B20/10203 ,  G11B20/10296 ,  G11B20/10472 ,  G11B20/1049 ,  G11B2220/2516 ,  G11B2220/415

摘要： Various embodiments of the present invention provide systems and methods for data processing. As an example, a data processing circuit is discussed that includes: a noise predictive filter circuit, a mean calculation circuit, a summation circuit, and a filter tap adaptation circuit. The noise predictive filter circuit is operable to perform a noise predictive filtering process on a data input based upon a selector input to yield a noise predictive output. The selector input is derived from a data detector output. The mean calculation circuit is operable to average two or more instances of the noise predictive output to yield a mean output. The summation circuit is operable to subtract the mean output from the noise predictive output to yield a sum output. The filter tap adaptation circuit is operable to adaptively calculate a filter tap based at least in part on a value derived from the data input and a value derived from the sum output.

摘要翻译： 本发明的各种实施例提供了用于数据处理的系统和方法。 作为示例，讨论了包括：噪声预测滤波器电路，平均计算电路，求和电路和滤波器抽头适配电路的数据处理电路。 噪声预测滤波器电路可操作以基于选择器输入对数据输入执行噪声预测滤波处理，以产生噪声预测输出。 选择器输入是从数据检测器输出导出的。 平均计算电路可操作以平均噪声预测输出的两个或多个实例以产生平均输出。 求和电路可操作地从噪声预测输出中减去平均输出以产生和输出。 滤波器抽头适配电路可操作以至少部分地基于从数据输入导出的值和从和输出导出的值自适应地计算滤波器抽头。

公开(公告)号：US08854753B2

公开(公告)日：2014-10-07

申请号：US13050129

申请日：2011-03-17

申请人： Weijun Tan ,  Hongwei Song ,  Kelly Fitzpatrick

发明人： Weijun Tan ,  Hongwei Song ,  Kelly Fitzpatrick

IPC分类号： G11B5/09 ,  G11B20/10 ,  H03M13/00 ,  H03M13/11

CPC分类号： G11B20/10379 ,  G11B20/10314 ,  G11B20/10472 ,  G11B2220/2516 ,  H03M13/1111 ,  H03M13/6331 ,  H03M13/6343 ,  H03M13/658

摘要： Various embodiments of the present invention provide systems and methods for data processing. As an example, a data processing circuit having a data detection circuit is disclosed that includes: a scaling circuit, a soft output calculation circuit, and a factor calculation circuit. The scaling circuit is operable to scale a branch metric value by a scaling factor to yield a scaled output. The soft output calculation circuit is operable to calculate a soft output based at least in part on the scaled output. The factor calculation circuit operable to modify the scaling factor based at least in part on the soft output.

摘要翻译： 本发明的各种实施例提供了用于数据处理的系统和方法。 作为示例，公开了具有数据检测电路的数据处理电路，其包括：缩放电路，软输出计算电路和因子计算电路。 缩放电路可操作以通过缩放因子缩放分支度量值以产生缩放的输出。 软输出计算电路可操作以至少部分地基于缩放的输出来计算软输出。 因子计算电路可操作以至少部分地基于软输出来修改缩放因子。

公开(公告)号：US20120236430A1

公开(公告)日：2012-09-20

申请号：US13050129

申请日：2011-03-17

申请人： Weijun Tan ,  Hongwei Song ,  Kelly Fitzpatrick

发明人： Weijun Tan ,  Hongwei Song ,  Kelly Fitzpatrick

IPC分类号： G11B5/09

CPC分类号： G11B20/10379 ,  G11B20/10314 ,  G11B20/10472 ,  G11B2220/2516 ,  H03M13/1111 ,  H03M13/6331 ,  H03M13/6343 ,  H03M13/658

摘要： Various embodiments of the present invention provide systems and methods for data processing. As an example, a data processing circuit having a data detection circuit is disclosed that includes: a scaling circuit, a soft output calculation circuit, and a factor calculation circuit. The scaling circuit is operable to scale a branch metric value by a scaling factor to yield a scaled output. The soft output calculation circuit is operable to calculate a soft output based at least in part on the scaled output. The factor calculation circuit operable to modify the scaling factor based at least in part on the soft output.

摘要翻译： 本发明的各种实施例提供了用于数据处理的系统和方法。 作为示例，公开了具有数据检测电路的数据处理电路，其包括：缩放电路，软输出计算电路和因子计算电路。 缩放电路可操作以通过缩放因子缩放分支度量值以产生缩放的输出。 软输出计算电路可操作以至少部分地基于缩放的输出来计算软输出。 因子计算电路可操作以至少部分地基于软输出来修改缩放因子。

公开(公告)号：US07089483B2

公开(公告)日：2006-08-08

申请号：US10793414

申请日：2004-03-04

申请人： Peter McEwen ,  Kelly Fitzpatrick

发明人： Peter McEwen ,  Kelly Fitzpatrick

IPC分类号： H03M13/03

CPC分类号： H04L1/0071 ,  G11B20/18 ,  G11B2020/1863 ,  H03M13/41 ,  H03M13/6331 ,  H03M13/6343 ,  H03M13/6502 ,  H04L1/0054

摘要： A two-stage sampling data detector for a partial response channel having a channel code encoder for encoding user information sequences into blocks of code words in accordance with a predetermined channel block code characterized by a list of most likely error-events comprising impermissible code words. The detector includes a first-stage detector, such as a Viterbi detector, connected to receive samples from the partial response channel and matched to characteristics of the channel and not to the channel code, puts out unchecked bit estimates. A second stage post-processor checks the bit estimates in relation to derived detector decision metrics information and the channel block code, and puts out post-processed bit estimates to a channel code decoder after correcting detected erroneous sequences in accordance with the decision metrics information, information derived from the channel code, and the list of most likely error-events. A method for generating the channel block code is also described.

摘要翻译： 一种用于部分响应信道的两级采样数据检测器，具有信道码编码器，用于根据预定信道块码将用户信息序列编码成码字块，其特征在于包含不允许码字的最可能的错误事件列表。 该检测器包括第一级检测器，例如维特比检测器，其被连接以接收来自部分响应信道的样本，并且与信道的特征匹配，而不是与信道码匹配，输出未检查的比特估计。 第二级后处理器相对于导出的检测器判定度量信息和信道块码检查比特估计，并且根据决策度量信息校正检测到的错误序列之后，向信道码解码器输出后处理比特估计， 从信道码导出的信息，以及最可能的错误事件的列表。 还描述了用于产生信道块码的方法。

公开(公告)号：US5742099A

公开(公告)日：1998-04-21

申请号：US821707

申请日：1997-03-19

申请人： Goutam Debnath ,  Kelly Fitzpatrick

发明人： Goutam Debnath ,  Kelly Fitzpatrick

IPC分类号： H01L23/528 ,  H01L23/48

CPC分类号： H01L23/5286 ,  H01L2924/0002

摘要： An integrated circuit and a process for manufacturing the same wherein the integrated circuit includes a substrate, a first insulative layer disposed on the substrate, and a first conductive layer disposed on the first insulative layer, the first conductive layer having a plurality of conductive channels arranged into horizontal tracks. The plurality of conductive channels are for providing two power sources V.sub.SS and V.sub.CC to cells (e.g. standard cells in control blocks) in the integrated circuit. A second insulative layer is disposed on the first conductive layer, and a second conductive layer is disposed on the second insulative layer, the second conductive layer arranged into a plurality of vertical tracks, each of the plurality of vertical tracks are broken into a plurality of segments. Each of the plurality of segments are for carrying one of the power sources, V.sub.SS and V.sub.CC to the cells in the integrated circuit, each of the plurality of segments coupled to a corresponding channel in the first conductive layer through first vias in the second insulative layer. The integrated circuit may also have a third insulative layer disposed on the second conductive layer, and a third conductive layer disposed on the third insulative layer, the third conductive layer providing interconnection of the segments in each of the vertical tracks through second vias in the third insulative layer, the interconnection provided by horizontal tracks in the third conductive layer. In implemented embodiments, the breaking of the vertical power tracks in the second conductive layer into segments for supplying power to the cells results in a net decrease in the area consumed by power buses in the cells, and thus, more area is available for non-power signal lines. The overall area of the integrated circuit may be thereby reduced.

摘要翻译： 一种集成电路及其制造方法，其中集成电路包括衬底，设置在衬底上的第一绝缘层和设置在第一绝缘层上的第一导电层，第一导电层具有布置成多个导电沟道 进入水平轨道。 多个导电通道用于向集成电路中的单元（例如，控制块中的标准单元）提供两个电源VSS和VCC。 第二绝缘层设置在第一导电层上，第二导电层设置在第二绝缘层上，第二导电层布置在多个垂直轨道中，多个垂直轨道中的每一个被分解成多个 细分。 多个段中的每一个用于将电源VSS和VCC中的一个传送到集成电路中的单元，多个段中的每一个通过第二绝缘层中的第一通孔耦合到第一导电层中的对应沟道 。 集成电路还可以具有设置在第二导电层上的第三绝缘层和设置在第三绝缘层上的第三导电层，第三导电层通过第三导电层中的第三通孔在每个垂直轨道中提供互连 绝缘层，由第三导电层中的水平轨道提供的互连。 在实施的实施例中，将第二导电层中的垂直功率轨迹分裂成用于向单电池供电的段导致电池中电力总线消耗的面积的净减少，因此， 电源信号线。 可以减小集成电路的整体面积。

公开(公告)号：US20100012140A1

公开(公告)日：2010-01-21

申请号：US12567786

申请日：2009-09-27

申请人： Kelly Fitzpatrick

发明人： Kelly Fitzpatrick

IPC分类号： A45D8/00 ,  A41G5/00

CPC分类号： A45D8/20 ,  A45D8/38

摘要： A hair volumizing device for creating the appearance of added volume to the user's hair and which is worn under a section of the hair so it cannot be seen by others. The hair volumizing device of the present invention provides a “bump” in the hair that is a desired style by many. The hair volumizing device comprises a body member and a securing mechanism to secure the body member to the hair. The body member has a first end, a second end and one or more sides and is made from or covered with a material that helps keep the user's hair in place over the hair volumizing device. In the preferred embodiment, the securing mechanism is attached to or made integral with the bottom side of the body member. A preferred securing mechanism is configured and utilized in a manner similar to commonly available barrettes.

摘要翻译： 一种头发膨胀装置，用于产生添加的体积的外观给用户的头发，并且其被佩戴在头发的一部分下方，使得其他人看不到。 本发明的头发膨胀装置在头发中提供了许多所希望的风格的“凸起”。 头发膨胀装置包括主体部件和固定机构，以将主体部件固定在头发上。 身体构件具有第一端，第二端和一个或多个侧面，并且由材料制成或覆盖有助于将使用者头发保持在头发膨胀装置上的适当位置的材料。 在优选实施例中，固定机构附接到本体构件的底侧或与本体构件的底侧成一体。 优选的固定机构以类似于通常可用的夹头的方式构造和使用。