Silicon based sensor apparatus
    11.
    发明授权
    Silicon based sensor apparatus 失效
    硅基传感器装置

    公开(公告)号:US5625209A

    公开(公告)日:1997-04-29

    申请号:US434816

    申请日:1995-05-04

    IPC分类号: G01N27/12 H01L23/58

    摘要: A biomedical sensor (20) is formed on a semiconductor substrate (22). Insulated dielectric layers (23, 24) are formed on the face and backside of the semiconductor substrate (22). Metal leads (26, 28) contact the substrate (22) through openings in the dielectric layer (23). The leads (26, 28) are also each connected to a set of interleaved longitudinal contact fingers (27, 29). A pair of contacts (30, 32) are formed on the opposite side of the substrate (22) from the contact figures (27, 29). A conductive biologic sample is placed over the interleaf fingers (27, 29), electrical measurements can be made through backside contacts (30, 32) so resistance measurements can be taken.

    摘要翻译: 生物医学传感器(20)形成在半导体衬底(22)上。 绝缘电介质层(23,24)形成在半导体衬底(22)的表面和背面上。 金属引线(26,28)通过介电层(23)中的开口接触基板(22)。 引线(26,28)也各自连接到一组交错的纵向接触指(27,29)。 一对触点(30,32)形成在基板(22)的与接触图(27,29)相反的一侧上。 将导电生物样品放置在中间指状物(27,29)上,可以通过背侧触点(30,32)进行电气测量,因此可以进行电阻测量。

    Integrated dual-slope analog to digital converter with r/c variance
compensation
    12.
    发明授权
    Integrated dual-slope analog to digital converter with r/c variance compensation 失效
    具有r / c差分补偿的集成双斜率模数转换器

    公开(公告)号:US4849757A

    公开(公告)日:1989-07-18

    申请号:US30198

    申请日:1987-03-25

    申请人: William R. Krenik

    发明人: William R. Krenik

    IPC分类号: H03M1/52 H03M1/06

    CPC分类号: H03M1/0619 H03M1/52

    摘要: A dual-slope A/D converter circuit has an oscillator (14) whose timing frequency is determined by the value of an oscillator resistor (70) and a oscillator capacitor (72). An integrator (66) integrates an input voltage at a rate determined by an integrating resistor (64) and an integrating capacitor (68). The oscillator resistor (70) and integrator resistor (64) are designed such that their ratio will remain constant despite variations in actual value due to manufacturing inaccuracies. The oscillator capacitor (72) and integrating capacitor (68) are similarly designed. Consequently, an optimum peak integration value can be obtained at full scale input despite variations in actual resistive and capacitive values.

    摘要翻译: 双斜率A / D转换电路具有振荡器(14),其定时频率由振荡电阻(70)和振荡电容器(72)的值确定。 积分器(66)以由积分电阻器(64)和积分电容器(68)确定的速率积分输入电压。 振荡电阻(70)和积分电阻(64)被设计成使得它们的比例将保持恒定,尽管由于制造不准确而导致实际值的变化。 类似地设计振荡电容器(72)和积分电容器(68)。 因此,尽管实际电阻值和电容值有变化,但仍可在满量程输入端获得最佳峰值积分值。

    Touch-sensitive interface and method using orthogonal signaling
    13.
    发明申请
    Touch-sensitive interface and method using orthogonal signaling 有权
    使用正交信令的触敏接口和方法

    公开(公告)号:US20120056841A1

    公开(公告)日:2012-03-08

    申请号:US12807333

    申请日:2010-09-02

    IPC分类号: G06F3/044

    CPC分类号: G06F3/044 G06F3/0418

    摘要: A touch screen system includes a capacitive touch screen (1) including a plurality of row conductors (7-1,2 . . . n) and a column conductor (5-1). A plurality of cotemporaneous orthogonal excitation signals (S1(t), S2(t) . . . Sn(t)) are simultaneously driven onto the row conductors, respectively. The capacitively coupled signals on the column conductor may be influenced by a touch (10) on the capacitive touch screen. Receiver circuitry (50) includes a sense amplifier (21-1) coupled to generate an amplifier output signal (r1(t)) in response to signals capacitively coupled onto the column conductor. WHT-based circuitry (35) determines amounts of signal contribution capacitively coupled by each of the excitation signals, respectively, to the amplifier output signal.

    摘要翻译: 触摸屏系统包括电容式触摸屏(1),其包括多个行导体(7-1.2 .n)和列导体(5-1)。 多个同时正交激励信号(S1(t),S2(t)... Sn(t))分别同时被驱动到行导体上。 列导体上的电容耦合信号可能受到电容式触摸屏上的触摸(10)的影响。 接收器电路(50)包括响应于电容耦合到列导体上的信号而耦合以产生放大器输出信号(r1(t))的读出放大器(21-1)。 基于WHT的电路(35)确定分别通过每个激励信号电容耦合到放大器输出信号的信号贡献量。

    DYNAMIC SHAPE DISCRIMINATION VISION TEST
    14.
    发明申请
    DYNAMIC SHAPE DISCRIMINATION VISION TEST 有权
    动态形式辨别视觉测试

    公开(公告)号:US20090273758A1

    公开(公告)日:2009-11-05

    申请号:US12434279

    申请日:2009-05-01

    IPC分类号: A61B3/02

    CPC分类号: A61B3/032

    摘要: A vision testing system and method to assess vision function. In one embodiment, the vision testing system comprises: (1) a display; (2) a computer coupled to the display and configured to provide dynamic images, each including a substantially constant fixed point of fixation; and (3) a human input device coupled to the computer, wherein responses from a test subject are fed back to the computer to assess the test subject's vision function.

    摘要翻译: 视力测试系统和评估视力功能的方法。 在一个实施例中,视觉测试系统包括:(1)显示器; (2)耦合到所述显示器并被配置为提供动态图像的计算机,每个动态图像包括基本上恒定的固定固定点; 和(3)耦合到计算机的人输入设备,其中来自测试对象的响应被反馈到计算机以评估测试对象的视觉功能。

    Start-up commutation method for a rotating magnetic storage device
without back rotation
    15.
    发明授权
    Start-up commutation method for a rotating magnetic storage device without back rotation 失效
    旋转磁存储装置的启动换向方法无反向旋转

    公开(公告)号:US5633569A

    公开(公告)日:1997-05-27

    申请号:US402275

    申请日:1995-03-10

    IPC分类号: H02P6/18 G11B19/20 H02P6/22

    CPC分类号: G11B19/2009

    摘要: A method of driving a motor without initial back rotation includes the steps of identifying a rest position 22 of a storage medium 20, mapping the rest position of storage medium 20 to a motor drive sequence, and driving the motor with the motor drive sequence, thereby enabling motor start-up without back rotation. The method is applicable to unipolar and bipolar drive methods as well as inductive read type and magneto-resistive type heads.

    摘要翻译: 驱动电动机而不进行初始反向旋转的方法包括以下步骤:识别存储介质20的静止位置22,将存储介质20的静止位置映射到电动机驱动顺序,以及利用电动机驱动顺序驱动电动机,由此 使电机启动无反向旋转。 该方法适用于单极和双极驱动方式以及感性读取型和磁阻式磁头。

    Integrated circuit capacitors, buffers, systems and methods
    16.
    发明授权
    Integrated circuit capacitors, buffers, systems and methods 失效
    集成电路电容器,缓冲器,系统和方法

    公开(公告)号:US5469195A

    公开(公告)日:1995-11-21

    申请号:US288137

    申请日:1994-08-09

    IPC分类号: H01L27/08 G09G1/28

    CPC分类号: H01L27/0805

    摘要: An integrated circuit capacitor has a semiconductor die and a plurality of field effect transistors fabricated on the die and having gates, sources and drains. The gates are connected to each other as one side of the capacitor. The sources and drains are connected together as another side of the capacitor. A color palette has a die with circuitry including a dot clock buffer with transistors connected to supply rails and the integrated circuit capacitor having a plurality of the parallel-connected field effect transistors connected across the supply rails. The dot clock buffer has an output distributed directly to the rest of the circuitry. Other capacitors, buffers, systems and methods are also disclosed.

    摘要翻译: 集成电路电容器具有半导体管芯和在管芯上制造并具有栅极,源极和漏极的多个场效应晶体管。 栅极作为电容器的一侧彼此连接。 源极和漏极连接在一起作为电容器的另一侧。 调色板具有包括具有连接到电源轨的晶体管的点时钟缓冲器的电路的芯片,并且集成电路电容器具有连接在电源轨上的多个并联连接的场效应晶体管。 点时钟缓冲器具有直接分配到电路的其余部分的输出。 还公开了其它电容器,缓冲器,系统和方法。

    Circuitry and method for sense amplification
    17.
    发明授权
    Circuitry and method for sense amplification 失效
    电路和方法进行感测放大

    公开(公告)号:US5410197A

    公开(公告)日:1995-04-25

    申请号:US225414

    申请日:1994-04-08

    申请人: William R. Krenik

    发明人: William R. Krenik

    摘要: In a method and circuitry for sense amplification, a differential input voltage (84a-b) is input, and a differential output voltage (90a-b) is output. The differential output voltage (90a-b) is substantially minimized during a reset signal on a reset signal line (88). During the reset signal, the differential output voltage (90a-b) is biased in response to the differential input voltage (84a-b). After the reset signal, the differential output voltage (90a-b) is amplified in response to the biasing.

    摘要翻译: 在用于感测放大的方法和电路中,输入差分输入电压(84a-b),并输出差分输出电压(90a-b)。 在复位信号线(88)上的复位信号期间差分输出电压(90a-b)基本上最小化。 在复位信号期间,差分输出电压(90a-b)响应差分输入电压(84a-b)而偏置。 在复位信号之后,差分输出电压(90a-b)响应于偏置而被放大。

    Memory cell circuits, devices, systems and methods of operation
    18.
    发明授权
    Memory cell circuits, devices, systems and methods of operation 失效
    存储单元电路,器件,系统和操作方法

    公开(公告)号:US5293349A

    公开(公告)日:1994-03-08

    申请号:US720099

    申请日:1991-06-24

    摘要: A memory cell constructed in accordance with the present invention includes a node operable to present an electrical level representing a first state or a second state. Further included is a first switching device having a first terminal connected to the node such that if the first switching device were to close, the electrical level at the node would be connected to a second terminal of the first switching device. Additionally, second and third switching devices are provided both having first and second terminals and both operable to switch as a function of the state at the node. Finally, a single control switching device is provided in association with the second and third switching devices wherein a control signal switches the control switching device such that the state at the node may be determined by connecting to the first terminals of the second and third switching devices.

    摘要翻译: 根据本发明构造的存储单元包括可操作以呈现表示第一状态或第二状态的电平面的节点。 还包括第一开关装置,其具有连接到节点的第一端子,使得如果第一开关装置关闭,则节点处的电平将连接到第一开关装置的第二端子。 另外,第二和第三开关装置被提供为具有第一和第二端子,并且两者都可操作以根据节点处的状态来切换。 最后,与第二和第三开关装置相关联地提供单个控制开关装置,其中控制信号切换控制切换装置,使得可以通过连接到第二和第三开关装置的第一端子来确定节点处的状态 。

    Output buffer circuits with controlled Miller effect capacitance
    19.
    发明授权
    Output buffer circuits with controlled Miller effect capacitance 失效
    具有受控米勒效应电容的输出缓冲电路

    公开(公告)号:US5274284A

    公开(公告)日:1993-12-28

    申请号:US647614

    申请日:1991-01-24

    CPC分类号: H03K17/164

    摘要: An integrated circuit buffer includes a source follower output transistor having an output and also connected by a voltage dropping circuit to a supply rail thereby introducing a controlled amount of Miller effect capacitance in the source follower output transistor. The buffer also has a common source output transistor and a unidirectional conducting circuit connecting between the common source output transistor and the source follower output transistor. Other buffers, palette devices, computer graphics systems and methods are also disclosed.

    摘要翻译: 集成电路缓冲器包括具有输出的源极跟随器输出晶体管,并且还通过降压电路连接到电源轨,从而在源极跟随器输出晶体管中引入受控量的米勒效应电容。 缓冲器还具有公共源极输出晶体管和连接在共源极输出晶体管和源极跟随器输出晶体管之间的单向导通电路。 还公开了其他缓冲器,调色板装置,计算机图形系统和方法。

    Apparatus and method for comparing signals
    20.
    发明授权
    Apparatus and method for comparing signals 失效
    用于比较信号的装置和方法

    公开(公告)号:US5113091A

    公开(公告)日:1992-05-12

    申请号:US672146

    申请日:1991-03-19

    IPC分类号: H03K5/24

    CPC分类号: H03K5/249

    摘要: An amplifier includes an input circuit for alternately selecting input signals to be compared and a first bias circuit for producing self-bias when one of the input signals is selected. A second bias circuit stores the self-bias for use in the amplifier when the other of the input signals is selected for rejecting noise which may accompany power supply voltage applied to the amplifier.

    摘要翻译: 放大器包括用于交替地选择要比较的输入信号的输入电路和用于当选择输入信号之一时产生自偏压的第一偏置电路。 当另一个输入信号被选择用于抑制可能伴随施加到放大器的电源电压的噪声时,第二偏置电路存储用于放大器中的自偏压。