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公开(公告)号：US07964440B2
公开(公告)日：2011-06-21
申请号：US11015795
申请日：2004-12-20
IPC分类号： H01L51/40
CPC分类号： B82Y30/00 , H01L27/28 , H01L51/0004 , H01L51/0015
摘要： Composite films formed from blends of semiconducting and insulating materials that phase separate on patterned substrates are provided. Phase separation provides isolated and encapsulated areas of semiconductor on the substrate. Processes for preparing and using such composite films are also provided, along with devices including such composite films.
摘要翻译： 提供由在图案化衬底上相分离的半导体和绝缘材料的共混物形成的复合膜。 相分离在衬底上提供隔离和封装的半导体区域。 还提供了制备和使用这种复合膜的方法以及包括这种复合膜的装置。
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公开(公告)号：US20110027947A1
公开(公告)日：2011-02-03
申请号：US12901365
申请日：2010-10-08
IPC分类号： H01L21/782
CPC分类号： H01L51/0005 , B82Y10/00 , H01L51/0012 , H01L51/0048 , H01L51/0545 , Y10S977/723 , Y10S977/786
摘要： A method of depositing elongated nanostructures that allows accurate positioning and orientation is described. The method involves printing or otherwise depositing elongated nanostructures in a carrier solution. The deposited droplets are also elongated, usually by patterning the surface upon which the droplets are deposited. As the droplet evaporates, the fluid flow within the droplets is controlled such that the nanostructures are deposited either at the edge of the elongated droplet or the center of the elongated droplet. The described deposition technique has particular application in forming the active region of a transistor.
摘要翻译： 描述了允许精确定位和取向的细长纳米结构的沉积方法。 该方法涉及在载体溶液中印刷或以其它方式沉积细长的纳米结构。 沉积的液滴也是细长的，通常通过图案化沉积有液滴的表面。 当液滴蒸发时，控制液滴内的流体流动，使得纳米结构沉积在细长液滴的边缘或细长液滴的中心。 所描述的沉积技术特别适用于形成晶体管的有源区。
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公开(公告)号：US07838933B2
公开(公告)日：2010-11-23
申请号：US11644055
申请日：2006-12-22
IPC分类号： H01L27/12
CPC分类号： H01L51/0005 , B82Y10/00 , H01L51/0012 , H01L51/0048 , H01L51/0545 , Y10S977/723 , Y10S977/786
摘要： A method of depositing elongated nanostructures that allows accurate positioning and orientation is described. The method involves printing or otherwise depositing elongated nanostructures in a carrier solution. The deposited droplets are also elongated, usually by patterning the surface upon which the droplets are deposited. As the droplet evaporates, the fluid flow within the droplets is controlled such that the nanostructures are deposited either at the edge of the elongated droplet or the center of the elongated droplet. The described deposition technique has particular application in forming the active region of a transistor.
摘要翻译： 描述了允许精确定位和取向的细长纳米结构的沉积方法。 该方法涉及在载体溶液中印刷或以其它方式沉积细长的纳米结构。 沉积的液滴也是细长的，通常通过图案化沉积有液滴的表面。 当液滴蒸发时，控制液滴内的流体流动，使得纳米结构沉积在细长液滴的边缘或细长液滴的中心。 所描述的沉积技术特别适用于形成晶体管的有源区。
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公开(公告)号：US07824949B2
公开(公告)日：2010-11-02
申请号：US11963008
申请日：2007-12-21
IPC分类号： H01L21/00
CPC分类号： H01L27/14658 , H01L27/14692
摘要： A method of forming a sensor array. The method includes depositing a source/drain contact layer; depositing a semiconductor layer on the source/drain contact layer; and patterning the source/drain contact layer and the semiconductor layer substantially simultaneously, wherein the patterned semiconductor layer forms part of a sensor of the sensor array.
摘要翻译： 一种形成传感器阵列的方法。 该方法包括沉积源极/漏极接触层; 在源极/漏极接触层上沉积半导体层; 并且基本上同时构图源极/漏极接触层和半导体层，其中图案化的半导体层形成传感器阵列的传感器的一部分。
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公开(公告)号：US20100181604A1
公开(公告)日：2010-07-22
申请号：US12692379
申请日：2010-01-22
IPC分类号： H01L27/146
CPC分类号： H01L27/14658 , H01L27/14692
摘要： A method of forming a sensor array. The method includes depositing a source/drain contact layer; depositing a semiconductor layer on the source/drain contact layer; and patterning the source/drain contact layer and the semiconductor layer substantially simultaneously, wherein the patterned semiconductor layer forms part of a sensor of the sensor array.
摘要翻译： 一种形成传感器阵列的方法。 该方法包括沉积源极/漏极接触层; 在源极/漏极接触层上沉积半导体层; 并且基本上同时构图源极/漏极接触层和半导体层，其中图案化的半导体层形成传感器阵列的传感器的一部分。
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16.发明申请Method and Apparatus for Using Thin-Film Transistors and MIS Capacitors as Light-Sensing Elements in Charge Mapping Arrays 有权使用薄膜晶体管和MIS电容器作为电荷映射阵列中的光敏元件的方法和装置公开(公告)号：US20100073530A1
公开(公告)日：2010-03-25
申请号：US12235534
申请日：2008-09-22
申请人： Tse Nga Ng , Sanjiv Sambandan , William S. Wong
发明人： Tse Nga Ng , Sanjiv Sambandan , William S. Wong
IPC分类号： H04N5/335
CPC分类号： H01L27/14647 , H04N5/374
摘要： A method and apparatus for using TFT transistors or MIS capacitors as light-sensing elements in charge mapping arrays. A bias stress may be applied to a plurality of pixels in a charge map array. As a result, charge carriers may be trapped in each of the plurality of pixels responsive to the bias stress, which may be observed as a value shift such as a threshold voltage VT shift. Light may then be transmitted toward the plurality of pixels in the charge map array causing some of the pixels to absorb the light. The trapped charge carriers are released in the pixels that absorbed the light and not released in the pixels that did not absorb the light. The value shift in each of the pixels can be compared to determine which of the pixels absorbed the light.
摘要翻译： 一种用于在电荷映射阵列中使用TFT晶体管或MIS电容器作为光感测元件的方法和装置。 可以对电荷映射阵列中的多个像素施加偏压应力。 结果，响应于偏压应力，电荷载流子可以被捕获在多个像素的每一个中，这可以被观察为诸如阈值电压VT偏移的值偏移。 然后，光可以被传送到电荷映射阵列中的多个像素，导致一些像素吸收光。 捕获的电荷载体在吸收光的像素中被释放，并且在不吸收光的像素中释放。 可以比较每个像素中的值偏移，以确定吸收光的哪个像素。
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17.发明申请Annealing a Buffer Layer for Fabricating Electronic Devices on Compliant Substrates 有权退火缓冲层，用于在合适的基板上制造电子器件公开(公告)号：US20090289333A1
公开(公告)日：2009-11-26
申请号：US12123732
申请日：2008-05-20
申请人： Rene Lujan , William S. Wong , Julia R. Greer
发明人： Rene Lujan , William S. Wong , Julia R. Greer
IPC分类号： H01L23/58 , H01L21/469
CPC分类号： H01L27/1218
摘要： A method of forming a thin-film layered electronic device over a flexible substrate comprises the steps of depositing a buffer layer over the flexible substrate, heating the substrate and buffer layer stack to a temperature at which plastic deformation of the buffer layer takes place, cooling the stack, then forming the thin-film electronic device over the plastically deformed buffer layer without further plastic deformation of the buffer layer. The heating and cooling to cause plastic deformation of the buffer layer is referred to as annealing. The thin-film electronic device is formed by a process according to which all steps are performed at a temperature below that at which further plastic deformation of the buffer layer occurs. In-process strain and runout are reduced, improving device yield on flexible substrates. An optional metal base layer may be formed over the buffer layer prior annealing.
摘要翻译： 在柔性基板上形成薄膜层状电子器件的方法包括以下步骤：在柔性衬底上沉积缓冲层，将衬底和缓冲层堆叠加热至缓冲层发生塑性变形的温度，冷却 堆叠，然后在塑性变形的缓冲层上形成薄膜电子器件，而不会使缓冲层进一步塑性变形。 将缓冲层引起塑性变形的加热和冷却称为退火。 薄膜电子器件通过一种方法形成，根据该方法，所有步骤在低于缓冲层进一步塑性变形的温度下进行。 过程中的应变和跳动减少，提高柔性基板上的器件产量。 可以在退火之前在缓冲层上形成任选的金属基层。
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公开(公告)号：US07559619B2
公开(公告)日：2009-07-14
申请号：US11204648
申请日：2005-08-15
IPC分类号： B41J29/393
CPC分类号： B41J2/2139 , B81C99/0065 , B81C2201/0184 , B81C2201/0198
摘要： A digital lithography system including a droplet source (printhead) for selectively ejecting liquid droplets of a phase-change masking material, and an imaging system for capturing (generating) image data representing printed features formed by the ejected liquid droplets. The system also includes a digital control system that detects defects in the printed features, for example, by comparing the image data with stored image data. The digital control system then modifies the printed feature to correct the defect, for example, by moving the printhead over the defect and causing the printhead to eject droplets onto the defect's location. In one embodiment, a single-printhead secondary printer operates in conjunction with a multi-printhead main printer to correct defects.
摘要翻译： 一种数字光刻系统，包括用于选择性地喷射相变掩模材料的液滴的液滴源（打印头）和用于捕获（产生）表示喷射液滴形成的打印特征的图像数据的成像系统。 该系统还包括数字控制系统，其检测打印特征中的缺陷，例如通过将图像数据与存储的图像数据进行比较。 然后，数字控制系统修改打印的特征以校正缺陷，例如通过将打印头移动到缺陷上并使打印头将液滴喷射到缺陷的位置上。 在一个实施例中，单打印头二次打印机与多打印头主打印机一起操作以校正缺陷。
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公开(公告)号：US07129181B2
公开(公告)日：2006-10-31
申请号：US10943624
申请日：2004-09-17
IPC分类号： H01L21/302
CPC分类号： H01L21/76838 , B82Y30/00 , H01L21/28506 , H01L27/124
摘要： Controlled overetching is utilized to produce metal patterns having gaps that are smaller than the resolution limits of the feature patterning (e.g., photolithography) process utilized to produce the metal patterns. A first metal layer is formed and masked, and exposed regions are etched away. The etching process is allowed to continue in a controlled manner to produced a desired amount of over-etching (i.e., undercutting the mask) such that an edge of the first metal layer is offset from an edge of the mask by a predetermined gap distance. A second metal layer is then deposited such that an edge of the second metal layer is spaced from the first metal layer by the predetermined gap distance. The metal gap is used to define, for example, transistor channel lengths, thereby facilitating the production of transistors having channel lengths defined by etching process control that are smaller than the process resolution limits.
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20.发明授权Large area electronic device with high and low resolution patterned film features 有权大面积电子设备具有高分辨率和低分辨率图案胶片功能公开(公告)号：US07125495B2
公开(公告)日：2006-10-24
申请号：US11019037
申请日：2004-12-20
IPC分类号： G01D15/00
CPC分类号： H01L51/0004 , H01L51/0011 , H01L51/0021
摘要： Two different processing techniques are utilized to respectively form high resolution features and low resolution features in a critical layer of an electronic device, and in particular a large area electronic device. High resolution features are formed by soft lithography, and low resolution features are formed by jet-printing or using a jet-printed etch mask. Jet-printing is also used to stitch misaligned structures. Alignment marks are generated with the features to coordinate the various processing steps and to automatically control the stitching process. Thin-film transistors are formed by generating gate structures using a first jet-printed etch mask, forming source/drain electrodes using soft lithography, forming interconnect structures using a second jet-printed etch mask, and then depositing semiconductor material over the source/drain electrodes. Redundant structures are formed to further improve tolerance to misalignment, with non-optimally positioned structures removed (etched) during formation of the low resolution interconnect structures.
摘要翻译： 利用两种不同的处理技术在电子设备的关键层，特别是大面积的电子设备中分别形成高分辨率特征和低分辨率特征。 通过软光刻形成高分辨率特征，并且通过喷墨印刷或使用喷射印刷的蚀刻掩模形成低分辨率特征。 喷墨印刷也用于缝合不对齐的结构。 产生对准标记的特征是协调各种处理步骤并自动控制缝合过程。 通过使用第一喷射印刷蚀刻掩模产生栅极结构来形成薄膜晶体管，使用软光刻形成源极/漏极，使用第二喷射印刷的蚀刻掩模形成互连结构，然后在源极/漏极上沉积半导体材料 电极。 形成冗余结构以进一步改善对未对准的容限，在形成低分辨率互连结构期间，非最佳定位的结构被去除（蚀刻）。
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