Transient fault detection by integrating an SRMT code and a non SRMT code in a single application

    公开(公告)号:US07937620B2

    公开(公告)日:2011-05-03

    申请号:US11745403

    申请日:2007-05-07

    申请人: Cheng Wang Youfeng Wu

    发明人: Cheng Wang Youfeng Wu

    IPC分类号: G06F11/00 G06F11/14

    CPC分类号: G06F11/1497 G06F8/457

    摘要: Disclosed is a method for running a first code generated by a Software-based Redundant Multi-Threading (SRMT) compiler along with a second code generated by a normal compiler at runtime, the first code including a first function and a second function, the second code including a third function. The method comprises running the first function in a leading thread and a tailing thread (104); running the third function in a single thread (106), the leading thread calls the third function and running the second function in the leading thread and the tailing thread (108), the third function calls the second function. The present disclosure provides a mechanism for handling function calls wherein SRMT functions and binary functions can call each other irrespective of whether the callee function is a SRMT function or a binary function and thereby dynamically adjusts reliability and performance tradeoff based on run-time information and user selectable policies.

    Methods and apparatus to form a transactional objective instruction construct from lock-based critical sections
    12.
    发明授权
    Methods and apparatus to form a transactional objective instruction construct from lock-based critical sections 有权
    从基于锁的关键部分形成事务性目标指令构造的方法和装置

    公开(公告)号:US07844946B2

    公开(公告)日:2010-11-30

    申请号:US11535205

    申请日:2006-09-26

    申请人: Youfeng Wu Cheng Wang

    发明人: Youfeng Wu Cheng Wang

    IPC分类号: G06F9/44 G06F9/46

    CPC分类号: G06F9/466 G06F9/524

    摘要: Methods and an apparatus for forming a transaction object instruction construct are provided. An example method translates a source instruction construct to form a transactional objective instruction construct, executes the transactional objective instruction construct, intercepts an aborted transaction associated with the transactional objective instruction construct during execution, maintains a graph of nodes and edges associated with the executed transactional objective instruction construct to predict a deadlock situation, and resolves the deadlock situation associated with the transactional objective instruction construct based on the graph.

    摘要翻译: 提供了用于形成交易对象指令结构的方法和装置。 一个示例性方法将源指令结构转换成一个事务性目标指令结构,执行事务目标指令结构,在执行期间拦截与事务性目标指令结构相关联的异常事务,维护与执行的事务目标相关联的节点和边的图 指令结构来预测死锁情况,并根据图表解决与事务性目标指令构造相关的死锁情况。

    Disambiguation in dynamic binary translation
    13.
    发明授权
    Disambiguation in dynamic binary translation 有权
    消除动态二进制翻译

    公开(公告)号:US07752613B2

    公开(公告)日:2010-07-06

    申请号:US11634399

    申请日:2006-12-05

    申请人: Bolei Guo Youfeng Wu

    发明人: Bolei Guo Youfeng Wu

    IPC分类号: G06F9/45

    CPC分类号: G06F9/45516 G06F8/433

    摘要: A method and apparatus for disambiguating in a dynamic binary translator is described. The method comprises selecting a code segment for load-store memory disambiguation based at least in part on a measure of likelihood of frequency of execution of the code segment; heuristically identifying one or more ambiguous memory dependencies in the code segment for disambiguation by runtime checks; based at least in part on inspecting instructions in the code segment, and using a pointer analysis of the code segment to identify all other ambiguous memory dependencies that can be removed by the runtime checks.

    摘要翻译: 描述了用于在动态二进制转换器中消除歧义的方法和装置。 该方法包括至少部分地基于代码段的执行频率的可能性的度量来选择用于加载存储器消除歧义的代码段; 启发式地通过运行时检查来识别代码段中的一个或多个不明确的存储器依赖关系以消除歧义; 至少部分地基于代码段中的检查指令,并使用代码段的指针分析来识别运行时检查可以移除的所有其他模糊的存储器依赖性。

    Method and system for reducing program code size
    14.
    发明授权
    Method and system for reducing program code size 有权
    减少程序代码大小的方法和系统

    公开(公告)号:US07725887B2

    公开(公告)日:2010-05-25

    申请号:US11020340

    申请日:2004-12-22

    IPC分类号: G06F9/45

    CPC分类号: G06F8/4434

    摘要: In a method for reducing code size, replaceable subsets of instructions at first locations in areas of infrequently executed instructions in a set of instructions and target subsets of instructions at second locations in the set of instructions are identified, wherein each replaceable subset matches at least one target subset. If multiple target subsets of instructions match one replaceable subset of instructions, one of the multiple matching target subsets is chosen as the matching target subset for the one replaceable subset based on whether the multiple target subsets are located in regions of frequently executed code. For each of at least some of the replaceable subsets of instructions, the replaceable subset of instructions is replaced with an instruction to cause the matching target subset of instructions at the second location to be executed.

    摘要翻译: 在减少代码大小的方法中,识别在一组指令中的不经常执行的指令的区域中的第一位置处的指令的可替换子集,以及指令集中的第二位置处的目标指令子集,其中每个可替换子集与至少一个 目标子集。 如果指令的多个目标子集匹配一个可替换的指令子集,则基于多个目标子集是否位于经常执行的代码的区域中,将多个匹配目标子集中的一个选择为一个可替换子集的匹配目标子集。 对于至少一些可替换的指令子集中的每一个,可替换的指令子集被替换为使得执行第二位置处的指令的匹配目标子集的指令。

    COMPACT TRACE TREES FOR DYNAMIC BINARY PARALLELIZATION
    16.
    发明申请
    COMPACT TRACE TREES FOR DYNAMIC BINARY PARALLELIZATION 有权
    用于动态二进制并行化的紧凑跟踪

    公开(公告)号:US20100083236A1

    公开(公告)日:2010-04-01

    申请号:US12242371

    申请日:2008-09-30

    IPC分类号: G06F9/44

    CPC分类号: G06F9/45516

    摘要: Methods and apparatus relating to compact trace trees for dynamic binary parallelization are described. In one embodiment, a compact trace tree (CTT) is generated to improve the effectiveness of dynamic binary parallelization. CTT may be used to determine which traces are to be duplicated and specialized for execution on separate processing elements. Other embodiments are also described and claimed.

    摘要翻译: 描述了用于动态二进制并行化的紧凑跟踪树的方法和设备。 在一个实施例中,生成紧凑跟踪树(CTT)以提高动态二进制并行化的有效性。 可以使用CTT来确定哪些跟踪被复制并专用于在单独的处理元件上执行。 还描述和要求保护其他实施例。

    Continuous trip count profiling for loop optimizations in two-phase dynamic binary translators
    17.
    发明授权
    Continuous trip count profiling for loop optimizations in two-phase dynamic binary translators 失效
    在两相动态二进制转换器中循环优化的连续行程计数分析

    公开(公告)号:US07428731B2

    公开(公告)日:2008-09-23

    申请号:US10816248

    申请日:2004-03-31

    IPC分类号: G06F9/44 G06F9/45

    CPC分类号: G06F9/45525

    摘要: A method, machine readable medium, and system are disclosed. In one embodiment the method comprises collecting a loop trip count continuously during runtime of a region of code being executed that contains a loop, categorizing the trip count to identify one or more code modification techniques applicable to the loop, and dynamically applying the one or more applicable code modification techniques to alter the code that relates to the loop.

    摘要翻译: 公开了一种方法,机器可读介质和系统。 在一个实施例中,该方法包括在包含循环的正在执行的代码区域的运行时期期间连续地收集循环行程计数,对行程计数进行分类,以识别适用于循环的一个或多个代码修改技术,以及动态地应用一个或多个 适用的代码修改技术来改变与循环相关的代码。

    Management of reuse invalidation buffer for computation reuse
    18.
    发明授权
    Management of reuse invalidation buffer for computation reuse 有权
    管理重用无效缓冲区用于计算重用

    公开(公告)号:US07383543B2

    公开(公告)日:2008-06-03

    申请号:US10410032

    申请日:2003-04-08

    申请人: Youfeng Wu

    发明人: Youfeng Wu

    IPC分类号: G06F9/45

    摘要: A mechanism for maintaining reuse invalidation information includes a reuse buffer and a reuse invalidation buffer. The reuse buffer stores multiple instances of the reuse region. Each instance stored in the reuse buffer is identified by one or more versions. The reuse invalidation buffer contains multiple entries. Each entry in the reuse invalidation buffer includes one or more pairs of pointers pointing to instances and versions of instances held in the reuse buffer.

    摘要翻译: 用于维护重用无效信息的机制包括重用缓冲器和重用无效化缓冲器。 重用缓冲区存储重用区域的多个实例。 存储在重用缓冲区中的每个实例由一个或多个版本来标识。 重用无效缓冲区包含多个条目。 重用无效缓冲器中的每个条目包括一对或多对指向重定向缓冲区中保存的实例和版本的指针。

    "> Compressing
    19.
    发明申请
    Compressing "warm" code in a dynamic binary translation environment 有权
    在动态二进制翻译环境中压缩“温暖”代码

    公开(公告)号:US20070079296A1

    公开(公告)日:2007-04-05

    申请号:US11240551

    申请日:2005-09-30

    申请人: Zhiyuan Li Youfeng Wu

    发明人: Zhiyuan Li Youfeng Wu

    IPC分类号: G06F9/45

    CPC分类号: G06F9/45516

    摘要: Selected regions of native instructions translated in a DBT environment from non-native instructions are compressed based on the independent compression of different fields of selected instructions using compression tables to reduce a length of selected fields. The regions of compressed instructions are stored and de-compressed into the native instructions during subsequent execution using de-compression tables. Specifically, for native instructions of a selected region, selected types of opcodes and/or operands may be compressed independently. The types may be selected by profiling the opcodes using benchmark programs and creating an opcode conversion table prior to compression, and scanning of the operands and creating an operand conversion table during compression of the opcodes.

    摘要翻译: 基于使用压缩表的所选指令的不同字段的独立压缩来压缩来自非本地指令的DBT环境中的本地指令的所选区域被压缩以减少所选字段的长度。 压缩指令的区域在后续执行期间使用解压缩表存储和解压缩为本地指令。 具体地,对于所选区域的本地指令,可以独立压缩所选择的操作码类型和/或操作数。 可以通过使用基准程序对操作码进行分析来选择类型,并在压缩之前创建操作码转换表,扫描操作数并在压缩操作码期间创建操作数转换表。