Method for forming device isolation layer of semiconductor device
    11.
    发明申请
    Method for forming device isolation layer of semiconductor device 有权
    半导体器件隔离层形成方法

    公开(公告)号:US20060014361A1

    公开(公告)日:2006-01-19

    申请号:US11182252

    申请日:2005-07-14

    Applicant: Young Kwon

    Inventor: Young Kwon

    CPC classification number: H01L21/76229 H01L21/31056 H01L21/31144

    Abstract: A method for forming a device isolation device of a semiconductor device is disclosed. The method includes the steps of forming a moat pattern for forming a trench on a semiconductor substrate, forming a trench by etching the semiconductor substrate to a predetermined thickness by using the moat pattern, forming a trench isolation layer by depositing a trench filling material on an entire surface of the substrate including the trench by using a high density plasma (HDP) process, partially masking a center region of the substrate and etching the trench isolation layer on edge regions of the substrate to a predetermined thickness, and planarizing the entire surface of the substrate having the trench isolation layer etched. By enhancing the thickness uniformity of the center region and the edge regions of the substrate (or wafer), when forming the trench isolation layer, by using the high density plasma (HDP) process, planarization of the trench isolation layer can be ensured even after the surface planarization process, which can minimize a difference in critical dimension depending upon the position of the center region and edge regions of the gate pattern, which is to be formed in a later process, thereby minimizing differences in device characteristics.

    Abstract translation: 公开了一种用于形成半导体器件的器件隔离器件的方法。 该方法包括以下步骤:在半导体衬底上形成用于形成沟槽的沟槽图案,通过使用护套图案将半导体衬底蚀刻到预定厚度形成沟槽,通过在沟槽填充材料上沉积形成沟槽隔离层 通过使用高密度等离子体(HDP)处理包括沟槽的衬底的整个表面,部分地掩蔽衬底的中心区域并将衬底的边缘区域上的沟槽隔离层蚀刻到预定厚度,并且平坦化整个表面 蚀刻具有沟槽隔离层的衬底。 通过提高衬底(或晶片)的中心区域和边缘区域的厚度均匀性,当形成沟槽隔离层时,通过使用高密度等离子体(HDP)工艺,可以确保沟槽隔离层的平坦化, 表面平坦化处理,其可以根据将在稍后处理中形成的栅极图案的中心区域和边缘区域的位置来最小化临界尺寸的差异,从而最小化器件特性的差异。

    Power amplifier
    12.
    发明授权
    Power amplifier 有权
    功率放大器

    公开(公告)号:US08692620B2

    公开(公告)日:2014-04-08

    申请号:US13541049

    申请日:2012-07-03

    CPC classification number: H03F3/211 H03F1/0211

    Abstract: A power amplifier including a MOSFET including a source supplied with a first DC power, a gate connected to an RF input signal, and a drain connected to a power supply terminal of an RF power amplification unit; a supply voltage modulation control unit that determines a DC gate voltage of the MOSFET based on an envelope of the RF input signal; and a bypass circuit connected between the drain and the power supply terminal. The MOSFET outputs a second DC power via the drain and amplifies the RF input signal based on a third DC power substantially identical to a differential between the first and the second DC power, and also outputs an RF power via the drain. The bypass circuit receives and rectifies the RF power to supply a recycled DC power to the power supply terminal of the RF power amplification unit.

    Abstract translation: 一种功率放大器,包括:包括提供有第一直流电源的源极的MOSFET,连接到RF输入信号的栅极和连接到RF功率放大单元的电源端子的漏极; 电源电压调制控制单元,其基于RF输入信号的包络确定MOSFET的DC栅极电压; 以及连接在漏极和电源端子之间的旁路电路。 MOSFET通过漏极输出第二直流电源,并且基于与第一和第二直流电力之间的差分基本相同的第三直流功率放大RF输入信号,并且还经由漏极输出RF功率。 旁路电路接收并整流RF功率以将再循环的DC电力提供给RF功率放大单元的电源端子。

    POWER AMPLIFIER
    13.
    发明申请
    POWER AMPLIFIER 有权
    功率放大器

    公开(公告)号:US20140009232A1

    公开(公告)日:2014-01-09

    申请号:US13541049

    申请日:2012-07-03

    CPC classification number: H03F3/211 H03F1/0211

    Abstract: A power amplifier including a MOSFET including a source supplied with a first DC power, a gate connected to an RF input signal, and a drain connected to a power supply terminal of an RF power amplification unit; a supply voltage modulation control unit that determines a DC gate voltage of the MOSFET based on an envelope of the RF input signal; and a bypass circuit connected between the drain and the power supply terminal. The MOSFET outputs a second DC power via the drain and amplifies the RF input signal based on a third DC power substantially identical to a differential between the first and the second DC power, and also outputs an RF power via the drain. The bypass circuit receives and rectifies the RF power to supply a recycled DC power to the power supply terminal of the RF power amplification unit.

    Abstract translation: 一种功率放大器,包括:包括提供有第一直流电源的源极的MOSFET,连接到RF输入信号的栅极和连接到RF功率放大单元的电源端子的漏极; 电源电压调制控制单元,其基于RF输入信号的包络确定MOSFET的DC栅极电压; 以及连接在漏极和电源端子之间的旁路电路。 MOSFET通过漏极输出第二直流电源,并且基于与第一和第二直流电力之间的差分基本相同的第三直流功率放大RF输入信号,并且还经由漏极输出RF功率。 旁路电路接收并整流RF功率以将再循环的DC电力提供给RF功率放大单元的电源端子。

    IMPEDANCE MATCHING CIRCUIT CAPABLE OF EFFICIENTLY ISOLATING PATHS FOR MULTI-BAND POWER AMPLIFIER
    14.
    发明申请
    IMPEDANCE MATCHING CIRCUIT CAPABLE OF EFFICIENTLY ISOLATING PATHS FOR MULTI-BAND POWER AMPLIFIER 有权
    具有多功能放大器高效隔离功能的阻抗匹配电路

    公开(公告)号:US20110234316A1

    公开(公告)日:2011-09-29

    申请号:US12732409

    申请日:2010-03-26

    CPC classification number: H03F1/56

    Abstract: In accordance with a representative embodiment, an impedance matching circuit for use at an output stage of a power amplifier is disclosed. The impedance matching circuit comprises: an input port for receiving a frequency band signal; and a plurality of paths, each path being allocated with a principal band signal to be transmitted therethrough and including a path on-off network and a fixed-value impedance matching network. Depending on a type of the received frequency band signal, the path on-off network is configured to activate a selected one of the plurality of paths by rendering an input impedance of the selected path to have a lower absolute magnitude so that the signal is transmitted therethrough, and to deactivate the remaining paths of the plurality of paths by rendering the input impedance thereof to have a higher absolute magnitude so that the signal is not transmitted therethrough. The fixed-value impedance matching network matches a load impedance of the output port of each path to the input impedance thereof, thereby rendering the input impedance thereof to have a prescribed reference value with respect to the principal band signal when said path is activated by the path on-off network.

    Abstract translation: 根据代表性实施例,公开了一种在功率放大器的输出级使用的阻抗匹配电路。 阻抗匹配电路包括:用于接收频带信号的输入端口; 和多个路径,每个路径被分配有要通过其传输的主频带信号,并且包括路径开关网络和固定值阻抗匹配网络。 根据所接收的频带信号的类型,路径开关网络被配置为通过使所选择的路径的输入阻抗具有较低的绝对量值来激活所述多个路径中的所选择的一个路径,使得发送所述信号 并且通过使其输入阻抗具有更高的绝对量值来使多个路径的剩余路径去激活,使得该信号不通过其传输。 固定值阻抗匹配网络将每个路径的输出端口的负载阻抗匹配到其输入阻抗,从而当所述路径被激活时,其输入阻抗相对于主频带信号具有规定的参考值 路径开关网络。

    Semiconductor Device and Method of Manufacturing the Same
    15.
    发明申请
    Semiconductor Device and Method of Manufacturing the Same 审中-公开
    半导体器件及其制造方法

    公开(公告)号:US20070145592A1

    公开(公告)日:2007-06-28

    申请号:US11614106

    申请日:2006-12-21

    Applicant: Young Kwon

    Inventor: Young Kwon

    Abstract: Provided are a semiconductor device and a method for manufacturing the same. The method can include: forming a gate electrode and a source/drain region on a semiconductor substrate; forming a pre metal dielectric insulation layer on the semiconductor substrate, the pre metal dielectric insulation layer including a first insulation layer using a first deposition device and a second insulation layer using a second deposition device, the second deposition device having a relatively higher deposition rate than the first deposition device; and forming a metal pattern on the pre metal dielectric layer, wherein the metal pattern electrically connects to the gate electrode and the source/drain region through the pre metal dielectric insulation layer.

    Abstract translation: 提供半导体器件及其制造方法。 该方法可以包括:在半导体衬底上形成栅极电极和源极/漏极区域; 在所述半导体衬底上形成预金属介电绝缘层,所述预金属介电绝缘层包括使用第一沉积装置的第一绝缘层和使用第二沉积装置的第二绝缘层,所述第二沉积装置具有比 第一沉积装置; 以及在所述预金属介电层上形成金属图案,其中所述金属图案通过所述预金属介电绝缘层与所述栅电极和所述源/漏区电连接。

    Disk recording apparatus
    16.
    发明申请
    Disk recording apparatus 审中-公开
    磁盘记录装置

    公开(公告)号:US20060034007A1

    公开(公告)日:2006-02-16

    申请号:US11131237

    申请日:2005-05-18

    CPC classification number: G11B5/59633

    Abstract: A disk recording apparatus includes a disk to store data, a motor to rotate the disk, an encoder to generate a pulse according to the rotation of the disk, a reference signal output part to output a reference clock signal created using the pulse of the encoder, and a servo writer to record servo data on the disk in synchronization with the reference clock signal supplied from the reference signal output part. The disk recording apparatus can supply an index signal and the reference clock signal in the form of a pulse output from the encoder to detect a motor velocity.

    Abstract translation: 磁盘记录装置包括用于存储数据的磁盘,用于旋转磁盘的电动机,编码器,以根据磁盘的旋转产生脉冲;参考信号输出部分,用于输出使用编码器脉冲产生的参考时钟信号 以及伺服写入器,用于与从参考信号输出部分提供的参考时钟信号同步地将伺服数据记录在盘上。 盘记录装置可以以编码器输出的脉冲的形式提供索引信号和参考时钟信号,以检测电机的速度。

    Illuminating rail system
    17.
    发明申请
    Illuminating rail system 失效
    照明轨道系统

    公开(公告)号:US20050247233A1

    公开(公告)日:2005-11-10

    申请号:US10838065

    申请日:2004-05-04

    Applicant: Young Kwon

    Inventor: Young Kwon

    CPC classification number: B63B45/04 B63B59/02

    Abstract: An illuminating rail system comprising a rail defined by an elongate rear surface and an elongate bottom surface, the rear surface attached to a wall outside the system, the bottom surface upwardly recessed to define along the rail a front panel, a rear panel, and a furrow between the front and rear panels, with an elongate illuminator retained in the furrow.

    Abstract translation: 一种照明轨道系统,包括由细长的后表面和细长的底表面限定的轨道,所述后表面附接到系统外部的壁,所述底表面向上凹入以沿着所述轨道限定前板,后面板和 在前面板和后面板之间的沟槽中,延长的照明器保持在沟槽中。

    Optical coupling module with self-aligned etched grooves and method for fabricating the same
    18.
    发明申请
    Optical coupling module with self-aligned etched grooves and method for fabricating the same 失效
    具有自对准蚀刻槽的光耦合模块及其制造方法

    公开(公告)号:US20050185892A1

    公开(公告)日:2005-08-25

    申请号:US11110100

    申请日:2005-04-19

    CPC classification number: G02B6/3636 G02B6/30 G02B6/3652 G02B6/3692

    Abstract: The present invention relates to an optical coupling module for optically coupling an optical fiber with an optical waveguide, and a method of fabricating the optical coupling module. In an optical coupling module for optically coupling an optical network with a planar lightwave circuit (PLC), an etched groove for disposition of the optical fiber and an etched groove for mounting of the optical waveguide are exposed using a mask having mask patterns that are aligned with each other, and then anisotropically etched. By doing so, the two grooves can be precisely aligned with each other at one time, compared with a conventional method in which an exposure process is carried out two or more times. Accordingly, an inexpensive structure having high optical coupling efficiency upon manual alignment can be obtained. In addition, since a tapered structure in which an inlet is larger than a body is employed in the optical waveguide, tolerance in vertical and horizontal alignment upon manual alignment can be broaden, resulting in improvement of optical coupling efficiency and facilitation of manual alignment. Furthermore, by utilizing a thick insulation film on the substrate or a thick insulation film of the optical waveguide itself as a board, a structure for allowing assembly into and application to a high-frequency electric-optical circuit can be obtained.

    Abstract translation: 本发明涉及光耦合光波导的光耦合模块及其制造方法。 在用于光学耦合光网络与平面光波电路(PLC)的光耦合模块中,用于配置光纤的蚀刻凹槽和用于安装光波导的蚀刻凹槽使用具有对准的掩模图案的掩模来曝光 彼此之间,然后各向异性蚀刻。 通过这样做,与其中曝光处理进行两次或更多次的常规方法相比,两个凹槽可以一次精确对准。 因此,可以获得在手动对准时具有高光耦合效率的便宜的结构。 此外,由于在光波导中采用入口大于体的锥形结构,因此可以使手动对准时的垂直和水平对准中的公差变宽,从而提高光耦合效率并促进手动对准。 此外,通过将基板上的厚绝缘膜或光波导本身的厚绝缘膜用作基板,可以获得用于组装到高频电光电路中并应用于其的结构。

    Automatic feature detection and age classification of human faces in
digital images
    20.
    发明授权
    Automatic feature detection and age classification of human faces in digital images 失效
    数字图像中人脸的自动特征检测和年龄分类

    公开(公告)号:US5781650A

    公开(公告)日:1998-07-14

    申请号:US922117

    申请日:1997-08-28

    CPC classification number: G06K9/00221 G06K2009/00322

    Abstract: The invention includes a four step process for automatically finding facial images of a human face in an electronically digitized image (for example, taken by a video-camera), and classifying the age of the person (associated with the face) into an age category. For example three age categories: a baby(up to approximately age 3), a junior person(above age 3 to approximately age forty), and a senior adult (over forty years old). Categories can be further subdivided whereas every three years could be a further age category. Step 1 of the process is to find facial features of the digital image encompassing the chin, sides of the face, virtual top of the head, eyes, mouth and nose of the image. Step 2 is to compute the facial feature ratios of the facial features ratios of the facial features found in Step 1. Step 3 is to compute a wrinkle analysis of the image. Step 4 is to combine the previous two steps to categorize age of the facial image. The invention can locate and detect facial images for age classification from digital camera images and computerized generated images. The invention can be practiced in areas such as population statistic gathering for patrons at entertainment/amusement parks, television viewer ratings. Furthermore, the invention has utility in automated security/surveillance systems, demographic studies, safety monitoring systems, computer human-interface operations and automated photography. The latter to allow for point and shoot focus on specific individuals as a function of their age classification.

    Abstract translation: 本发明包括用于在电子数字化图像(例如,由摄像机拍摄)中自动发现人脸的脸部图像并将人的年龄(与脸部相关联)分类为年龄类别的四步骤过程 。 例如三个年龄类别:一名婴儿(约3岁),一名初级人士(3岁以上至40岁左右)和一名高龄成年人(40岁以上)。 类别可以进一步细分,而每三年可以进一步分类。 该过程的第1步是找到包含下巴,脸部侧面,虚拟顶部的头部,眼睛,嘴和鼻子的数字图像的面部特征。 步骤2是计算步骤1中发现的面部特征的面部特征比的面部特征比。步骤3是计算图像的皱纹分析。 步骤4是结合前面的两个步骤来对脸部图像的年龄进行分类。 本发明可以从数码相机图像和计算机生成的图像中定位和检测用于年龄分类的面部图像。 本发明可以在诸如娱乐/游乐园的顾客的人口统计收集,电视观众评级等领域中实践。 此外,本发明可用于自动化安全/监控系统,人口学研究,安全监控系统,计算机人机接口操作和自动摄影。 后者允许对特定个人的点和焦点作为其年龄分类的函数。

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