公开(公告)号：US07257702B2

公开(公告)日：2007-08-14

申请号：US10548290

申请日：2004-04-16

申请人： Mikihiko Yamada ,  Norihiko Mizobata ,  Taku Arakawa

发明人： Mikihiko Yamada ,  Norihiko Mizobata ,  Taku Arakawa

IPC分类号： G06F9/455

CPC分类号： G06F9/4403

摘要： With a temporary operating unit being operating, a user provides a boot timing using a boot timing instructing unit. This causes a CPU to compute a boot preparation timing based on the boot timing, and store the boot timing and boot preparation timing to a boot timing memory. At this time, a timer begins a time-keeping operation. After that, the user turns off the power to the temporary operating unit. A boot preparation instructing unit determines whether or not the time being measured by the timer coincides with the boot preparation timing stored in the boot timing memory. When the time measured by the timer coincides with the boot preparation timing stored in the boot timing memory, the boot preparation instructing unit provides the CPU with a boot preparation instruction. This turns on the power to the temporary operating unit, and the CPU performs a boot preparation.

摘要翻译： 在操作临时操作单元的情况下，用户使用引导定时指令单元提供启动定时。 这导致CPU基于引导定时计算引导准备定时，并将引导定时和引导准备时序存储到引导定时存储器。 此时，定时器开始计时操作。 之后，用户关闭临时操作单元的电源。 引导准备指示单元确定定时器测量的时间是否与存储在引导定时存储器中的引导准备定时一致。 当由定时器测量的时间与存储在引导定时存储器中的引导准备定时一致时，引导准备指令单元向CPU提供引导准备指令。 这将打开临时操作单元的电源，并且CPU执行启动准备。

公开(公告)号：US07123306B1

公开(公告)日：2006-10-17

申请号：US09655394

申请日：2000-09-05

申请人： Shoichi Goto ,  Norihiko Mizobata ,  Hiroyuki Iitsuka ,  Masazumi Yamada ,  Ryogo Yanagisawa

发明人： Shoichi Goto ,  Norihiko Mizobata ,  Hiroyuki Iitsuka ,  Masazumi Yamada ,  Ryogo Yanagisawa

IPC分类号： H04N7/87 ,  H04J3/06

CPC分类号： H04N21/4344 ,  H04J3/0632 ,  H04N21/23608 ,  H04N21/4305 ,  H04N21/43632

摘要： A data transmitter for detecting a reference time stamp for use in reproducing a system clock from a transport packet data of a first transport stream, adding the detected reference time stamp as a header information to the transport packet data, converting the transport packet data and the header information into a second transport stream, and transmitting the second transport stream.

摘要翻译： 一种数据发送器，用于检测用于从第一传输流的传输分组数据再现系统时钟的参考时间戳，将检测到的参考时间戳作为标题信息添加到传输分组数据，转换传输分组数据和 头信息转换成第二传输流，并发送第二传输流。

公开(公告)号：US5892518A

公开(公告)日：1999-04-06

申请号：US687892

申请日：1996-07-26

申请人： Norihiko Mizobata ,  Takuya Sayama

发明人： Norihiko Mizobata ,  Takuya Sayama

IPC分类号： G06T15/04 ,  G06T11/40

CPC分类号： G06T15/04

摘要： An image generating apparatus of the present invention includes a pixel calculation circuit for performing a calculation by using two sets of image data, wherein the pixel calculation circuit performs a calculation for a motion compensation processing procedure by using pixel data of a reference image and pixel data of a differential image in the case where the motion compensation processing procedure is performed, and performs a calculation for a texture mapping processing procedure by using pixel data of a mapping image and pixel data in a polygon in the case where the texture mapping processing procedure is performed.

摘要翻译： 本发明的图像产生装置包括：像素计算电路，用于通过使用两组图像数据进行计算，其中像素计算电路通过使用参考图像的像素数据和像素数据来执行运动补偿处理过程的计算 在执行运动补偿处理过程的情况下，通过使用映射图像的像素数据和多边形中的像素数据来进行纹理映射处理过程的计算，在纹理映射处理过程为 执行。

公开(公告)号：US5694560A

公开(公告)日：1997-12-02

申请号：US579131

申请日：1995-12-27

申请人： Masaru Uya ,  Norihiko Mizobata ,  Takuya Sayama ,  Satoshi Takahashi ,  Takeshi Ichise ,  Takeshi Kawano ,  Taizo Tsujimoto

发明人： Masaru Uya ,  Norihiko Mizobata ,  Takuya Sayama ,  Satoshi Takahashi ,  Takeshi Ichise ,  Takeshi Kawano ,  Taizo Tsujimoto

IPC分类号： G06F3/14 ,  G06F3/048 ,  G06F3/153 ,  G06T3/00 ,  G06T11/00 ,  G06T13/00 ,  G06T13/20 ,  G06T13/80 ,  G09G5/06 ,  G09G5/14 ,  G09G5/36 ,  G06F15/00

CPC分类号： G09G5/14 ,  G06T11/00 ,  G09G5/06 ,  G09G2340/125

摘要： A dynamic-image displaying workstation provided with a display device for displaying an image, a video signal processing circuit for outputting dynamic-image data representing a dynamic image corresponding to a video signal, a first dual port memory for receiving and storing the dynamic-image data outputted from the video signal processing circuit, a second dual port memory for storing data representing pixels of an image to be displayed by the display device, and a third dual port memory for storing data representing a window area. The window area is an area of a window, to which the dynamic-image belongs, and is not covered by any other windows. The workstation is further provided with a fourth dual port memory for storing data representing a dynamic-image display effective area corresponding to the dynamic image represented by the dynamic-image stored in the first dual port memory, a data selector for receiving data read from the first dual port memory at a first input terminal thereof, and data read from the second dual port memory at a second input terminal thereof, for selecting one of the third and fourth dual port memories and receiving data read from the selected dual port memory at a third input terminal thereof, for selecting the data received at the first input terminal thereof if the data read from the third dual port memory is the data representing the window area, and the data read from the third dual port memory is the data representing the dynamic-image display effective area, for selecting the data received at the second input terminal thereof and for outputting a signal representing the selected data to the display device.

摘要翻译： 一种具有显示图像的显示装置的动态图像显示工作站，用于输出表示与视频信号相对应的动态图像的动态图像数据的视频信号处理电路，用于接收和存储动态图像的第一双端口存储器 从视频信号处理电路输出的数据，用于存储表示要由显示装置显示的图像的像素的数据的第二双端口存储器，以及用于存储表示窗口区域的数据的第三双端口存储器。 窗口区域是动态图像所属的窗口区域，不被任何其他窗口覆盖。 该工作站还设置有第四双端口存储器，用于存储表示与由存储在第一双端口存储器中的动态图像表示的动态图像相对应的动态图像显示有效区域的数据，用于接收从第一双端口存储器读取的数据的数据选择器 在其第一输入端处的第一双端口存储器，以及在其第二输入端从第二双端口存储器读取的数据，用于选择第三和第四双端口存储器中的一个并且接收从所选择的双端口存储器读取的数据 如果从第三双端口存储器读取的数据是表示窗口区域的数据，并且从第三双端口存储器读取的数据是表示动态的数据的数据，则用于选择在其第一输入端子接收的数据 - 图像显示有效区域，用于选择在其第二输入端接收的数据，并将表示所选数据的信号输出到di 喷射装置

公开(公告)号：US5530797A

公开(公告)日：1996-06-25

申请号：US43753

申请日：1993-04-07

申请人： Masaru Uya ,  Norihiko Mizobata ,  Takuya Sayama ,  Satoshi Takahashi ,  Takeshi Ichise ,  Takeshi Kawano ,  Taizou Tsujimoto

发明人： Masaru Uya ,  Norihiko Mizobata ,  Takuya Sayama ,  Satoshi Takahashi ,  Takeshi Ichise ,  Takeshi Kawano ,  Taizou Tsujimoto

IPC分类号： G09G5/14 ,  G06F12/00

CPC分类号： G09G5/14 ,  G09G2340/125

摘要： Pixel data is selected from among first and second dynamic-image memories (DI1, DI2) and a static-memory (SI). In the invention, (a) first and second window area memories (WA1, WA2) for designating shapes and sizes of windows to which video dynamic-images are assigned respectively, (b) first and second dynamic-image area memories (DA1, DA2) for designating memory locations of data stored in both the dynamic-image memories, and (c) a priority control register for designating which video dynamic-image should be displayed in front when video dynamic-images overlap with each other are provided, whereby display for every pixel is executed according to a logical AND value of read-out data from WA1 and read-out data from DA1, a logical AND value of read-out data from WA2 and read-out data from DA2, and read-out data from the priority control register. Thus two video dynamicimages assigned to their respective windows are simultaneously displayed while subjecting them to overlap control, and special techniques including auto-zooming can be accomplished in real time.

摘要翻译： 从第一和第二动态图像存储器（DI1，DI2）和静态存储器（SI）中选择像素数据。 在本发明中，（a）用于分别指定视频动态图像的窗口的形状和尺寸的第一和第二窗口区域存储器（WA1，WA2），（b）第一和第二动态图像区域存储器（DA1，DA2） ），用于指定存储在动态图像存储器中的数据的存储器位置，以及（c）优先级控制寄存器，用于指定当视频动态图像彼此重叠时应在前面显示哪个视频动态图像，由此显示 对于每个像素，根据来自WA1的读出数据的逻辑与值和来自DA1的读出数据，来自WA2的读出数据的逻辑与值和来自DA2的读出数据和读出数据执行每个像素 从优先级控制寄存器。 因此，分配给它们各自的窗口的两个视频动态图像被同时显示，同时使它们重叠控制，并且可以实时完成包括自动缩放的特殊技术。

公开(公告)号：US07151784B2

公开(公告)日：2006-12-19

申请号：US10196719

申请日：2002-07-17

申请人： Tomoya Sato ,  Kazuhisa Tanaka ,  Norihiko Mizobata

发明人： Tomoya Sato ,  Kazuhisa Tanaka ,  Norihiko Mizobata

IPC分类号： H04J3/02

CPC分类号： H04N5/4401 ,  H04N21/4263 ,  H04N21/4347 ,  H04N21/4424 ,  H04N21/4622

摘要： A demultiplexer circuit which can simultaneously demultiplex plural pieces of input data while minimizing the circuit scale. The demultiplexer circuit includes an input line identification information addition circuit 2 for giving input line identification information to input data which have data identification information and are inputted through plural input lines 1, respectively; a multiplexer 4 for outputting the input data which have been given the input line identification information, respectively, by the input line identification information addition circuit 2 through one common line 5; a filter 6 for filtering the data outputted from the multiplexer 4 on the basis of the input line identification information and the data identification information at one time; and a filter table 7 that contains filtering conditions which are used in the filter 6.

摘要翻译： 解复用器电路，其可以同时解复用多个输入数据，同时最小化电路规模。 解复用器电路包括输入行识别信息添加电路2，用于给输入行识别信息输入具有数据识别信息的输入数据，并分别通过多个输入行1输入; 多路复用器4，用于通过输入行识别信息添加电路2通过一条公共线5分别输出已经被输入输入行识别信息的输入数据; 滤波器6，用于根据输入线识别信息和数据识别信息一次滤波从多路复用器4输出的数据; 以及包含在过滤器6中使用的过滤条件的过滤器表7。

公开(公告)号：US07061930B2

公开(公告)日：2006-06-13

申请号：US09973090

申请日：2001-10-10

申请人： Norihiko Mizobata

发明人： Norihiko Mizobata

IPC分类号： H04L12/54

CPC分类号： H04N21/42692 ,  H04N21/426 ,  H04N21/42615 ,  H04N21/434 ,  H04N21/4435

摘要： A demultiplexer is provided with a PID extractor for extracting a PID of each TS packet from an inputted transport stream; a PID comparator for detecting whether or not the extracted PID matches any of PIDs which are set on a PID table, and outputting an entry number of the PID table where the corresponding PID is set, as a matching PID entry number, when a match is detected; a packet selector for selecting TS packets whose PIDs are detected by the PID comparator; and a data storage controller for determining an area in a memory where each TS packet is to be stored, according to the matching PID entry number; wherein TS packets having different PIDs are multiplexed and stored into a video data storage area in the memory. Therefore, when plural kinds of video data are included in the same program on digital broadcasting, these plural kinds of video data can be reproduced simultaneously.

公开(公告)号：US06760382B1

公开(公告)日：2004-07-06

申请号：US09402179

申请日：2000-02-04

申请人： Norihiko Mizobata

发明人： Norihiko Mizobata

IPC分类号： H04L2700

CPC分类号： H04L12/40006 ,  H04L12/18 ,  H04L12/40013 ,  H04L12/403 ,  H04L29/06 ,  H04L29/06027 ,  H04L67/24 ,  H04L67/306 ,  H04L67/325 ,  H04L67/327 ,  H04L69/22 ,  H04L69/329 ,  H04N7/1675 ,  H04N21/26606 ,  H04N21/4623

摘要： A digital communication system comprises a transmitter for sequentially transmitting predetermined format data; and a plurality of receivers 102 each including a data selecting apparatus 104 for selecting required data from received data group and outputting selected data. The transmitter transmits data to the receivers in one of a first transmission mode having group destination directing information indicating that the data is to be transmitted to a receiving group consisting of predetermined receivers of the plurality of receivers, group specifying information for specifying a receiving group of receiving groups to which the data is to be transmitted, and in-group identification information for identifying a receiver in an arbitrary receiving group to which the data is to be transmitted, a second transmission mode having the group destination directing information and the group specifying information are included in the data, and a third transmission mode having the group destination directing information.

摘要翻译： 数字通信系统包括用于顺序发送预定格式数据的发射机; 以及多个接收机102，每个接收机102包括用于从接收的数据组中选择所需数据并输出所选择的数据的数据选择装置104。 所述发射机以具有指示将要发送所述数据的组目的地定向信息的第一发送模式中的一个向所述接收机发送数据到由所述多个接收机中的预定接收机组成的接收组，用于指定所述接收组的接收组的组指定信息 用于识别要发送数据的任意接收组中的接收机的组内识别信息，具有组目的地导向信息和组指定信息的第二发送模式 被包括在数据中，以及具有组目的地定向信息的第三传输模式。

公开(公告)号：US6115434A

公开(公告)日：2000-09-05

申请号：US162298

申请日：1998-09-28

申请人： Norihiko Mizobata ,  Tomohiro Okuno ,  Wakahiko Okazaki ,  Kazuhisa Tanaka

发明人： Norihiko Mizobata ,  Tomohiro Okuno ,  Wakahiko Okazaki ,  Kazuhisa Tanaka

IPC分类号： H04L12/70 ,  H04N5/00 ,  H04N7/08 ,  H04N7/081 ,  H04N7/24 ,  H04N7/52 ,  H04N19/00 ,  H04L27/06

CPC分类号： H04N21/4345 ,  H04N21/235 ,  H04N21/434 ,  H04N21/435 ,  H04N7/52

摘要： A data match detecting apparatus which sequentially receives input data comprising plural fields, comprises parameter storage which contains a parameter group comprising plural parameters which are checked to detect a match between the plural fields and the plural parameters; parameter selector for selecting a parameter corresponding to a field input as the input data from the parameter storage and outputting the selected parameter; data comparator for checking match between the parameter output from the parameter selector and the input data; a comparison result storing circuit initialing its storage content to match before a first field of the input data for which match detection should be performed is input, storing a comparison result of a comparison result decider when there is an input field, and outputting its storage content when all the fields of the input data for which match detection should be performed have been input; and the comparison result decider storing match in the comparison result storage when the storage content of the comparison result storage and the comparison result of the data comparator are match.

摘要翻译： 一种数据匹配检测装置，其顺序地接收包括多个字段的输入数据，包括参数存储器，其包含参数组，所述参数组包括被检查以检测所述多个字段与所述多个参数之间的匹配的多个参数; 参数选择器，用于从参数存储器中选择与场输入对应的参数作为输入数据并输出所选参数; 数据比较器，用于检查参数选择器输出的参数与输入数据之间的匹配; 比较结果存储电路在输入要进行匹配检测的输入数据的第一场之前初始化其存储内容进行匹配，存储当存在输入场时比较结果判定器的比较结果，并输出其存储内容 当输入匹配检测的输入数据的所有字段都被输入时; 并且当比较结果存储的存储内容和数据比较器的比较结果相匹配时，比较结果判定器存储在比较结果存储中。

公开(公告)号：US08284323B2

公开(公告)日：2012-10-09

申请号：US12440713

申请日：2008-07-08

申请人： Tomokuni Yamaguchi ,  Norihiko Mizobata ,  Shirou Yoshioka

发明人： Tomokuni Yamaguchi ,  Norihiko Mizobata ,  Shirou Yoshioka

IPC分类号： H04N7/01

CPC分类号： H04N5/44 ,  H04N5/63 ,  H04N21/4436

摘要： In a video audio processing device, a signal processing block (11, 12) includes an instruction memory (111, 121) and performs signal processing in accordance with a program loaded into the instruction memory. A main storage section (20) has a self-refresh function and is accessible from the signal processing block. An auxiliary storage section (30) stores the program for making the signal processing block perform the signal processing. Upon receipt of a standby instruction, a control section (15) performs control in such a manner as to transfer the program from the auxiliary storage section to the main storage section, and set self-refresh in the main storage section, and upon receipt of a return instruction, performs control in such a manner as to cancel the self-refresh in the main storage section, load the program from the main storage section to the instruction memory in the signal processing block, and activate the signal processing block.

摘要翻译： 在视频音频处理装置中，信号处理块（11,12）包括指令存储器（111,121），并根据加载到指令存储器中的程序进行信号处理。 主存储部分（20）具有自刷新功能，并且可从信号处理块访问。 辅助存储部分（30）存储用于使信号处理块执行信号处理的程序。 控制部（15）在接收到备用指示时，以从辅助存储部向主存储部传送程序的方式进行控制，在主存储部中设置自刷新，并且在接收到 返回指令以取消主存储部中的自刷新的方式进行控制，将程序从主存储部加载到信号处理块中的指令存储器，并且激活信号处理块。