公开(公告)号：US20110039447A1

公开(公告)日：2011-02-17

申请号：US12540066

申请日：2009-08-12

申请人： Chih-Ming Lai ,  Yung-Shun Kao

发明人： Chih-Ming Lai ,  Yung-Shun Kao

IPC分类号： H01R13/60

CPC分类号： H01R13/6582

摘要： A connector to be disposed within a housing of an electronic device includes a main body and a conduction member. The conduction member includes a connecting portion and a resilient portion. The resilient portion is formed on the connecting portion and configured to abut against the housing.

摘要翻译： 设置在电子设备的壳体内的连接器包括主体和导电构件。 导电构件包括连接部分和弹性部分。 弹性部分形成在连接部分上并被构造成抵靠壳体。

公开(公告)号：US07768288B2

公开(公告)日：2010-08-03

申请号：US11654558

申请日：2007-01-18

申请人： Yung-Shun Kao ,  Chih-Ming Lai

发明人： Yung-Shun Kao ,  Chih-Ming Lai

IPC分类号： G01R31/02

CPC分类号： G01R31/31905 ,  G01R31/31718 ,  H05K1/141 ,  H05K3/225 ,  H05K3/325 ,  H05K2201/049 ,  H05K2201/10053 ,  H05K2201/10303 ,  H05K2201/1053 ,  H05K2201/10689

摘要： A detection device for a chip. A faulty chip is detected from a plurality of chips via the detection device. The chips are installed on a printed circuit board. The detection device electrically connected to the printed circuit board comprises a updateable chip and a substitute printed circuit board. The substitute printed circuit board is electrically connected to the updateable chip and comprises a plurality of pins disposed on two sides thereof for connecting to each chip.

摘要翻译： 一种用于芯片的检测装置。 经由检测装置从多个芯片检测到故障芯片。 芯片安装在印刷电路板上。 电连接到印刷电路板的检测装置包括可更新芯片和替代印刷电路板。 替代印刷电路板电连接到可更新芯片，并且包括设置在其两侧的多个引脚以连接到每个芯片。

公开(公告)号：US08096834B2

公开(公告)日：2012-01-17

申请号：US12540066

申请日：2009-08-12

申请人： Chih-Ming Lai ,  Yung-Shun Kao

发明人： Chih-Ming Lai ,  Yung-Shun Kao

IPC分类号： H01R13/648

CPC分类号： H01R13/6582

摘要： A connector to be disposed within a housing of an electronic device includes a main body and a conduction member. The conduction member includes a connecting portion and a resilient portion. The resilient portion is formed on the connecting portion and configured to abut against the housing.

摘要翻译： 设置在电子设备的壳体内的连接器包括主体和导电构件。 导电构件包括连接部分和弹性部分。 弹性部分形成在连接部分上并被构造成抵靠壳体。

公开(公告)号：US07775811B2

公开(公告)日：2010-08-17

申请号：US12289307

申请日：2008-10-24

申请人： Chih-Ming Lai ,  Yung-Shun Kao

发明人： Chih-Ming Lai ,  Yung-Shun Kao

IPC分类号： H01R13/44

CPC分类号： H01R13/443 ,  H01R13/64

摘要： A connector protecting cover and a circuit board module using the same are provided. The circuit board module includes a circuit board, a plurality of electronic devices, a connector, and a connector protecting cover. The electronic devices are disposed on the circuit board. The connector is disposed on the circuit board and includes a plurality of connecting terminals connected to the circuit board. The connector protecting cover includes a top wall, a circular side wall connected to the top wall, and a partition. The partition is connected to the circular side wall. The top wall, the circular side wall, and the partition define a plurality of accommodation spaces. The partition and the circular side wall are together used for clipping the connecting terminals, such that the connecting terminals are located in the accommodation spaces.

公开(公告)号：US10096544B2

公开(公告)日：2018-10-09

申请号：US13464055

申请日：2012-05-04

申请人： Chih-Ming Lai ,  Wen-Chun Huang ,  Ru-Gun Liu ,  Pi-Tsung Chen

发明人： Chih-Ming Lai ,  Wen-Chun Huang ,  Ru-Gun Liu ,  Pi-Tsung Chen

IPC分类号： H01L31/00 ,  H01L23/48 ,  H01L23/52 ,  H01L29/40 ,  H01L23/522 ,  H01L23/528 ,  H01L23/532 ,  H01L21/768

摘要： The present disclosure provides an interconnect structure for a semiconductor device. The interconnect structure includes a first metal layer that contains a first metal line. The interconnect structure includes a dielectric layer located over the first metal layer. The dielectric layer contains a first sub-via electrically coupled to the first metal line and a second sub-via electrically coupled to the first sub-via. The second sub-via is different from the first sub-via. The interconnect structure includes a second metal layer located over the dielectric layer. The second metal layer contains a second metal line electrically coupled to the second sub-via. No other metal layer is located between the first metal layer and the second metal layer.

公开(公告)号：US08759186B2

公开(公告)日：2014-06-24

申请号：US13354334

申请日：2012-01-20

申请人： Yung-Hui Yeh ,  Chih-Ming Lai

发明人： Yung-Hui Yeh ,  Chih-Ming Lai

IPC分类号： H01L33/08

CPC分类号： H01L29/7869 ,  H01L27/1225 ,  H01L27/1248 ,  H01L29/66969

摘要： A method for manufacturing a semiconductor device includes forming a metal oxide semiconductor layer and a first insulating layer on a substrate. A gate is formed on the first insulating layer. The first insulating layer is patterned by using the gate as an etching mask so as to expose the metal oxide semiconductor layer to serve as a source region and a drain region. A dielectric layer is formed on the substrate to cover the gate and the oxide semiconductor layer, where the dielectric layer has at least one of hydrogen group and hydroxyl group. A heating treatment is performed so that the at least one of hydrogen group and hydroxyl group reacts with the source region and the drain region. A source electrode and a drain electrode electrically connected to the source region and the drain region respectively are formed on the dielectric layer.

摘要翻译： 一种制造半导体器件的方法包括在衬底上形成金属氧化物半导体层和第一绝缘层。 在第一绝缘层上形成栅极。 通过使用栅极作为蚀刻掩模来对第一绝缘层进行构图，以使金属氧化物半导体层暴露于源极区和漏极区。 在基板上形成介电层以覆盖栅极和氧化物半导体层，其中电介质层具有氢基和羟基中的至少一个。 进行加热处理，使得氢基和羟基中的至少一个与源极区和漏极区反应。 在电介质层上分别形成与源极区域和漏极区域电连接的源极电极和漏极电极。

公开(公告)号：US08587862B2

公开(公告)日：2013-11-19

申请号：US13218462

申请日：2011-08-26

申请人： Jiun-Wei Liou ,  Jun-Ying Li ,  Chih-Ming Lai ,  Chern-Lin Chen ,  Way-Seen Wang ,  Lung-Han Peng

发明人： Jiun-Wei Liou ,  Jun-Ying Li ,  Chih-Ming Lai ,  Chern-Lin Chen ,  Way-Seen Wang ,  Lung-Han Peng

IPC分类号： G02F1/37 ,  G02F1/35

CPC分类号： G02F1/37 ,  G02F1/3558 ,  G02F1/3775

摘要： A second-harmonic generation nonlinear frequency converter includes a nonlinear optical crystal. The nonlinear optical crystal includes a plurality of sections. The sections connect to each other in sequence, and each section has a phase different from others. Each of the phases includes a positive domain and a negative domain. Each of the sections includes a plurality of quasi-phase-matching structures. The quasi-phase-matching structures connect to each other in sequence and have the same phase in one section.

摘要翻译： 二次谐波发生非线性频率转换器包括非线性光学晶体。 非线性光学晶体包括多个部分。 这些部分依次相互连接，每个部分的阶段与其他部分不同。 每个相包括正域和负域。 每个部分包括多个准相位匹配结构。 准相位匹配结构依次相互连接，在一个部分中具有相同的相位。

公开(公告)号：US20130126859A1

公开(公告)日：2013-05-23

申请号：US13354334

申请日：2012-01-20

申请人： Yung-Hui Yeh ,  Chih-Ming Lai

发明人： Yung-Hui Yeh ,  Chih-Ming Lai

IPC分类号： H01L33/08 ,  H01L33/44

CPC分类号： H01L29/7869 ,  H01L27/1225 ,  H01L27/1248 ,  H01L29/66969

摘要： A method for manufacturing a semiconductor device includes forming a metal oxide semiconductor layer and a first insulating layer on a substrate. A gate is formed on the first insulating layer. The first insulating layer is patterned by using the gate as an etching mask so as to expose the metal oxide semiconductor layer to serve as a source region and a drain region. A dielectric layer is formed on the substrate to cover the gate and the oxide semiconductor layer, where the dielectric layer has at least one of hydrogen group and hydroxyl group. A heating treatment is performed so that the at least one of hydrogen group and hydroxyl group reacts with the source region and the drain region. A source electrode and a drain electrode electrically connected to the source region and the drain region respectively are formed on the dielectric layer.

摘要翻译： 一种制造半导体器件的方法包括在衬底上形成金属氧化物半导体层和第一绝缘层。 在第一绝缘层上形成栅极。 通过使用栅极作为蚀刻掩模来对第一绝缘层进行构图，以使金属氧化物半导体层暴露于源极区和漏极区。 在基板上形成介电层以覆盖栅极和氧化物半导体层，其中电介质层具有氢基和羟基中的至少一个。 进行加热处理，使得氢基和羟基中的至少一个与源极区和漏极区反应。 在电介质层上分别形成与源极区域和漏极区域电连接的源极电极和漏极电极。

公开(公告)号：US08350450B2

公开(公告)日：2013-01-08

申请号：US12749472

申请日：2010-03-29

申请人： Chih-Chung Tsao ,  Chih-Ming Lai ,  Yu-Pin Liu

发明人： Chih-Chung Tsao ,  Chih-Ming Lai ,  Yu-Pin Liu

IPC分类号： H01J61/42

CPC分类号： F21V29/004 ,  F21K9/232 ,  F21V29/78 ,  F21Y2107/20 ,  F21Y2115/10

摘要： An LED lamp includes a heat sink including a base having a heat-dissipating face, an LED module including a printed circuit board mounted on the base and a plurality of LEDs disposed on the printed circuit board, and a connecter electrically connecting the LED module to a power supply. The heat sink further includes a plurality of spiral fins protruding outwardly from the heat-dissipating face of the base.

摘要翻译： LED灯包括散热器，该散热器包括具有散热面的基座，包括安装在基座上的印刷电路板的LED模块和布置在印刷电路板上的多个LED，以及将LED模块电连接到 电源。 散热器还包括从基座的散热面向外突出的多个螺旋形翅片。

公开(公告)号：US08337053B2

公开(公告)日：2012-12-25

申请号：US12795821

申请日：2010-06-08

申请人： Tien-Pao Chen ,  Chih-Ming Lai

发明人： Tien-Pao Chen ,  Chih-Ming Lai

IPC分类号： F21V3/00

CPC分类号： F21V5/04 ,  F21V5/08 ,  F21W2131/103 ,  F21Y2115/10 ,  G02B19/0014 ,  G02B19/0061

摘要： A lens applied to a light emitting element includes a first surface profile and a second surface profile opposite to the first surface profile. The first surface profile defines a first trench facing the light emitting element, and the first trench includes a bottom curved surface serving as a light incident surface. The second surface profile includes a top curved surface, and serves as a light emitting surface. Both the bottom and the top curved surfaces are mirror symmetric to the first suppositional plane P1 (X=0), and mirror asymmetric to the second suppositional plane P2 (Y=0) to cooperatively adjust light from the light emitting element to obtain an asymmetric light field. An illumination device having the lens is further provided.

摘要翻译： 应用于发光元件的透镜包括第一表面轮廓和与第一表面轮廓相对的第二表面轮廓。 第一表面轮廓限定面向发光元件的第一沟槽，并且第一沟槽包括用作光入射表面的底部弯曲表面。 第二表面轮廓包括顶部曲面，并且用作发光表面。 底部和顶部曲面都与第一假想平面P1（X = 0）镜面对称，并且镜子不对称于第二假想平面P2（Y = 0），以协调地调节来自发光元件的光以获得不对称 光场。 还提供了具有透镜的照明装置。