Patterning Method for High Density Pillar Structures
    11.
    发明申请
    Patterning Method for High Density Pillar Structures 有权
    高密度柱结构图案化方法

    公开(公告)号:US20120276744A1

    公开(公告)日:2012-11-01

    申请号:US13463260

    申请日:2012-05-03

    IPC分类号: H01L21/302

    摘要: A method of making a device includes forming a first photoresist layer over a sacrificial layer, patterning the first photoresist layer to form first photoresist features, rendering the first photoresist features insoluble to a solvent, forming a second photoresist layer over the first photoresist features, patterning the second photoresist layer to form second photoresist features, forming a spacer layer over the first and second photoresist features, etching the spacer layer to form spacer features and to expose the first and second photoresist features, forming third photoresist features between the spacer features, removing the spacer features, and patterning the sacrificial layer using the first, second and third photoresist features as a mask to form sacrificial features.

    摘要翻译: 制造器件的方法包括在牺牲层上形成第一光致抗蚀剂层,图案化第一光致抗蚀剂层以形成第一光致抗蚀剂特征,使得第一光致抗蚀剂特征不溶于溶剂,在第一光致抗蚀剂特征上形成第二光致抗蚀剂层, 第二光致抗蚀剂层以形成第二光致抗蚀剂特征,在第一和第二光致抗蚀剂特征上形成间隔层,蚀刻间隔层以形成间隔物特征并暴露第一和第二光致抗蚀剂特征,在间隔物特征之间形成第三光致抗蚀剂特征,去除 间隔物特征,并且使用第一,第二和第三光致抗蚀剂特征作为掩模来图案化牺牲层以形成牺牲特征。

    RESIST FEATURE AND REMOVABLE SPACER PITCH DOUBLING PATTERNING METHOD FOR PILLAR STRUCTURES
    13.
    发明申请
    RESIST FEATURE AND REMOVABLE SPACER PITCH DOUBLING PATTERNING METHOD FOR PILLAR STRUCTURES 有权
    用于支柱结构的阻力特征和可拆卸间隔器双重方式

    公开(公告)号:US20120094478A1

    公开(公告)日:2012-04-19

    申请号:US13331267

    申请日:2011-12-20

    IPC分类号: H01L21/28 H01L21/311

    摘要: A method of making a semiconductor device includes forming a layer over a substrate, forming a plurality of spaced apart features of imagable material over the layer, forming sidewall spacers on the plurality of features and filling a space between a first sidewall spacer on a first feature and a second sidewall spacer on a second feature with a filler feature. The method also includes removing the sidewall spacers to leave the first feature, the filler feature and the second feature spaced apart from each other, and etching the layer using the first feature, the filler feature and the second feature as a mask.

    摘要翻译: 制造半导体器件的方法包括在衬底上形成层,在该层上形成可成像材料的多个间隔特征,在多个特征上形成侧壁间隔物,并填充第一特征上的第一侧壁间隔物之间​​的空间 以及具有填充特征的第二特征上的第二侧壁间隔物。 该方法还包括去除侧壁间隔物以留下第一特征,填料特征和第二特征彼此间隔开,并且使用第一特征,填充物特征和第二特征作为掩模来蚀刻层。

    Resist feature and removable spacer pitch doubling patterning method for pillar structures
    14.
    发明授权
    Resist feature and removable spacer pitch doubling patterning method for pillar structures 有权
    支柱结构的抗蚀特征和可移除的间隔物间距倍增图案化方法

    公开(公告)号:US08084347B2

    公开(公告)日:2011-12-27

    申请号:US12318609

    申请日:2008-12-31

    IPC分类号: H01L21/44

    摘要: A method of making a semiconductor device includes forming at least one layer over a substrate, forming at least two spaced apart features of imagable material over the at least one layer, forming sidewall spacers on the at least two features and filling a space between a first sidewall spacer on a first feature and a second sidewall spacer on a second feature with a filler feature. The method also includes selectively removing the sidewall spacers to leave the first feature, the filler feature and the second feature spaced apart from each other, and etching the at least one layer using the first feature, the filler feature and the second feature as a mask.

    摘要翻译: 制造半导体器件的方法包括在衬底上形成至少一个层,在所述至少一个层上形成可成像材料的至少两个间隔的特征,在所述至少两个特征上形成侧壁间隔物,并填充第一 第一特征上的侧壁间隔物和具有填充物特征的第二特征上的第二侧壁间隔物。 该方法还包括选择性地去除侧壁间隔物以留下第一特征,填料特征和第二特征彼此间隔开,并且使用第一特征,填充物特征和第二特征作为掩模蚀刻至少一个层 。

    Patterning Method for High Density Pillar Structures
    15.
    发明申请
    Patterning Method for High Density Pillar Structures 有权
    高密度柱结构图案化方法

    公开(公告)号:US20110306174A1

    公开(公告)日:2011-12-15

    申请号:US13216688

    申请日:2011-08-24

    IPC分类号: H01L45/00

    摘要: A method of making a device includes forming a first photoresist layer over a sacrificial layer, patterning the first photoresist layer to form first photoresist features, rendering the first photoresist features insoluble to a solvent, forming a second photoresist layer over the first photoresist features, patterning the second photoresist layer to form second photoresist features, forming a spacer layer over the first and second photoresist features, etching the spacer layer to form spacer features and to expose the first and second photoresist features, forming third photoresist features between the spacer features, removing the spacer features, and patterning the sacrificial layer using the first, second and third photoresist features as a mask to form sacrificial features.

    摘要翻译: 制造器件的方法包括在牺牲层上形成第一光致抗蚀剂层,图案化第一光致抗蚀剂层以形成第一光致抗蚀剂特征,使得第一光致抗蚀剂特征不溶于溶剂,在第一光致抗蚀剂特征上形成第二光致抗蚀剂层, 第二光致抗蚀剂层以形成第二光致抗蚀剂特征,在第一和第二光致抗蚀剂特征上形成间隔层,蚀刻间隔层以形成间隔物特征并暴露第一和第二光致抗蚀剂特征,在间隔物特征之间形成第三光致抗蚀剂特征,去除 间隔物特征,并且使用第一,第二和第三光致抗蚀剂特征作为掩模来图案化牺牲层以形成牺牲特征。

    Imaging post structures using X and Y dipole optics and a single mask
    16.
    发明授权
    Imaging post structures using X and Y dipole optics and a single mask 有权
    使用X和Y偶极光学元件和单个掩模的成像柱结构

    公开(公告)号:US07968277B2

    公开(公告)日:2011-06-28

    申请号:US12796449

    申请日:2010-06-08

    IPC分类号: G03F7/26

    摘要: A photolithographic method uses different exposure patterns. In one aspect, a photo-sensitive layer on a substrate is subject to a first exposure using optics having a first exposure pattern, such as an x-dipole pattern, followed by exposure using optics having a second exposure pattern, such as a y-dipole pattern, via the same mask, and with the photo-sensitive layer fixed relative to the mask. A 2-D post pattern with a pitch of approximately 70-150 nm may be formed in a layer beneath the photo-sensitive layer using 157-193 nm UV light, and hyper-numerical aperture optics, in one approach. In another aspect, hard baking is performed after both of the first and second exposures to erase a memory effect of photoresist after the first exposure. In another aspect, etching of a hard mask beneath the photo-sensitive layer is performed after both of the first and second exposures.

    摘要翻译: 光刻方法使用不同的曝光模式。 在一个方面,使用具有第一曝光图案(例如x-偶极图案)的光学器件,然后使用具有第二曝光图案的光学元件例如y型曝光,使用基板上的感光层进行第一次曝光, 偶极图案,通过相同的掩模,并且光敏层相对于掩模固定。 在一种方法中,可以使用157-193nm UV光和超数值孔径光学器件在光敏层下方的层中形成具有约70-150nm间距的2-D柱状图案。 另一方面,在第一曝光和第二次曝光之后进行硬烘烤,以擦除在第一次曝光之后光致抗蚀剂的记忆效应。 在另一方面,在第一和第二次曝光之后进行光敏层下面的硬掩模的蚀刻。

    Continuous deposition process and apparatus for manufacturing cadmium telluride photovoltaic devices
    17.
    发明授权
    Continuous deposition process and apparatus for manufacturing cadmium telluride photovoltaic devices 失效
    连续沉积工艺和制造碲化镉光伏器件的设备

    公开(公告)号:US07901975B2

    公开(公告)日:2011-03-08

    申请号:US12383747

    申请日:2009-03-28

    申请人: Yung-Tin Chen

    发明人: Yung-Tin Chen

    IPC分类号: H01L21/00

    摘要: A continuous deposition process and apparatus for depositing semiconductor layers containing cadmium, tellurium or sulfur as a principal constituent on transparent substrates to form photovoltaic devices as the substrates are continuously conveyed through the deposition apparatus is described. The film deposition process for a photovoltaic device having an n-type window layer and three p-type absorber layers in contiguous contact is carried out by a modular continuous deposition apparatus which has a plurality of processing stations connected in series for depositing successive layers of semiconductor films onto continuously conveying substrates. The fabrication starts by providing an optically transparent substrate coated with a transparent conductive oxide layer, onto which an n-type window layer formed of CdS or CdZnS is sputter deposited. After the window layer is deposited, a first absorber layer is deposited thereon by sputter deposition. Thereafter, a second absorber layer formed of CdTe is deposited onto the first absorber layer by a novel vapor deposition process in which the CdTe film forming vapor is generated by sublimation of a CdTe source material. After the second absorber layer is deposited, a third absorber layer formed of CdHgTe is deposited thereon by sputter deposition. The substrates are continuously conveyed through the modular continuous deposition apparatus as successive layers of semiconductor films are deposited thereon.

    摘要翻译: 描述了一种用于将含有镉,碲或硫作为主要成分的半导体层沉积在透明基板上以形成作为基板的光电器件的连续沉积工艺和装置,其通过沉积设备连续输送。 具有连续接触的n型窗口层和三个p型吸收体层的光电器件的成膜方法由具有多个串联连接的处理站的模块化连续沉积设备进行,以便沉积连续的半导体层 薄膜连续输送基板。 通过提供涂覆有透明导电氧化物层的光学透明衬底开始制造,溅射沉积由CdS或CdZnS形成的n型窗口层。 在沉积窗口层之后,通过溅射沉积在其上沉积第一吸收层。 此后,通过新颖的气相沉积工艺将由CdTe形成的第二吸收层沉积到第一吸收层上,其中通过CdTe源材料的升华产生CdTe膜形成蒸气。 在沉积第二吸收层之后,通过溅射沉积在其上沉积由CdHgTe形成的第三吸收层。 当连续的半导体膜层沉积在其上时,衬底被连续输送通过模块化连续沉积设备。

    Method of making pillars using photoresist spacer mask
    18.
    发明申请
    Method of making pillars using photoresist spacer mask 有权
    使用光刻胶掩模掩模制作柱的方法

    公开(公告)号:US20100105210A1

    公开(公告)日:2010-04-29

    申请号:US12289396

    申请日:2008-10-27

    IPC分类号: H01L21/311

    CPC分类号: H01L21/0337

    摘要: A method of making a device includes forming a first hard mask layer over an underlying layer, forming first features over the first hard mask layer, forming a first spacer layer over the first features, etching the first spacer layer to form a first spacer pattern and to expose top of the first features, removing the first features, patterning the first hard mask using the first spacer pattern as a mask to form first hard mask features, removing the first spacer pattern. The method also includes forming second features over the first hard mask features, forming a second spacer layer over the second features, etching the second spacer layer to form a second spacer pattern and to expose top of the second features, removing the second features, etching the first hard mask features using the second spacer pattern as a mask to form second hard mask features, and etching at least part of the underlying layer using the second hard mask features as a mask.

    摘要翻译: 制造器件的方法包括在下层上形成第一硬掩模层,在第一硬掩模层上形成第一特征,在第一特征上形成第一间隔层,蚀刻第一间隔层以形成第一间隔图案, 为了暴露第一特征的顶部,去除第一特征,使用第一间隔图案作为掩模来图案化第一硬掩模以形成第一硬掩模特征,去除第一间隔图案。 该方法还包括在第一硬掩模特征上形成第二特征,在第二特征上形成第二间隔层,蚀刻第二间隔层以形成第二间隔图案并暴露第二特征的顶部,去除第二特征,蚀刻 第一硬掩模使用第二间隔图案作为掩模形成第二硬掩模特征,并且使用第二硬掩模特征作为掩模蚀刻至少部分下层。

    TEST STRUCTURE FORMATION IN SEMICONDUCTOR PROCESSING
    19.
    发明申请
    TEST STRUCTURE FORMATION IN SEMICONDUCTOR PROCESSING 有权
    半导体加工中的测试结构形成

    公开(公告)号:US20090004879A1

    公开(公告)日:2009-01-01

    申请号:US11772128

    申请日:2007-06-30

    IPC分类号: H01L21/32

    摘要: Test structures are formed during semiconductor processing. The test structures allow performance characteristics to be monitored as the process proceeds. The test structures are formed with a single mask that is used in a manner that also allows alignment marks to be formed which do not interfere with one another as subsequent levels are patterned. The manner of using the mask also allows different types of test structures having different features to be formed. The different types of test structures can provide insight into performance characteristics of different types of devices.

    摘要翻译: 在半导体处理期间形成测试结构。 测试结构允许在过程进行时监测性能特征。 测试结构形成有一个单一的掩模,该掩模的使用方式也允许形成对准标记,这些对准标记在后续层次被图案化时不会相互干扰。 使用掩模的方式也允许形成具有不同特征的不同类型的测试结构。 不同类型的测试结构可以提供对不同类型设备的性能特征的洞察。

    PHOTOMASK FEATURES WITH INTERIOR NONPRINTING WINDOW USING ALTERNATING PHASE SHIFTING
    20.
    发明申请
    PHOTOMASK FEATURES WITH INTERIOR NONPRINTING WINDOW USING ALTERNATING PHASE SHIFTING 有权
    带有内置非显示窗口的照片使用替代相位移

    公开(公告)号:US20070184360A1

    公开(公告)日:2007-08-09

    申请号:US11615830

    申请日:2006-12-22

    申请人: Yung-Tin Chen

    发明人: Yung-Tin Chen

    IPC分类号: G03C5/00 G03F1/00

    CPC分类号: G03F1/30

    摘要: Aspects of the present invention provide for a novel photomask for patterning features for an integrated circuit, the photomask including masked features having interior nonprinting windows. In some embodiments, the interior nonprinting window is an alternating phase shifter, while the area surrounding the masked features transmits light unshifted. In other embodiments, the interior nonprinting window transmits light unshifted, while the area surrounding the masked features is an alternating phase shifter. Thus any arrangement of features can be patterned with no phase conflict.

    摘要翻译: 本发明的方面提供了一种用于集成电路的图形化特征的新型光掩模,该光掩模包括具有内部非印刷窗口的掩蔽特征。 在一些实施例中,内部非打印窗口是交替移相器,而围绕被掩蔽的特征的区域透射未被移动的光。 在其他实施例中,内部非打印窗口透射未被移动的光,而围绕屏蔽特征的区域是交替移相器。 因此,可以对任何特征的布置进行图案化而没有相位冲突。