公开(公告)号：US20080172194A1

公开(公告)日：2008-07-17

申请号：US11660116

申请日：2006-06-16

申请人： Ken Mochizuki ,  Osamu Sugiyama ,  Tadanori Nishikobara

发明人： Ken Mochizuki ,  Osamu Sugiyama ,  Tadanori Nishikobara

IPC分类号： G01R29/02

CPC分类号： G01R29/0273 ,  G01R25/00 ,  G01R29/023 ,  G01R29/26 ,  G01R31/31709 ,  G04F10/06

摘要： In order to stably measure an input interval time of a pulse signal with high precision, a time interval measuring apparatus includes a reference signal generator, a phase shifter, first and second A/D converters, an error correction unit, an instantaneous phase calculation unit, and an interval time calculation unit. The phase shifter divides a reference signal of a sine wave having a predetermined frequency from the reference signal generator into a first analog signal and a second analog signal having phases shifted to each other. The first and second A/D converters perform sampling of the first analog signal and the second analog signal from the phase shifter, respectively, at an input timing of a pulse signal to be measured, and output a first and second digital sample values. The error correction unit corrects direct current offset errors generated in, respectively, the first and second digital sample values output from the first and second A/D converters, a phase error with respect to 90°, and an amplitude error. The instantaneous phase calculation unit calculates an instantaneous phase of the reference signal based on the corrected first and second digital sample values. The interval time calculation unit determines an input interval time of the pulse signal based on a variation of instantaneous phases.

摘要翻译： 为了以高精度稳定地测量脉冲信号的输入间隔时间，时间间隔测量装置包括参考信号发生器，移相器，第一和第二A / D转换器，纠错单元，瞬时相位计算单元 ，以及间隔时间计算单元。 移相器将具有预定频率的正弦波的参考信号从参考信号发生器分成第一模拟信号和具有彼此偏移的相位的第二模拟信号。 第一和第二A / D转换器在待测量的脉冲信号的输入定时分别执行来自移相器的第一模拟信号和第二模拟信号的采样，并输出第一和第二数字采样值。 误差校正单元分别校正从第一和第二A / D转换器输出的第一和第二数字采样值，相对于90°的相位误差和幅度误差产生的直流偏移误差。 瞬时相位计算单元基于校正的第一和第二数字采样值来计算参考信号的瞬时相位。 间隔时间计算单元基于瞬时相位的变化来确定脉冲信号的输入间隔时间。

公开(公告)号：US07376524B2

公开(公告)日：2008-05-20

申请号：US11083612

申请日：2005-03-17

申请人： Kan Tan

发明人： Kan Tan

IPC分类号： G01R13/00 ,  H03D1/06

CPC分类号： G01R29/0273

摘要： A transition-density based data timing measurement method uses an estimated transition density (TD) value for an acquired data signal together with edge crossing times to estimate a data period for the acquired data signal. The estimated data period is used for symbol classification to determine a number of bits between adjacent edge crossings, which results are used to adjust the TD value. The adjusted TD value is then used to re-compute the data period.

摘要翻译： 基于转换密度的数据定时测量方法使用所获取的数据信号的估计转移密度（TD）值和边缘交叉时间来估计所获取的数据信号的数据周期。 估计的数据周期用于符号分类以确定相邻边缘交叉点之间的位数，该结果用于调整TD值。 然后调整的TD值用于重新计算数据周期。

公开(公告)号：US07254502B2

公开(公告)日：2007-08-07

申请号：US10525163

申请日：2003-08-08

申请人： Hans-Dieter Oberle ,  Sebastian Sattler

发明人： Hans-Dieter Oberle ,  Sebastian Sattler

IPC分类号： G01R29/02

CPC分类号： H04L25/0262 ,  G01R23/10 ,  G01R29/0273

摘要： To determine the period length of a first signal, the length is measured by counting the periods of a second signal with a shorter period length. To measure the fluctuations of the period length of the first signal whilst also taking into account the fluctuations of the period length of the second signal, the measurement is carried out for two different values of the period length of the second signal. Both the fluctuations of the period length of the first signal and the accumulated fluctuations of the period length of the second signal are calculated independently of one another from the two values. The method enables the period length fluctuations of a first signal that originates from a phase-locked loop to be detected.

摘要翻译： 为了确定第一信号的周期长度，通过对具有较短周期长度的第二信号的周期进行计数来测量长度。 为了测量第一信号的周期长度的波动，同时考虑到第二信号的周期长度的波动，对于第二信号的周期长度的两个不同的值进行测量。 从两个值彼此独立地计算第一信号的周期长度的波动和第二信号的周期长度的累积波动。 该方法使得能够检测来自锁相环的第一信号的周期长度波动。

公开(公告)号：US07245160B2

公开(公告)日：2007-07-17

申请号：US11052797

申请日：2005-02-09

申请人： Chao-Sheng Huang

发明人： Chao-Sheng Huang

IPC分类号： G01R29/02 ,  H03K9/08

CPC分类号： G01R29/0273

摘要： A short pulse rejection circuit is disclosed. The circuit comprises a signal transition detecting circuit, a control signal generating circuit, a capacitor resetting and charging circuit, and a charge pulse detecting circuit. The signal transition detecting circuit is to output detecting pulses in response to any input pulse. The control signal generating circuit generates two control signals for capacitor charging and discharging in response to the detecting pulses. The capacitor resetting and charging circuit generates discharging and charging signals in response to two control signals. The charge pulse detecting circuit generates output enable pulse and outputting a short pulse rejected pulses in response to the charging signals and original input pulse.

摘要翻译： 公开了一种短脉冲抑制电路。 电路包括信号转换检测电路，控制信号发生电路，电容器复位和充电电路以及充电脉冲检测电路。 信号转换检测电路响应任何输入脉冲输出检测脉冲。 控制信号发生电路根据检测脉冲产生用于电容器充电和放电的两个控制信号。 电容器复位和充电电路响应两个控制信号产生放电和充电信号。 充电脉冲检测电路响应于充电信号和原始输入脉冲而产生输出使能脉冲并输出短脉冲拒绝脉冲。

公开(公告)号：US07024324B2

公开(公告)日：2006-04-04

申请号：US10856907

申请日：2004-05-27

申请人： Michael C. Rifani ,  Keng L. Wong ,  Christopher Pan

发明人： Michael C. Rifani ,  Keng L. Wong ,  Christopher Pan

IPC分类号： G06F19/00

CPC分类号： G01R29/0273

摘要： A method for calibrating a delay element is described herein. In some embodiments, the method may include generating a clock signal with a clock edge, generating a reference signal with a reference edge using an adjustable delay line to delay the clock signal, and delaying a selected one of the clock signal and the reference signal through an array delay line having an array delay element with an array delay. In some embodiments, the method may further include adjusting the adjustable delay line to obtain a first adjustable delay so that the clock and reference edges are aligned on one side of the array delay element, adjusting the adjustable delay line to obtain a second adjustable delay so that the clock and reference edges are aligned on the other side of the array delay element, and ascertaining a delay difference between the first and the second adjustable delays to determine a value of the array delay provided by the array delay element. Other embodiments of the present invention may include, but are not limited to, apparatuses and systems adapted to facilitate practice of the above-described method.

摘要翻译： 本文描述了用于校准延迟元件的方法。 在一些实施例中，该方法可以包括用时钟沿生成时钟信号，使用可调延迟线产生具有参考边沿的参考信号以延迟时钟信号，以及延迟选定的一个时钟信号和参考信号通过 具有阵列延迟的阵列延迟元件的阵列延迟线。 在一些实施例中，该方法还可以包括调整可调延迟线以获得第一可调延迟，使得时钟和参考边沿在阵列延迟元件的一侧对准，调节可调延迟线以获得第二可调延迟 时钟和参考边沿在阵列延迟元件的另一侧对准，并且确定第一和第二可调延迟之间的延迟差以确定由阵列延迟元件提供的阵列延迟的值。 本发明的其它实施例可以包括但不限于适于促进实施上述方法的装置和系统。

公开(公告)号：US20030194046A1

公开(公告)日：2003-10-16

申请号：US10122441

申请日：2002-04-11

发明人： Jerry Lester Shirar

IPC分类号： G01D001/00

CPC分类号： G01R31/31727 ,  G01R23/15 ,  G01R29/0273

摘要： A method and system for improved accuracy in period counting using a tunable oscillator, such as a voltage controlled oscillator, without an additional reference oscillator. The method and system use digital logic to correct the count made by a counter by loading the counter with a preset. The invention is suitable for use with any digital circuit that has a tunable oscillator and programmable digital logic.

摘要翻译： 一种提高使用可调谐振荡器（如压控振荡器）的周期计数精度的方法和系统，无需额外的基准振荡器。 该方法和系统使用数字逻辑来通过用预设装载计数器来校正由计数器进行的计数。 本发明适用于具有可调振荡器和可编程数字逻辑的任何数字电路。

公开(公告)号：US5905755A

公开(公告)日：1999-05-18

申请号：US682127

申请日：1996-07-17

申请人： Manfred Ficker

发明人： Manfred Ficker

IPC分类号： G01R29/027 ,  H03K5/1252 ,  H04L7/00 ,  H04L25/06 ,  H04B17/02

CPC分类号： G01R29/0273 ,  H03K5/1252 ,  H04L25/068 ,  H04L7/0083

摘要： Method and circuit for deciding whether or not a pulse in a data stream is or is not a valid pulse of the data stream, wherein a free-running local clock at N-times the data rate is generated and clock pulses thereof are counted once the data stream signal reaches and remains above a slicing threshold. Once a predetermined minimum number of counted clock pulses is attained a valid data pulse signal is issued.

摘要翻译： 用于确定数据流中的脉冲是否为数据流的有效脉冲的方法和电路，其中产生N倍数据速率的自由运行的本地时钟，并且一旦对其进行计数，则对其时钟脉冲进行计数 数据流信号达到并保持高于切片阈值。 一旦达到预定的最小数目的计数时钟脉冲，就发出有效的数据脉冲信号。

公开(公告)号：US5828717A

公开(公告)日：1998-10-27

申请号：US624960

申请日：1996-03-27

申请人： Keiichi Kusumoto ,  Shiro Dosho ,  Yutaka Terada ,  Akira Matsuzawa

发明人： Keiichi Kusumoto ,  Shiro Dosho ,  Yutaka Terada ,  Akira Matsuzawa

IPC分类号： G01R29/027 ,  G01C21/00

CPC分类号： G01R29/0273

摘要： There is provided a time counting circuit for measuring a pulse spacing of a pulse signal with high accuracy and with low power consumption. An inverter ring composed of an odd number of inverters connected in a ring oscillates and one signal transition occurs after another as though seemingly circulating around the inverter ring. Holding circuits connected to respective output terminals of the inverters composing the inverter ring output, on the rising edge of a pulse signal to be measured, signals outputted from the inverters at the same time. The outputted signals are then converted by a signal converting circuit to numeric data. A counter circuit connected to the output terminal of one of the inverters composing the inverter ring counts the number of circulations of signal transition. A time-difference operating circuit corrects the numeric data outputted from the signal converting circuit based on the number of circulations of signal transition outputted from the counter circuit to provide time data, while calculating and outputting the pulse spacing of the pulse signal to be measured.

摘要翻译： 提供了一种用于以高精度和低功耗测量脉冲信号的脉冲间隔的时间计数电路。 由连接在环上的奇数个反相器组成的逆变器环振荡，并且一个信号转换发生在似乎在逆变器环周围似乎循环。 连接到构成逆变器环的逆变器的各个输出端子的保持电路在待测脉冲信号的上升沿同时输出从逆变器输出的信号。 然后，输出的信号由信号转换电路转换成数字数据。 连接到构成逆变器环的逆变器之一的输出端的计数器电路对信号转换的循环数进行计数。 时差操作电路根据从计数器电路输出的信号转换的循环数来校正从信号转换电路输出的数字数据，以提供时间数据，同时计算并输出要测量的脉冲信号的脉冲间隔。

公开(公告)号：US5689539A

公开(公告)日：1997-11-18

申请号：US688804

申请日：1996-07-31

申请人： Hirokuni Murakami

发明人： Hirokuni Murakami

IPC分类号： G04F10/04 ,  G01R23/10 ,  G01R29/027 ,  H03K21/00 ,  G01B7/00

CPC分类号： G01R29/0273 ,  G01R23/10

摘要： In order to measure an individual time interval with accuracy beyond frequency limit of semiconductors, a time measurement system of the invention generates a series of delayed pulses, each of which has the same pulse width with the time interval to be measured and delayed by a unit delay time shorter than a cycle time of a system clock from its preceding delayed pulse. A series of discriminate number measurement pulses are also generated from the series of delayed pulses, each of which rises at a common time and falls at each corresponding delay pulse. From number of a longest sequence of the same pulse number of the system clock counted in the discriminate number measurement pulses, the unit delay time is measured. From average value of pulse numbers of the system clock counted in each of the delayed pulses, the time interval to be measured is calculated with accuracy of the unit delay time.

摘要翻译： 为了以超出半导体频率范围的精度测量单个时间间隔，本发明的时间测量系统产生一系列延迟脉冲，每个延迟脉冲具有相同的脉冲宽度，并且被测量的时间间隔延迟一个单位 延迟时间短于系统时钟从其先前的延迟脉冲的周期时间。 一系列鉴别数测量脉冲也从一系列延迟脉冲产生，每个延迟脉冲在公共时间上升，并在每个对应的延迟脉冲下降。 从鉴别数测量脉冲中计数的系统时钟的相同脉冲数的最长序列的数量，测量单位延迟时间。 从每个延迟脉冲计数的系统时钟的脉冲数的平均值，以单位延迟时间的精度计算要测量的时间间隔。

公开(公告)号：US5166959A

公开(公告)日：1992-11-24

申请号：US810946

申请日：1991-12-19

申请人： David C. Chu ,  Thomas A. Knotts

发明人： David C. Chu ,  Thomas A. Knotts

IPC分类号： G04F10/04 ,  G01R29/027

CPC分类号： G01R29/0273

摘要： A circuit for time stamping event signals, e.g. zero-crossings, using coarse and fine timers. The fine timer is a circuit section which subdivides a period from a phase-locked ring-oscillator into 2N subparts. An event signal is timed by latching a digital representation of a particular subpart. The digital representation of the subpart is an N-bit dual thermometer code which uniquely identifies each subpart with each adjacent subpart differing by only one bit. The subparts are made finer in time quantization than the propagation delay of one active element in the ring oscillator by the use of linear combiner elements. The dual thermometer code, encoded post-latching into a binary code, forms the "fine" timing part of a binary word representation of the event time. The event also latches the count states of a pair of lead-lag counters in a master-slave configuration counting ring oscillator periods. These counters change states respectively before and after the dual thermometer code turn-overs. Only one reading is chosen for recording as determined by the most significant bit of the fine code. The choice will always find an accurate and stable reading, and reject erroneous readings resulting from reading a counter in transition. The chosen counter reading, encoded to binary, forms the coarse timer for the binary word representation of the event time. The coarse and fine binary words are butt-joinable to form the complete binary timing representation without further arithmetic processing.