Abstract:
The plasma display device has pixels each formed by a plurality of sub pixels of the same color provided in an address-electrode direction, and provides gray-scale display by controlling the number of sub pixels to be turned ON. A plurality of address electrodes are provided for each sub pixels. Each sub pixel is addressed by a conductive layer which is electrically connected to one of the plurality of address electrodes.
Abstract:
A plasma display panel, the light emission efficiency of which has been improved without increasing the discharge start voltage, is disclosed. In a three-electrode type PDP, a fourth (Z) electrode is provided at the portion between a first (X) electrode and a second (Y) electrode between which a main discharge (a sustain discharge) is caused to occur for a display and at least one of the distance between the first electrode and the fourth electrode and the distance between the second electrode and the fourth electrode changes gradually in a cell.
Abstract:
A rear substrate of plasma display panel comprises a substrate, a plurality of address electrodes, a plurality of auxiliary address electrodes, a rib and a fluorescent layer. The rib is disposed on the substrate to define a plurality of discharge spaces. Each of the address electrodes is disposed in each of the discharge spaces. The auxiliary address electrodes are disposed between the substrate and the rib. When an address signal is inputted to the address electrodes, the auxiliary address electrodes are grounded for reducing the probability of error discharge. During sustain period, the auxiliary address electrodes are coupled to a positive voltage for preventing ion bombardment of phosphors layer.
Abstract:
A method of driving a plasma display panel to improve display brightness and luminescent efficiency. In the sustain periods, the same driving signal is sent to the sustain electrode X as well as the address electrode Ai at the same time to achieve the desired volume discharge effect. In addition, the structure of PDPs is modified to raise firing voltages between these electrodes, preventing erasure of the data written in the address periods.
Abstract:
A plasma display panel including first and second substrates facing one another with a gap therebetween, address electrodes formed on the first substrate along a first direction, barrier ribs mounted in the gap and defining a plurality of discharge cells, first and second electrodes formed on the second substrate along a second direction, which is substantially perpendicular to the first direction, and third electrodes extending along the second direction between pairs of the first and second electrodes. Areas of the third electrodes vary according to the color of the discharge cell over which the third electrodes are formed.
Abstract:
A plasma display panel that is adaptive for improving discharge efficiency. In the panel, a plurality of the first and second electrodes are provided at the rear side of an upper substrate. A dielectric layer is provided at the rear side of the upper substrate in such a manner to cover the upper substrate and the first and second electrodes. A plurality of the first and second auxiliary electrodes are provided in parallel to the first and second electrodes within the dielectric layer.
Abstract:
A plasma display panel has address properties stabilized. A priming discharge is performed between auxiliary electrodes (17), which are formed on a front substrate (1) and coupled with scan electrodes (6) and priming electrodes (14) formed on a back substrate (2). Furthermore, a material layer (5) containing at least one of alkali metal oxide, alkaline earth metal oxide and fluoride is provided on regions corresponding to priming discharge spaces (30) (gap parts 13) on the back substrate (2). As a result, the priming discharge has a wider margin, and a supply of priming particles to the discharge cells is stabilized, whereby a discharge delay during the addressing is reduced, and the address properties are stabilized.
Abstract:
A plasma display panel comprises a selective row electrode Z extending between row electrode pairs (X, Y) adjacent to each other in a column direction. A discharge cell is divided by into two by a second transverse wall 15B of a partition wall 15 defining the periphery of the discharge cell: a display discharge cell C1 provided opposite transparent electrodes Xa, Ya of the paired row electrodes X, Y for a sustaining discharge, and a reset and addressing discharge cell C2 provided opposite the selective row electrode Z for a reset discharge and an addressing discharge which are created between the electrode Z and a column electrode D. A clearance r is provided for communication between the display discharge cell C1 and the reset and addressing discharge cell C2.
Abstract:
A plasma display panel, and particularly to a surface-discharge plasma display panel that may have an electrode structure in which a pair of discharge sustain electrodes may be arranged at respective discharge cells between two substrates to make the display discharge. The plasma display panel may include igniter electrodes formed over barrier ribs extending from discharge sustain electrodes along the barrier ribs, and protruding toward the inside of discharge cells at their ends.
Abstract:
A plasma display panel, which enables low voltage addressing and reduces deterioration of the fluorescent layers, thereby achieving excellent luminance, includes: a front substrate having sustaining electrodes arranged at predetermined intervals; a front dielectric layer adapted to bury the sustaining electrodes; a rear substrate facing the front substrate and including address electrodes arranged orthogonal to the sustaining electrodes; a rear dielectric layer adapted to bury the address electrodes; barrier walls adapted to define stripe-shaped discharge spaces arranged between the front substrate and rear substrate, the stripe-shaped discharge spaces being parallel to and alternating with the address electrodes; fluorescent layers arranged within the discharge spaces; and at least one floating electrode respectively arranged within the barrier walls in a longitudinal direction of the barrier walls. Alternatively, first and second barrier walls can be adapted to define discharge spaces arranged between the front substrate and rear substrate, the first barrier walls arranged parallel to and alternating with the address electrodes, and the second barrier walls arranged perpendicular to the first barrier walls and at least one floating electrode respectively arranged within the first and second barrier walls and in a longitudinal direction of the first and second barrier walls.