公开(公告)号：US20080012588A1

公开(公告)日：2008-01-17

申请号：US11569839

申请日：2005-06-14

Applicant: Jung-Hoon Lee

Inventor： Jung-Hoon Lee

IPC: H01L21/66

CPC classification number: G01R3/00 ,  G01R1/07342

Abstract: Disclosed herein are a silicon wafer for probe bonding and a probe bonding method using the same. The silicon wafer for probe bonding is improved in structure to facilitate probe bonding on a probe substrate. The probe bonding method involves bonding supporting beams on the silicon wafer to bumps on the probe substrate. The silicon wafer is formed at a surface thereof with probe tips and supporting beams on an end of each probe tip to have a redetermined arrangement pattern. The silicon wafer is further formed with openings from an upper surface to a lower surface thereof. A portion of each supporting beam opposite to the probe tips protrudes is exposed to the outside through the openings.

Abstract translation: 这里公开了用于探针接合的硅晶片和使用该硅晶片的探针接合方法。 用于探针接合的硅晶片在结构上得到改善以便于在探针基底上的探针接合。 探针接合方法包括将硅晶片上的支撑束粘合到探针基板上的凸起。 硅晶片在其表面处形成有探针尖端和支撑梁，每个探针尖端的端部具有重新确定的布置图案。 硅晶片还形成有从上表面到下表面的开口。 与探针尖端相反的每个支撑梁的一部分突出通过开口暴露于外部。

公开(公告)号：US20070263412A1

公开(公告)日：2007-11-15

申请号：US11528417

申请日：2006-09-28

Applicant: Jung Hoon Lee

Inventor： Jung Hoon Lee

IPC: F21V5/02

CPC classification number: G02B6/0053 ,  G02B5/04 ,  G02B6/0043 ,  G02B6/0051 ,  G02F1/133606

Abstract: The present invention relates to a liquid crystal display having excellent brightness without moiré patterns. The present invention also relates to a prism sheet and backlight unit which may improve the brightness of the liquid crystal display while removing the moiré patterns. A prism sheet comprises a protective layer including a base material consisting of a light-transmissive resin; and a plurality of diffusion particles distributed in the protective layer to scatter the light input into the base material; a base film disposed on a surface of the protective layer, wherein the light emitted from the protective layer is input into the base film; and a plurality of linear prisms having a pitch of between about 32 μm and about 38 μm and disposed in parallel on a surface of the base film.

Abstract translation: 液晶显示器本发明涉及一种具有优异亮度且无莫尔图案的液晶显示器。 本发明还涉及一种棱镜片和背光单元，其可以在去除波纹图案的同时提高液晶显示器的亮度。 棱镜片包括保护层，该保护层包括由透光树脂构成的基底材料; 以及分散在保护层中的多个扩散粒子，以将光输入散射到基底材料中; 设置在所述保护层的表面上的基膜，其中从所述保护层发射的光被输入到所述基膜中; 以及间隔在大约32μm和大约38μm之间并且平行设置在基膜的表面上的多个线性棱镜。

公开(公告)号：US20070183204A1

公开(公告)日：2007-08-09

申请号：US11657652

申请日：2007-01-25

Applicant: Suk-Pil Kim ,  Won-Joo Kim ,  Yoon-Dong Park ,  Jae-Woong Hyun ,  Jung-Hoon Lee

Inventor： Suk-Pil Kim ,  Won-Joo Kim ,  Yoon-Dong Park ,  Jae-Woong Hyun ,  Jung-Hoon Lee

IPC: G11C11/34 ,  G11C16/04

CPC classification number: G11C16/0483 ,  G11C7/18

Abstract: A NAND-type nonvolatile memory device includes a first string and a second string. The ends of each of the first and second strings are connected to a common bit line and a common source line, respectively. Each of the first string and the second string have a string selection transistors, a plurality of unit devices and a source selection transistor. Word lines are respectively connected to control gates of the unit devices in the same rows. A first string selection line and a second string selection line are respectively connected to the gates of the string selection transistors of the first string and the second string. A first source selection line and a second source selection line are respectively connected to the gates of the first string and the second string.

Abstract translation: NAND型非易失性存储器件包括第一串和第二串。 第一和第二串中的每一个的端部分别连接到公共位线和公共源极线。 第一串和第二串中的每一个具有串选择晶体管，多个单元器件和源极选择晶体管。 字线分别连接到相同行中的单元设备的控制栅极。 第一串选择线和第二串选择线分别连接到第一串和第二串的串选择晶体管的栅极。 第一源选择线和第二源选择线分别连接到第一串和第二串的栅极。

公开(公告)号：US07198654B1

公开(公告)日：2007-04-03

申请号：US11312375

申请日：2005-12-21

Applicant: Kang Yoon Kim ,  Sang Gon Lee ,  Young Kee Seo ,  Jung Hoon Lee

Inventor： Kang Yoon Kim ,  Sang Gon Lee ,  Young Kee Seo ,  Jung Hoon Lee

IPC: H01G9/00

CPC classification number: H01G9/02 ,  H01G9/155 ,  Y02E60/13 ,  Y02T10/7022 ,  Y10T29/417

Abstract: A separator sheet for manufacturing an electric double layer capacitor, and a method for manufacturing the electric double layer capacitor using the same, are provided. According to an embodiment, the separator sheet for manufacturing the electric double layer capacitor comprises: a plurality of separators; and a resin film holding the plurality of separators, wherein the separators are disposed in the resin film at a predetermined interval.

Abstract translation: 提供一种双电层电容器的制造用隔膜片及其制造方法。 根据一个实施例，用于制造双电层电容器的隔片片包括：多个隔板; 以及保持多个隔板的树脂膜，其中隔膜以预定间隔设置在树脂膜中。

公开(公告)号：US20060284245A1

公开(公告)日：2006-12-21

申请号：US11424524

申请日：2006-06-15

Applicant: Byung-Gook Park ,  Jung-Hoon Lee

Inventor： Byung-Gook Park ,  Jung-Hoon Lee

IPC: H01L29/792

CPC classification number: H01L29/792 ,  H01L21/28282 ,  H01L29/1033 ,  H01L29/4232 ,  H01L29/66833 ,  H01L29/7854

Abstract: A new SONOS memory device is provided, in which a conventional planar surface of multi-dielectric layers (ONO layers) is instead formed with a curved surface such as a cylindrical shape, and included is a method for fabricating the same. A radius of curvature of the upper surface of a blocking oxide can be designed to be larger than that of the lower surface of a tunneling oxide, which restrains electrons from passing through the blocking oxide by back-tunneling on erasing. As a result, a SONOS memory device shows an improvement in erasing speed.

Abstract translation: 提供了一种新的SONOS存储器件，其中多个电介质层（ONO层）的常规平面表面替代地形成有诸如圆柱形的弯曲表面，并且包括其制造方法。 阻挡氧化物的上表面的曲率半径可以被设计为大于隧道氧化物的下表面的曲率半径，其阻止电子在擦除时通过反向隧道穿过阻塞氧化物。 结果，SONOS存储器件显示出擦除速度的改进。

公开(公告)号：US20060171425A1

公开(公告)日：2006-08-03

申请号：US10549335

申请日：2004-03-16

Applicant: Oug-Ki Lee ,  Jung-Hoon Lee

Inventor： Oug-Ki Lee ,  Jung-Hoon Lee

IPC: H01S3/00

CPC classification number: G01R1/06744 ,  G01R1/06711 ,  G01R1/07307 ,  G01R1/07342 ,  G01R3/00

Abstract: Disclosed herein are a probe and a method of making the same, and more particularly to a probe having a minute pitch, with which a probe card corresponding to arrangement of pads formed with a massed shape or other various shapes on a wafer is made, and a method of making the same. The probe having a prescribed thickness and formed in the shape of a flat plate. The probe comprises a body part bent at the middle thereof so that the body part is elastically tensioned or compressed when a tension force or a compression force is applied to the body part at the upper and lower ends thereof, a connection part integrally formed with the lower end of the body part, the connection part being fixed to a substrate, and a tip part integrally formed with the upper end of the body part, the tip part contacting a pad of an element.

Abstract translation: 本文公开了一种探针及其制造方法，更具体地说，涉及一种具有微小间距的探针，其中形成了与晶片上形成有组合形状或其它各种形状的焊盘布置对应的探针卡，以及 制作相同的方法。 探针具有规定的厚度并形成为平板状。 探头包括在其中间弯曲的主体部分，使得当在其上端和下端处对主体部分施加张力或压缩力时，主体部分被弹性张紧或压缩;与主体部分的上端和下端一体形成的连接部， 主体部分的下端，连接部分固定到基底，以及与主体部分的上端一体形成的尖端部分，尖端部分接触元件的垫。

公开(公告)号：US20060169678A1

公开(公告)日：2006-08-03

申请号：US10549418

申请日：2004-03-16

Applicant: Oug-Ki Lee ,  Jung-Hoon Lee

Inventor： Oug-Ki Lee ,  Jung-Hoon Lee

IPC: B23K26/00 ,  B23K26/02

CPC classification number: G01R3/00 ,  B23K26/0861 ,  G01R1/06711 ,  G01R1/07342 ,  G01R31/2887

Abstract: Disclosed herein are a probe positioning and bonding device and a probe bonding method, and more particularly a probe positioning and bonding device used to fix probes to prescribed positions on a substrate so that a probe card used for semiconductor integrated circuit testing equipment is manufactured, and a probe bonding method using the same. The probe positioning and bonding device comprises a stage unit disposed on a working table, a microscope disposed above the stage unit while being supported by means of a first supporting member disposed on the working table, a probe fixing unit disposed above the stage unit and below the microscope while being supported by means of a second supporting member disposed on the working table, and a light source unit supported by means of a third supporting member disposed on the working table. The light source unit is disposed toward the upper part of the stage unit.

公开(公告)号：US06649501B2

公开(公告)日：2003-11-18

申请号：US09751940

申请日：2001-01-02

Applicant: Jung Hoon Lee ,  Chi Sun Hwang

Inventor： Jung Hoon Lee ,  Chi Sun Hwang

IPC: H01L213205

CPC classification number: H01L27/10885 ,  H01L21/76897 ,  H01L23/528 ,  H01L27/10888 ,  H01L2924/0002 ,  H01L2924/00

Abstract: The present invention discloses a method for forming a bit line of a semiconductor device which can easily perform a contact process of the semiconductor device, by forming parallel rows of I-shaped active regions, a plug poly and a ladder-type bit line. The spacing between adjacent active regions is maintained at the minimum line width. Two word lines of minimum line width and separated by the minimum line width are formed on the active region. The word lines are perpendicular to the active regions. A plug poly is formed on the active region between the word lines. A bit line contact plug is formed over the plug poly and a device isolation region. A bit line of minimum line width contacts the bit line contact plug and aligned generally parallel to the word lines is formed in a ladder-type configuration. That is, one side the lower portion of the contact plug contacts the plug poly, and the upper portion of the other side of the contact plug contacts the bit line. As a result, a storage electrode contact process may be performed using a self aligned method.

Abstract translation: 本发明公开了一种用于形成半导体器件的位线的方法，其可以通过形成平行的I形有源区，插塞多晶和梯形位线来容易地执行半导体器件的接触处理。 相邻活性区域之间的间距保持在最小线宽度。 在有效区域上形成最小线宽的最小线宽分隔的两条字线。 字线垂直于有源区域。 插头多晶形成在字线之间的有源区上。 在插头多晶硅和器件隔离区域上形成位线接触插塞。 最终线宽的位线与位线接触插头接触并且大致平行于字线排列，形成梯形配置。 也就是说，一侧接触插头的下部接触插头多孔，并且接触插头的另一侧的上部接触位线。 结果，可以使用自对准方法来执行存储电极接触处理。

公开(公告)号：US20240343412A1

公开(公告)日：2024-10-17

申请号：US18701105

申请日：2022-11-10

Applicant: Jae-Chang LEE ,  Jung Hoon LEE ,  So Jung LEE

Inventor： Jae-Chang LEE ,  Jung Hoon LEE ,  So Jung LEE

IPC: B64F1/06

CPC classification number: B64F1/06

Abstract: A catapult is disclosed. The catapult according to an embodiment of the present invention, comprises: a take-off assisting member contacting an aircraft to push the aircraft; a power source coupled to the take-off assisting member to drive the take-off assisting member; and a winch coupled to the take-off assisting member.

公开(公告)号：US20210048687A1

公开(公告)日：2021-02-18

申请号：US16876145

申请日：2020-05-18

Applicant: Jung Hoon LEE

Inventor： Jung Hoon LEE

IPC: G02C7/04

Abstract: Provided is an orthokerato lens including a central portion located on a center of a lens and configured to change a refractive index by pressurizing a cornea, a fitting portion configured to form a negative pressure between the lens and the cornea to pile epithelial cells moved from the central portion, a fixing portion configured to be in contact with an eyeball and align the lens such that the center of the lens is located at a center of the cornea, a peripheral portion configured to allow tears between the lens and the eyeball to circulate, and a circulation hole configured to penetrate the central portion.