公开(公告)号：US20130279280A1

公开(公告)日：2013-10-24

申请号：US13865110

申请日：2013-04-17

Applicant: RAMBUS INC.

Inventor： Paul Damian Franzon ,  Evan Lawrence Erickson ,  Thomas Vogelsang ,  Frederick A. Ware

IPC: G11C29/04

CPC classification number: G11C29/04 ,  G11C29/702 ,  G11C29/808

Abstract: A memory device includes a stack of circuit layers, each circuit layer having formed thereon a memory circuit configured to store data and a redundant resources circuit configured to provide redundant circuitry to correct defective circuitry on at least one memory circuit formed on at least one layer in the stack. The redundant resources circuit includes a partial bank of redundant memory cells, wherein an aggregation of the partial bank of redundant memory cells in each of the circuit layers of the stack includes at least one full bank of redundant memory cells and wherein the redundant resources circuit is configured to replace at least one defective bank of memory cells formed on any of the circuit layers in the stack with at least a portion of the partial bank of redundant memory cells formed on any of the circuit layers in the stack.

Abstract translation: 存储器件包括电路层堆叠，每个电路层上形成有存储器电路，其被配置为存储数据，冗余资源电路被配置为提供冗余电路以校正在至少一个层上形成的至少一个存储器电路上的有缺陷的电路 堆栈。 所述冗余资源电路包括冗余存储器单元的部分组，其中所述堆叠的每个电路层中的冗余存储器单元的部分组的聚集包括至少一个全部冗余存储器单元，并且其中所述冗余资源电路为 被配置为替换形成在堆叠中的任何电路层上的至少一个存储单元的至少一个有缺陷的存储单元组，其中所述冗余存储器单元的部分库的至少一部分形成在堆叠中的任何电路层上。

公开(公告)号：US20130168674A1

公开(公告)日：2013-07-04

申请号：US13719724

申请日：2012-12-19

Applicant: Rambus Inc.

Inventor： Paul D. Franzon ,  Thomas Vogelsang ,  Frederick A. Ware ,  Wayne Ellis

IPC: H01L23/48 ,  H01L27/10

CPC classification number: H01L23/481 ,  G11C7/1045 ,  G11C29/006 ,  G11C29/785 ,  G11C29/816 ,  G11C29/83 ,  H01L22/34 ,  H01L23/5256 ,  H01L25/0657 ,  H01L27/0688 ,  H01L27/10 ,  H01L2225/06544 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A three-dimensional integrated circuit (3D-IC) includes a stack of semiconductor wafers, each of which includes a substrate and a device layer. Programmable components, such as memory arrays or logic circuits, are formed within the device layers. Some of the programmable components are redundant, and can be substituted for defective components by programming passive memory elements in a separate conductive layer provided for this purpose. The separate conductive layer is devoid of active devices, and is therefore relatively reliable and inexpensive.

Abstract translation: 三维集成电路（3D-IC）包括一堆半导体晶片，每个半导体晶片包括基板和器件层。 可编程组件，例如存储器阵列或逻辑电路，在器件层内形成。 一些可编程组件是冗余的，并且可以通过在为此目的提供的单独导电层中编程无源存储器元件来代替有缺陷的组件。 单独的导电层没有有源器件，因此是相对可靠和便宜的。