Fabrication of metal oxide structures with different thicknesses on a semiconductor substrate
    211.
    发明授权
    Fabrication of metal oxide structures with different thicknesses on a semiconductor substrate 有权
    在半导体衬底上制造具有不同厚度的金属氧化物结构

    公开(公告)号:US06228721B1

    公开(公告)日:2001-05-08

    申请号:US09602666

    申请日:2000-06-26

    Applicant: Bin Yu

    Inventor: Bin Yu

    CPC classification number: H01L21/823462 Y10S438/981

    Abstract: For fabricating a metal oxide structure on a semiconductor substrate, an active device area surrounded by at least one STI (shallow trench isolation) structure is formed in the semiconductor substrate. A layer of metal is deposited on the semiconductor substrate, and the layer of metal contacts the active device area of the semiconductor substrate. A layer of oxygen blocking material is deposited on the layer of metal. An opening is etched through the layer of oxygen blocking material to expose an area of the layer of metal on top of the active device area. A thermal oxidation process is performed to form a metal oxide structure from reaction of oxygen with the area of the layer of metal that is exposed. A thickness of the metal oxide structure is determined by a thickness of the layer of metal, and the layer of oxygen blocking material prevents contact of oxygen with the layer of metal such that the metal oxide structure is formed localized at the area where the layer of metal is exposed. In this manner, the metal oxide structure is formed by localized thermal oxidation of the layer of metal such that a deposition or sputtering process or an etching process is not necessary for formation of the metal oxide structure. In addition, the thickness of the metal oxide structure is determined by controlling the thickness of the layer of metal used for forming the metal oxide structure. Furthermore, these steps may be repeated for another layer of metal having a different thickness for forming a plurality of metal oxide structures having different thicknesses to provide gate dielectrics of MOSFETs (metal oxide semiconductor field effect transistors) having different threshold voltages on the same semiconductor substrate.

    Abstract translation: 为了在半导体衬底上制造金属氧化物结构,在半导体衬底中形成由至少一个STI(浅沟槽隔离)结构包围的有源器件区域。 一层金属沉积在半导体衬底上,金属层与半导体衬底的有源器件区接触。 一层氧阻塞材料沉积在金属层上。 通过氧阻挡材料层蚀刻开口以暴露活性器件区域顶部的金属层的区域。 进行热氧化处理以形成金属氧化物结构,从氧与暴露的金属层的面积的反应。 金属氧化物结构的厚度由金属层的厚度确定,并且氧阻挡材料层防止氧与金属层的接触,使得金属氧化物结构形成在区域 金属被暴露。 以这种方式,通过金属层的局部热氧化形成金属氧化物结构,使得形成金属氧化物结构不需要沉积或溅射工艺或蚀刻工艺。 此外,通过控制用于形成金属氧化物结构的金属层的厚度来确定金属氧化物结构的厚度。 此外,可以对具有不同厚度的另一层金属重复这些步骤,以形成具有不同厚度的多个金属氧化物结构,以在同一半导体衬底上提供具有不同阈值电压的MOSFET(金属氧化物半导体场效应晶体管)的栅极电介质 。

    Step drain and source junction formation
    212.
    发明授权
    Step drain and source junction formation 有权
    阶段漏极和源极结形成

    公开(公告)号:US06225176B1

    公开(公告)日:2001-05-01

    申请号:US09255203

    申请日:1999-02-22

    Applicant: Bin Yu

    Inventor: Bin Yu

    Abstract: A method of fabricating an integrated circuit with a step source/drain junction utilizes a triple amorphization technique. The technique creates a shallow amorphous region, an intermediate region and a deep amorphous region. The doped amorphous regions can be laser-annealed to form step-like source/drain junctions and their extensions. The process can be utilized for P-channel or N-channel metal-oxide-semiconductor field-effect transistors (MOSFETs).

    Abstract translation: 制造具有阶跃源极/漏极结的集成电路的方法利用三次非晶化技术。 该技术产生浅的非晶区域,中间区域和深非晶区域。 掺杂的非晶区域可以被激光退火以形成阶梯状源极/漏极结及其延伸。 该过程可用于P沟道或N沟道金属氧化物半导体场效应晶体管(MOSFET)。

    Method of manufacturing mosfet with differential gate oxide thickness on
the same IC chip
    213.
    发明授权
    Method of manufacturing mosfet with differential gate oxide thickness on the same IC chip 有权
    在同一IC芯片上制造差分栅极氧化物厚度的MOSFET的方法

    公开(公告)号:US6165849A

    公开(公告)日:2000-12-26

    申请号:US205616

    申请日:1998-12-04

    Applicant: Judy X. An Bin Yu

    Inventor: Judy X. An Bin Yu

    CPC classification number: H01L21/823462

    Abstract: A semiconductor device is formed having a low voltage transistor in a logic core portion and a high voltage transistor in an input/output portion. The low voltage transistor is formed by ion implanting nitrogen into the surface and forming a gate oxide layer on the nitrogen implanted surface portion of the semiconductor substrate in the logic core region. The implanted nitrogen retards the growth of the gate oxide layer in the nitrogen implanted area, thereby enabling formation of gate oxide layers having different thicknesses.

    Abstract translation: 半导体器件形成为具有逻辑芯部分中的低电压晶体管和输入/输出部分中的高压晶体管。 低压晶体管通过将氮离子注入到表面中并在逻辑核心区域中的半导体衬底的氮注入表面部分上形成栅极氧化物层而形成。 植入的氮阻止氮注入区域中的栅极氧化物层的生长,从而能够形成具有不同厚度的栅极氧化物层。

    MOS transistor with dual metal gate structure
    214.
    发明授权
    MOS transistor with dual metal gate structure 有权
    具有双金属栅极结构的MOS晶体管

    公开(公告)号:US6066533A

    公开(公告)日:2000-05-23

    申请号:US163290

    申请日:1998-09-29

    Applicant: Bin Yu

    Inventor: Bin Yu

    CPC classification number: H01L21/82345

    Abstract: A method for making a ULSI MOSFET includes depositing a high-k gate insulator on a silicon substrate and then depositing a field oxide layer over the gate insulator. The field oxide layer is masked with photoresist and the photoresist patterned to establish first gate windows, and the oxide below the windows is then etched away to establish first gate voids in the oxide. The first gate voids are filled with a first metallic gate electrode material that is suitable for establishing a gate electrode of, e.g., an N-channel MOSFET. Second gate voids are similarly made in the oxide and filled with a second gate electrode material that is suitable for establishing a gate electrode of, e.g., an P-channel MOSFET or another N-channel MOSFET having a different threshold voltage than the first MOSFET. With this structure, plural threshold design voltages are supported in a single ULSI chip that uses high-k gate insulator technology.

    Abstract translation: 制造ULSI MOSFET的方法包括在硅衬底上沉积高k栅极绝缘体,然后在栅极绝缘体上沉积场氧​​化物层。 用光致抗蚀剂掩蔽场氧化物层,并且将光致抗蚀剂图案化以建立第一栅极窗口,然后蚀刻掉窗口下面的氧化物以在氧化物中建立第一栅极空隙。 第一栅极空隙填充有适于建立例如N沟道MOSFET的栅电极的第一金属栅电极材料。 第二栅极空隙类似地在氧化物中制成并且填充有适于建立例如P沟道MOSFET或具有不同于第一MOSFET的阈值电压的另一N沟道MOSFET的栅电极的第二栅电极材料。 利用这种结构,在使用高k栅极绝缘体技术的单个ULSI芯片中支持多个阈值设计电压。

    Method and apparatus for sending hybrid automatic repeat request acknowledge information
    215.
    发明授权
    Method and apparatus for sending hybrid automatic repeat request acknowledge information 有权
    发送混合自动重发请求确认信息的方法和装置

    公开(公告)号:US09584265B2

    公开(公告)日:2017-02-28

    申请号:US14369403

    申请日:2012-03-09

    Abstract: Provided are a method and apparatus for sending Hybrid Automatic Repeat Request Acknowledge (HARQ-ACK) information. The method includes: when a terminal employs a physical uplink control channel (PUCCH) format 3 to transmit HARQ-ACK information and the HARQ-ACK information is transmitted over a uplink physical shared channel (PUSCH), determining the number of downlink subframes for serving cells to feed back the HARQ-ACK information; determining the number of encoded modulated symbols required for sending the HARQ-ACK information according to the determined number of downlink subframes; and mapping the HARQ-ACK information to be sent to the PUSCH of a specified uplink subframe according to the number of encoded modulated symbols and sending the HARQ-ACK information. The technical solutions provided by the disclosure are applied to improve the performance of the HARQ-ACK information, and thus improve the data performance.

    Abstract translation: 提供了一种用于发送混合自动重传请求确认(HARQ-ACK)信息的方法和装置。 该方法包括:当终端采用物理上行链路控制信道(PUCCH)格式3来发送HARQ-ACK信息,并且通过上行链路物理共享信道(PUSCH)发送HARQ-ACK信息时,确定用于服务的下行链路子帧的数量 小区来反馈HARQ-ACK信息; 根据确定的下行链路子帧的数量确定发送HARQ-ACK信息所需的编码调制符号的数量; 以及根据编码的调制符号的数量映射要发送到指定上行链路子帧的PUSCH的HARQ-ACK信息,并发送HARQ-ACK信息。 应用本公开提供的技术方案来改进HARQ-ACK信息的性能,从而提高数据性能。

    Retransmission method for time division duplexing self-adaptive frame structure, and network side device
    216.
    发明授权
    Retransmission method for time division duplexing self-adaptive frame structure, and network side device 有权
    时分双工自适应帧结构的重传方法和网络侧设备

    公开(公告)号:US09564995B2

    公开(公告)日:2017-02-07

    申请号:US14385685

    申请日:2012-06-25

    Abstract: A retransmission method for a time division duplexing self-adaptive frame structure, and a network side device relate to a technology of dynamically allocating uplink and downlink sub-frames in an LTE-advance (3GPP Release11) TDD communication system. The method comprises: during transmission of a TDD self-adaptive frame, for an uplink sub-frame, if a frame structure, of which an RTT period of PHICH and PUSCH of the uplink sub-frame is 10 ms, corresponding to the uplink sub frame is found in 7 types of defined frame structures, then sending PHICH data on a corresponding downlink sub-frame in the found frame structure, and sending retransmission data on the corresponding uplink sub-frame in the found frame structure. The solution ensures HARQ compatibility of an uplink data channel of R10UE. In addition, A/N feedback of the PDSCH is configured according to the uplink A/N resolution, thereby improving retransmission performance.

    Abstract translation: 一种用于时分双工自适应帧结构的重传方法,以及网络侧设备涉及在LTE-advance(3GPP Release 11)TDD通信系统中动态分配上行链路和下行链路子帧的技术。 该方法包括:在传输TDD自适应帧期间,对于上行链路子帧,如果其中PHICH和上行链路子帧的PUSCH的RTT周期为10ms的帧结构对应于上行链路子帧 在7种定义的帧结构中找到帧,然后在所找到的帧结构中的相应下行子帧上发送PHICH数据,并在找到的帧结构中的相应上行链路子帧上发送重发数据。 该解决方案确保了R10UE的上行链路数据信道的HARQ兼容性。 另外,根据上行A / N分辨率配置PDSCH的A / N反馈,从而提高重发性能。

    Query pipeline
    218.
    发明授权
    Query pipeline 有权
    查询流水线

    公开(公告)号:US09009139B2

    公开(公告)日:2015-04-14

    申请号:US13699953

    申请日:2011-06-10

    CPC classification number: G06F17/30563 G06F17/30442

    Abstract: A query pipeline is created (514) from a query request. The query pipeline includes multiple query operations including multiple query operators. A first query operator and a second query operator perform first and second query operations on a database (526) and on data outside the database (534). A result from the first query operation in the query pipeline is fed to the second query operation in the query pipeline.

    Abstract translation: 从查询请求创建查询流水线(514)。 查询流水线包括多个查询操作,包括多个查询运算符。 第一查询运算符和第二查询运算符对数据库(526)和数据库外的数据(534)执行第一和第二查询操作。 查询流水线中的第一个查询操作的结果被馈送到查询流水线中的第二个查询操作。

    Manufacturing and detecting device and method of birefringent lens grating
    220.
    发明授权
    Manufacturing and detecting device and method of birefringent lens grating 有权
    双折射透镜光栅的制造和检测装置和方法

    公开(公告)号:US08873019B2

    公开(公告)日:2014-10-28

    申请号:US12905988

    申请日:2010-10-15

    Applicant: Bin Yu

    Inventor: Bin Yu

    CPC classification number: G02B5/3083 G02B3/0031 G02B3/0037 G02B27/2214

    Abstract: The present disclosure provides a detecting device of a birefringent lens grating. The detecting device includes a projection pattern disposed adjacent to the birefringent lens grating; an illuminating light source for projecting light onto the projection pattern and the birefringent lens grating; an image capturing device for capturing the light out from the birefringent lens grating and obtaining a projection pattern image of the projection pattern; and a controller for comparing the projection pattern image with a reference to determine a refractive index matching degree of the birefringent lens grating. The present disclosure further provides a detecting method, a manufacture method and a manufacture device of the birefringent lens grating.

    Abstract translation: 本公开提供了双折射透镜光栅的检测装置。 检测装置包括与双折射透镜光栅相邻布置的投影图案; 用于将光投射到投影图案和双折射透镜光栅上的照明光源; 用于捕获来自双折射透镜光栅的光并获得投影图案的投影图案图像的图像捕获装置; 以及控制器,用于将投影图案图像与基准进行比较,以确定双折射透镜光栅的折射率匹配度。 本公开还提供了双折射透镜光栅的检测方法,制造方法和制造装置。

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