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221.发明申请SIGNAL MULTIPLEXING DEVICE AND SIGNAL MULTIPLEXING METHOD USING LAYERED DIVISION MULTIPLEXING 审中-公开信号多路复用器件和信号多路复用法使用分层多路复用公开(公告)号：US20170012811A1
公开(公告)日：2017-01-12
申请号：US15121010
申请日：2015-02-25
Inventor： Sung-Ik PARK , Jae-Young LEE , Sun-Hyoung KWON , Heung-Mook KIM , Nam-Ho HUR
CPC classification number: H04L27/2697 , H03M13/27 , H04L1/00 , H04L1/0041 , H04L1/0048 , H04L1/0061 , H04L1/0071 , H04L5/0007 , H04L27/2601 , H04L2001/0098
Abstract: An apparatus and method for multiplexing signals using layered division multiplexing are disclosed. A signal multiplexing apparatus according to an embodiment of the present invention includes a combiner configured to combine a core layer signal and an enhanced layer signal at different power levels, and a time interleaver configured to perform interleaving applied to both the core layer signal and the enhanced layer signal.
Abstract translation: 公开了一种使用分层复用复用信号的装置和方法。 根据本发明的实施例的信号多路复用装置包括：组合器，被配置为组合核心层信号和不同功率电平的增强层信号;以及时间交织器，被配置为执行应用于核心层信号和增强型 层信号。
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222.发明申请BIT INTERLEAVER FOR LOW-DENSITY PARITY CHECK CODEWORD HAVING LENGTH OF 16200 AND CODE RATE OF 2/15 AND 256-SYMBOL MAPPING, AND BIT INTERLEAVING METHOD USING SAME 审中-公开具有16200长度的密度奇偶校验码的比特交换机和2/15和256符号映射的编码速率以及使用相同的比特交换方法公开(公告)号：US20160218747A1
公开(公告)日：2016-07-28
申请号：US14718600
申请日：2015-05-21
Inventor： Sung-Ik PARK , Sun-Hyoung KWON , Bo-Mi LIM , Jae-Young LEE , Heung-Mook KIM , Nam-Ho HUR
CPC classification number: H03M13/2792 , H03M13/1102 , H03M13/1105 , H03M13/1165 , H03M13/255 , H03M13/2703 , H03M13/2778 , H04L1/0041 , H04L1/0057 , H04L1/0071 , H04L2001/0093
Abstract: A bit interleaver, a bit-interleaved coded modulation (BICM) device and a bit interleaving method are disclosed herein. The bit interleaver includes a first memory, a processor, and a second memory. The first memory stores a low-density parity check (LDPC) codeword having a length of 16200 and a code rate of 2/15. The processor generates an interleaved codeword by interleaving the LDPC codeword on a bit group basis. The size of the bit group corresponds to a parallel factor of the LDPC codeword. The second memory provides the interleaved codeword to a modulator for 256-symbol mapping.
Abstract translation: 本文公开了一种位交织器，位交织编码调制（BICM）装置和比特交织方法。 比特交织器包括第一存储器，处理器和第二存储器。 第一存储器存储长度为16200且码率为2/15的低密度奇偶校验（LDPC）码字。 处理器通过基于比特组交织LDPC码字来产生交错码字。 位组的大小对应于LDPC码字的并行因子。 第二存储器将交织的码字提供给用于256符号映射的调制器。
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223.发明申请BIT INTERLEAVER FOR LOW-DENSITY PARITY CHECK CODEWORD HAVING LENGTH OF 16200 AND CODE RATE OF 2/15 AND 16-SYMBOL MAPPING, AND BIT INTERLEAVING METHOD USING SAME 有权用于低密度奇偶校验的位交换机检查长度为16200的编码速率和2/15和16符号映射的代码率，以及使用相同的位交互方法公开(公告)号：US20160218745A1
公开(公告)日：2016-07-28
申请号：US14717892
申请日：2015-05-20
Inventor： Sung-Ik PARK , Sun-Hyoung KWON , Bo-Mi LIM , Jae-Young LEE , Heung-Mook KIM , Nam-Ho HUR
CPC classification number: H03M13/2792 , H03M13/1165 , H03M13/255 , H03M13/2778 , H04L1/0057 , H04L1/0071 , H04L2001/0093
Abstract: A bit interleaver, a bit-interleaved coded modulation (BICM) device and a bit interleaving method are disclosed herein. The bit interleaver includes a first memory, a processor, and a second memory. The first memory stores a low-density parity check (LDPC) codeword having a length of 16200 and a code rate of 2/15. The processor generates an interleaved codeword by interleaving the LDPC codeword on a bit group basis. The size of the bit group corresponds to a parallel factor of the LDPC codeword. The second memory provides the interleaved codeword to a modulator for 16-symbol mapping.
Abstract translation: 本文公开了一种位交织器，位交织编码调制（BICM）装置和比特交织方法。 比特交织器包括第一存储器，处理器和第二存储器。 第一存储器存储长度为16200且码率为2/15的低密度奇偶校验（LDPC）码字。 处理器通过基于比特组交织LDPC码字来产生交错码字。 位组的大小对应于LDPC码字的并行因子。 第二存储器将交织的码字提供给用于16符号映射的调制器。
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Patent Agency Ranking
224.发明申请BIT INTERLEAVER FOR LOW-DENSITY PARITY CHECK CODEWORD HAVING LENGTH OF 64800 AND CODE RATE OF 5/15 AND 64-SYMBOL MAPPING, AND BIT INTERLEAVING METHOD USING SAME 有权用于低密度奇偶校验的位交换机检查长度为64800，编码速率为5/15和64符号映射，以及使用相同的位交互方法公开(公告)号：US20150236720A1
公开(公告)日：2015-08-20
申请号：US14625550
申请日：2015-02-18
Inventor： Sung-Ik PARK , Sun-Hyoung KWON , Jae-Young LEE , Heung-Mook KIM , Nam-Ho HUR
CPC classification number: H03M13/2792 , H03M13/1148 , H03M13/116 , H03M13/1185 , H03M13/255 , H03M13/2778 , H04L1/0041 , H04L1/0045 , H04L1/0058 , H04L1/0071
Abstract: A bit interleaver, a bit-interleaved coded modulation (BICM) device and a bit interleaving method are disclosed herein. The bit interleaver includes a first memory, a processor, and a second memory. The first memory stores a low-density parity check (LDPC) codeword having a length of 64800 and a code rate of 5/15. The processor generates an interleaved codeword by interleaving the LDPC codeword on a bit group basis. The size of the bit group corresponds to a parallel factor of the LDPC codeword. The second memory provides the interleaved codeword to a modulator for 64-symbol mapping.
Abstract translation: 本文公开了一种位交织器，位交织编码调制（BICM）装置和比特交织方法。 比特交织器包括第一存储器，处理器和第二存储器。 第一存储器存储长度为64800且码率为5/15的低密度奇偶校验（LDPC）码字。 处理器通过基于比特组交织LDPC码字来产生交错码字。 位组的大小对应于LDPC码字的并行因子。 第二存储器将交织的码字提供给用于64符号映射的调制器。
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225.发明申请MODULATOR AND MODULATION METHOD USING NON-UNIFORM 16-SYMBOL SIGNAL CONSTELLATION FOR LOW-DENSITY PARITY CHECK CODEWORD HAVING 4/15 CODE RATE 有权使用非均匀16符号信号的调制解调器和调制方法用于低密度奇偶校验检查具有4/15码率的编码公开(公告)号：US20150229336A1
公开(公告)日：2015-08-13
申请号：US14620682
申请日：2015-02-12
Inventor： Sung-Ik PARK , Sun-Hyoung KWON , Jae-Young LEE , Heung-Mook KIM , Nam-Ho HUR
CPC classification number: H03M13/2792 , H03M13/1165 , H03M13/255 , H03M13/616 , H03M13/6552 , H04L1/0041 , H04L1/0042 , H04L1/0057 , H04L1/0071 , H04L27/3422
Abstract: A modulator and a modulation method using a non-uniform 16-symbol signal constellation are disclosed. The modulator includes a memory and a processor. The memory receives a codeword corresponding to a low-density parity check (LDPC) code having a code rate of 4/15. The processor maps the codeword to 16 symbols of the non-uniform 16-symbol signal constellation on a 4-bit basis.
Abstract translation: 公开了一种使用非均匀16符号信号星座的调制器和调制方法。 调制器包括存储器和处理器。 存储器接收与码率为4/15的低密度奇偶校验（LDPC）码对应的码字。 处理器将码字映射为4比特的16位符号的不均匀16符号信号星座。
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226.发明申请MODULATOR AND MODULATION METHOD USING NON-UNIFORM 16-SYMBOL SIGNAL CONSTELLATION FOR LOW-DENSITY PARITY CHECK CODEWORD HAVING 7/15 CODE RATE 审中-公开使用非均匀16符号信号的调制解调器和调制方法用于低密度奇偶校验检查具有7/15代码率的编码公开(公告)号：US20150229334A1
公开(公告)日：2015-08-13
申请号：US14618952
申请日：2015-02-10
Inventor： Sung-Ik PARK , Sun-Hyoung KWON , Jae-Young LEE , Heung-Mook KIM , Nam-Ho HUR
CPC classification number: H03M13/2792 , H03M13/1165 , H03M13/255 , H03M13/27 , H03M13/616 , H03M13/6552 , H04L1/0041 , H04L1/0042 , H04L1/0057 , H04L1/0071 , H04L27/3405
Abstract: A modulator and a modulation method using a non-uniform 16-symbol signal constellation are disclosed. The modulator includes a memory and a processor. The memory receives a codeword corresponding to a low-density parity check (LDPC) code having a code rate of 7/15. The processor maps the codeword to 16 symbols of the non-uniform 16-symbol signal constellation on a 4-bit basis.
Abstract translation: 公开了一种使用非均匀16符号信号星座的调制器和调制方法。 调制器包括存储器和处理器。 存储器接收与码率为7/15的低密度奇偶校验（LDPC）码对应的码字。 处理器将码字映射为4比特的16位符号的不均匀16符号信号星座。
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227.发明申请BIT INTERLEAVER FOR LOW-DENSITY PARITY CHECK CODEWORD HAVING LENGTH OF 64800 AND CODE RATE OF 7/15 AND QUADRATURE PHASE SHIFT KEYING, AND BIT INTERLEAVING METHOD USING SAME 有权用于低密度奇偶校验的位交换机检查长度为64800的长度和7/15的编码速率和相位相移键控和使用相同的位交互方法公开(公告)号：US20150214982A1
公开(公告)日：2015-07-30
申请号：US14606949
申请日：2015-01-27
Inventor： Sung-Ik PARK , Sun-Hyoung KWON , Jae-Young LEE , Heung-Mook KIM , Nam-Ho HUR
CPC classification number: H03M13/2792 , H03M13/1102 , H03M13/116 , H03M13/1185 , H03M13/255 , H03M13/2757 , H03M13/2778 , H03M13/616 , H03M13/6552 , H04L1/0041 , H04L1/0057 , H04L1/0058 , H04L1/0071 , H04L27/20 , H04L27/3416
Abstract: A bit interleaver, a bit-interleaved coded modulation (BICM) device and a bit interleaving method are disclosed herein. The bit interleaver includes a first memory, a processor, and a second memory. The first memory stores a low-density parity check (LDPC) codeword having a length of 64800 and a code rate of 7/15. The processor generates an interleaved codeword by interleaving the LDPC codeword on a bit group basis. The size of the bit group corresponds to a parallel factor of the LDPC codeword. The second memory provides the interleaved codeword to a modulator for quadrature phase shift keying (QPSK) modulation.
Abstract translation: 本文公开了一种位交织器，位交织编码调制（BICM）装置和比特交织方法。 比特交织器包括第一存储器，处理器和第二存储器。 第一存储器存储长度为64800且码率为7/15的低密度奇偶校验（LDPC）码字。 处理器通过基于比特组交织LDPC码字来产生交错码字。 位组的大小对应于LDPC码字的并行因子。 第二存储器将交织的码字提供给用于正交相移键控（QPSK）调制的调制器。
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228.发明申请SYSTEM AND METHOD FOR TRANSMITTING/RECEIVING THREE DIMENSIONAL VIDEO BASED ON DIGITAL BROADCASTING 审中-公开基于数字广播发送/接收三维视频的系统和方法公开(公告)号：US20130300825A1
公开(公告)日：2013-11-14
申请号：US13913811
申请日：2013-06-10
Inventor： Sung-Hoon KIM , Byung-Jun BAE , Kug-Jin YUN , Jae-Young LEE , Seung-Won KIM , Chung-Hyun AHN , Nam-Ho HUR , Soo-In LEE , Chieteuk AHN
IPC: H04N13/00
CPC classification number: H04N13/161 , H04H20/30 , H04H20/95 , H04N13/194 , H04N19/597 , H04N21/235 , H04N21/23614 , H04N21/2362 , H04N21/2365 , H04N21/4347 , H04N21/4348 , H04N21/435 , H04N21/845
Abstract: Provided is a system and method for transmitting and receiving 3D video based on digital broadcasting. The system includes: an encoder for generating 2D ES and 3D supplementary ES by encoding 2D video and 3D supplementary data; a packetizer for generating 2D video PES and 3D supplementary PES by packetizing the 2D video ES and the 3D supplementary ES; a PSI generator for generating a PSI; a TS generator for generating 2D video TS and 3D supplementary TS for the 2D video PES and the 3D supplementary PES; a multiplexer for multiplexing the transport streams to transmit the 2D video TS as a normal stream and transmit the 3D supplementary TS, the PSI TS and 3D video synch data TS as robust stream; and a modulator for modulating the multiplexed TS according to a DTV specification and transmitting the modulated TS.
Abstract translation: 提供了一种用于基于数字广播发送和接收3D视频的系统和方法。 该系统包括：通过编码2D视频和3D补充数据生成2D ES和3D补充ES的编码器; 用于通过打包2D视频ES和3D补充ES来生成2D视频PES和3D补充PES的打包器; 用于产生PSI的PSI发生器; 用于生成用于2D视频PES和3D补充PES的2D视频TS和3D辅助TS的TS生成器; 多路复用器，用于复用传输流以将2D视频TS作为普通流传输，并将3D补充TS，PSI TS和3D视频同步数据TS作为鲁棒流传输; 以及调制器，用于根据DTV规范调制经复用的TS，并发送调制的TS。
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