Abstract:
A parallel deblocking filtering method, and deblocking filter processor performing such deblocking, for removing edge artifacts created during video compression. The method includes loading luma samples for a macroblock. Filtering is performed on a set of vertical edges of the macroblock using information in the luma samples, with vertical edge filtering occurring concurrently with the loading of the luma samples. The method also includes filtering a set of horizontal edges of the macroblock using information in the luma samples. The horizontal edge filtering occurs in parallel with vertical edge sampling and with loading operations. The use of parallel and concurrent operations significantly enhances the efficiency of the deblocking method. Storing of filtered samples is also performed in the method, and this storing is performed concurrently with some loading operations as well as filtering operations. Edge filtering includes performing filtering to the H.264 standard and its deblocking filtering algorithm.
Abstract:
Methods and systems are described for displaying enabling the transmission, formatting, and display of multimedia data after a hot plug event during a start-up dead period. In particular, approaches for transmission, formatting, and display of multimedia data in the absence or non-operation of a hot plug detect system or signal, so that multimedia information can be displayed in a proper format even during the dead period when no hot plug detect signal is received.
Abstract:
A variable latency interface and method for managing variable latency. An apparatus includes a storage device controller and a read/write channel coupled to the storage device controller by a variable latency interface. The variable latency interface includes a media control component configured for read and write operations. The variable latency interface also includes a data transfer component configured for read and write operations. A read or write operation in the media control component is offset from a respective read or write operation in the data transfer component by a latency period.
Abstract:
Methods and systems are described for enabling display system data transmission during use. An integrated circuit package includes input interface circuitry configured to receive an audio-video data stream having a video signal and timing information and timing extraction circuitry that can identify blanking patterns for the video signal. The package includes input processing circuitry for receiving audio-video signal and converting the audio-video data stream input into a low voltage differential signal (LVDS). The package includes a timing controller having timing extraction circuitry, a set of symbol buffers, a scheduler, and timing control circuitry. All configured to implement LVDS data transfer and in some implementation enable point to point data transfer from data buffers to associated column drivers.
Abstract:
One or more digital video frames are interpolated using motion compensated temporal interpolation (MCTI). The quality of motion vectors corresponding to object motion between the two adjacent second video frames is detected. An average of forward motion vectors and an average of backward motion vectors representing motion of the object are compared by calculating the absolute value difference of the averaged forward and backward motion vectors to detect the quality of the motion vectors and a control signal is generated corresponding to the detected quality. Customized Image segmentation based on a first mode of image processing, a second mode of image processing or a combination of the first and second modes of image processing is then performed based on the detected accuracy to generate the interpolated frame.
Abstract:
This invention relates to cognitive radio based wireless communications of dynamic spectrum access networks, and more particularly to a method of addressing inter-systems (cells) coexistence and spectrum sharing. The described method of spectrum sharing called On-Demand Spectrum Contention, integrates Dynamic Frequency Selection and Transmission Power Control with iterative on-demand spectrum contentions and provides fairness, adaptability, and efficiency of spectrum access for dynamic spectrum access systems using active inter-system coordination.
Abstract:
TDLS support in VHT devices is enabled through the use of added VHT fields in the TDLS frames. A VHT TDLS direct link can be setup through a respective TDLS Setup Request/Response with added field announcing VHT Capabilities of the VHT device and the peer device. Added VHT Operation field in the TDLS Setup Confirm frame adds supports between VHT peer devices for non-VHT BSS and VHT BSS. Two VHT STAs can establish wider TDLS channel than BSS operating channel through TDLS establishment. VHT off channel support is enabled by adding Wide Bandwidth Channel Switch field in the TDLS Channel Switch Request frame and no changes to TDLS Channel Switch Response. A VHT Capabilities field is also added to TDLS Discovery Response frame to inform peer devices of device capabilities.
Abstract:
A six field address scheme identifies both the originating point and the endpoint of a data frame enabling multiple hop forwarding through a plurality of intermediate mesh points in a wireless mesh network. Data frames originating or ending at a point outside of the wireless mesh network access the wireless network at a mesh access point using a legacy address scheme. The legacy address schemes are converted to a six address scheme using a proxy address table at the access point. Each mesh access point includes not only a routing table but a proxy address table as well as enabling the mesh access point, and/or mesh portal points, to convert address schemes having less than six address fields to the six field format. Subsequent to the conversion, mesh points within the wireless mesh network need only the routing table to facilitate the forwarding of the data frame.
Abstract:
A strain enhanced transistor is provided having a strain inducing layer overlying a gate electrode. The gate electrode has sloped sidewalls over the channel region of the transistor.
Abstract:
A self-coexistence window reservation protocol for a plurality of Wireless Regional Area Network (WRAN) cells operating in a WRAN over a plurality of channels includes a sequence of self-coexistence windows that uniquely identifies a transmission period for each WRAN cell. A self-coexistence window reservation protocol is included within the first packet of a Coexistence Beaconing Protocol period identifying when each WRAN cell associated with a particular channel will transmit. When not actively transmitting, a WRAN cells remains in a passive, receiving mode to accept data. As the transmissions of each WRAN cell operating on a particular channel are scheduled, contention for a transmission period is eliminated.