Abstract:
A solid state image sensor includes an array of pixels and a corresponding array of microlenses. The positions of the microlenses relative to their corresponding pixels may vary according to the distances of the pixels from a central optical axis of the image sensor to substantially eliminate vignetting of light collected by the microlenses.
Abstract:
A logarithmic pixel is formed by a photodiode connected to a semiconductor device that is operating based upon a sub-threshold. A logarithmic output is taken from an output node connected to the pixel via an amplifier. To calibrate the pixel, the photodiode is isolated by a switch and a ramp voltage is applied as reference voltage to the amplifier. The ramp voltage acts across the constant internal capacitance of the pixel to produce in-pixel a constant current for calibration purposes.
Abstract:
A method for attaching a sensor and a housing to opposite sides of a mounting substrate is provided. The sensor has a sensing face that includes a sensing area and at least one signal output contact thereon. The mounting substrate has a circuitry face and at least one signal input contact thereon. The mounting substrate also has an opening therethrough. The method includes positioning the sensing area over the opening so that the at least one signal output contact of the sensor makes contact with the at least one signal input contact of the mounting substrate. The mounting substrate receives the housing so that the housing and the sensor are in alignment.
Abstract:
A chip includes CPU (12), memories (13,14) for programs and data, peripheral units (18,19) for interacting with the outside world, and an internal RC oscillator (17) for providing clock signals. One of the peripheral units (18) includes a timer counter incremented at a frequency derived from the RC oscillator. The method does not try to change the frequency of the RC oscillator. Instead, an external calibration source (21) is connected to a capture input of the timer unit to provide a signal having a reference frequency, e.g. the mains frequency. The counter is sampled on active edges of that signal, and the sampled values are processed to derive a calibration ratio. After these calibration steps, a software correction is applied to parameters handled by programs stored in memory based on the calibration ratio to compensate for frequency variations of the RC oscillator.
Abstract:
A digital camera for capturing and processing images of different resolutions and a corresponding method for down-scaling a digital image are provided. The method includes forming an image of a real scene on an image sensor that is made up of a plurality of pixels arranged in a matrix. The method further includes addressing and reading pixels in the matrix to obtain analog quantities related to the pixels luminance values, converting the analog quantities from the pixels matrix into digital values, and processing the digital values to obtain a data file representing the image of the real scene. To reduce computation time and power consumption, the addressing and reading of the pixels includes selecting a group of pixels from the matrix, and storing the analog quantities related to the pixels of the selected group of pixels into an analog storing circuit. The stored analog quantities are averaged to obtain an analog quantity corresponding to an average pixel luminance value.
Abstract:
An image sensor has an array of pixels. Each column has a first and a second column line connected to a read-reset amplifier/comparator which acts in a first mode as a unity gain buffer amplifier to reset the pixels via the first lines, and in a second mode acts as a comparator and AD converter to produce digitized reset and signal values. The reset and signal values are read out a line at a time in interleaved fashion. Reset values are stored in a memory and subsequently subtracted from the corresponding signal values. The arrangement reduces both fixed pattern and kT/C noise.
Abstract:
A look-up table apparatus is provided for performing two-bit arithmetic operation including carry generation. The look-up table is modified to perform two concurrent combinatorial functions, or one function for an increased number of inputs. The look-up table of the present invention can implement two full adders or subtractors, or two-bit counters, for example. One portion of the modified look-up table provides two bits of a sum output, and another portion of the modified table provides a fast carry out signal for application to a next stage of an adder/subtractor/counter.
Abstract:
Lighting flicker in the output of a video imaging device is detected. The video imaging device has a main picture area divided into pixels for producing successive images at a frame rate. A series of signals are produced from at least one additional picture area adjacent the main picture area, with the additional picture area having a size substantially larger than a pixel. Each of the signals is a function of light incident on the additional picture area in a time period substantially shorter than that of the frame rate. A predetermined number of the signals are accumulated to form a series of compound samples, and the compound samples are filtered to detect components indicating the lighting flicker. The filtering is performed using a bandpass filter tuned to the nominal flicker frequency. The compound samples are formed at a sample rate which is a multiple of the nominal flicker frequency, and the filtering is performed by taking the fundamental output component of a radix-N butterfly.
Abstract:
A first-in, first-out (FIFO) memory cell architecture is provided in which one node of the latch in the FIFO memory cell is connected to the gate of the pass transistor. Further, the bit line is connected to the source of the pass transistor, and the word line is connected to the drain of the pass transistor to provide a stable memory cell requiring less area for implementation.
Abstract:
A glitch filter includes a storage element for storing a current state, which is the output of the filter. An output of the storage element is connected to one input of a state comparator. Another input of the state comparator is connected to an input signal. A programmable clock delay is connected between the state comparator and the storage element. The programmable clock delay may provide a programmed duration independent of the technology used for implementation. The glitch filter is arranged such that the input signal is stored as the new current state in the storage element only if the input signal changes and then remains unchanged for the programmed duration.