公开(公告)号：US08659394B2

公开(公告)日：2014-02-25

申请号：US13093254

申请日：2011-04-25

Applicant: Il-jong Song ,  Byeong-hoon Lee ,  Seung-won Lee ,  Chul-joon Choi

Inventor： Il-jong Song ,  Byeong-hoon Lee ,  Seung-won Lee ,  Chul-joon Choi

IPC: H04Q5/22 ,  H04L5/12 ,  H03D3/02

CPC classification number: G06K19/07771 ,  H04Q2213/095

Abstract: Provided are a Radio Frequency IDentification (RFID) tag with a signal reception method. The RFID tag includes a demodulator that receives a read signal containing read data. The demodulator includes; a voltage generating circuit that provides a first voltage signal and a second voltage signal derived from the received read signal, an inverter that provides a data pulse signal indicative of the read data by inverting the second voltage signal using an inverting voltage defined in relation to the first voltage signal, and a buffer that recovers the read data by buffering the data pulse signal.

Abstract translation: 提供了具有信号接收方法的射频识别（RFID）标签。 RFID标签包括接收包含读取数据的读取信号的解调器。 解调器包括： 电压产生电路，其提供从所接收的读取信号导出的第一电压信号和第二电压信号;反相器，其通过使用相对于所述读取信号定义的反相电压来反转所述第二电压信号来提供指示所述读取数据的数据脉冲信号 第一电压信号和通过缓冲数据脉冲信号来恢复读取数据的缓冲器。

公开(公告)号：US08352640B2

公开(公告)日：2013-01-08

申请号：US12837431

申请日：2010-07-15

Applicant: Sang-Bum Kim ,  Sang-Wook Kang ,  Seong-Hyun Kim ,  Chul-Joon Choi ,  Jong-Sang Choi

Inventor： Sang-Bum Kim ,  Sang-Wook Kang ,  Seong-Hyun Kim ,  Chul-Joon Choi ,  Jong-Sang Choi

IPC: G06F3/00 ,  G06F1/26

CPC classification number: G06F13/385

Abstract: An electronic device includes a universal serial bus (USB) interface therein. This USB interface is configured to support at least first and second different USB interface standards. These different interface standards are selected by the electronic device in response to comparing a voltage level of a signal provided to said USB interface relative to a reference voltage generated within the electronic device. The signal provided to the USB may be a power supply signal, the first USB standard may be a USB 2.0 interface standard and the second USB standard may be an inter-chip USB interface standard.

Abstract translation: 电子设备包括其中的通用串行总线（USB）接口。 该USB接口被配置为支持至少第一和第二不同的USB接口标准。 响应于比较提供给所述USB接口的信号的电压电平相对于在电子设备内产生的参考电压，电子设备选择这些不同的接口标准。 提供给USB的信号可以是电源信号，第一USB标准可以是USB 2.0接口标准，第二USB标准可以是芯片间的USB接口标准。

公开(公告)号：US08046502B2

公开(公告)日：2011-10-25

申请号：US12175155

申请日：2008-07-17

Applicant: Seong-Hyun Kim ,  Sang-Bum Kim ,  Joong-Chul Yoon ,  Sang-Wook Kang ,  Jong-Sang Choi ,  Sung-Hyun Kim ,  Chul-Joon Choi

Inventor： Seong-Hyun Kim ,  Sang-Bum Kim ,  Joong-Chul Yoon ,  Sang-Wook Kang ,  Jong-Sang Choi ,  Sung-Hyun Kim ,  Chul-Joon Choi

IPC: G06F3/00 ,  G06F13/42

CPC classification number: G06K7/0008 ,  G06K7/10297 ,  G06K19/07

Abstract: The present invention provides an integrated circuit chip which includes a processor; a contact pad unit connected to a host through a plurality of contact pads; a host interface detector including at least one pull-up resistor and one pull-down resistor, for selectively connecting the pull-up resistor and the pull-down resistor to the contact pad unit to detect a host interface status; and an interface unit including a plurality of interface protocols, for communicating with the host using a part or all of the plurality of contact pads, wherein the processor receives a status of the host from the host interface detector, identifies a protocol of the host based on the received status of the host, and controls the interface unit so as to enable an interface protocol that is used to communicate with the host.

Abstract translation: 本发明提供一种集成电路芯片，其包括处理器; 接触垫单元，其通过多个接触垫连接到主机; 主机接口检测器，包括至少一个上拉电阻器和一个下拉电阻器，用于选择性地将上拉电阻器和下拉电阻器连接到接触焊盘单元以检测主机接口状态; 以及包括多个接口协议的接口单元，用于使用所述多个接触焊盘中的一部分或全部与所述主机进行通信，其中所述处理器从所述主机接口检测器接收所述主机的状态，识别所述主机的协议 关于主机的接收状态，并控制接口单元，以便启用用于与主机通信的接口协议。

公开(公告)号：US20100228896A1

公开(公告)日：2010-09-09

申请号：US12718138

申请日：2010-03-05

Applicant: Sung Geun Park ,  Chul Joon Choi ,  Keon Han Sohn

Inventor： Sung Geun Park ,  Chul Joon Choi ,  Keon Han Sohn

IPC: G06F3/00

CPC classification number: G06F13/426

Abstract: A semiconductor device includes at least one endpoint communicating with a host, and an endpoint controller dividing each of the at least one endpoint into a majority of sub-endpoints and performing numbering to each of the divided sub-endpoints. The endpoint controller transmits a packet generated by the host to any one of the sub-endpoints.

Abstract translation: 半导体器件包括与主机通信的至少一个端点，以及端点控制器，将至少一个端点中的每一个划分成多数子端点，并对每个分割的子端点执行编号。 端点控制器将由主机产生的分组发送到任何一个子端点。

公开(公告)号：US06624496B2

公开(公告)日：2003-09-23

申请号：US10044991

申请日：2002-01-15

Applicant: Ja-Hum Ku ,  Dong-Ho Ahn ,  Chul-Sung Kim ,  Jae-Yoon Yoo ,  Sug-Hun Hong ,  Chul-Joon Choi

Inventor： Ja-Hum Ku ,  Dong-Ho Ahn ,  Chul-Sung Kim ,  Jae-Yoon Yoo ,  Sug-Hun Hong ,  Chul-Joon Choi

IPC: H01L2176

CPC classification number: H01L29/66598 ,  H01L21/28518 ,  H01L21/76232 ,  H01L21/823481 ,  H01L29/41783 ,  H01L29/665 ,  H01L29/66636

Abstract: A method of forming a T-shaped isolation layer, a method of forming an elevated salicide source/drain region using the same, and a semiconductor device having the T-shaped isolation layer are provided. In the method of forming the T-shaped isolation layer, an isolation layer having a narrow trench region in the lower portion thereof and a wide trench region in the upper portion thereof is formed on a semiconductor substrate. Also, in the method of forming the elevated salicide source/drain region, the method of forming the T-shaped isolation layer is used. In particular, conductive impurities can also be implanted into the lower portion of the wide trench region which constitutes the head of the T-shaped isolation layer and is extended to both sides from the upper end of the narrow trench region by controlling the depth of the wide trench region in an ion implantation step for forming the source/drain region.