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公开(公告)号：US5394145A
公开(公告)日：1995-02-28
申请号：US029876
申请日：1993-03-11
Applicant: Dev V. Gupta , Kyung-Yeop Hong
Inventor： Dev V. Gupta , Kyung-Yeop Hong
CPC classification number: H04L1/247
Abstract: Loop Performance Monitoring (LPM) for DDS loops is described. Even though DDS loops have Intentional Bipolar Violations (BPVs), a Loop Coding Violations (LCVs) detection strategy based on further processing of BPVs is described. By monitoring LCVs a local loop terminating device can determine Bit Error Rate (BER).A system is described by which an Office Channel Unit (OCU) can process LCV information to determine signal quality of the signal over the incoming local loop. If the signal quality falls below a certain threshold, the OCU can cut the loop off from the DDS circuit and send control codes into the network.A system is also described where a Network Interface Unit (NIU) with the LPM system communicates incoming LCV information to the OCU using low speed signalling over the simplex path between the transmit and receive pairs. The OCU monitors incoming LCVs as well, and thus has the information necessary to determine bi-directional BER performance.
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公开(公告)号：US5058129A
公开(公告)日：1991-10-15
申请号：US419839
申请日：1989-10-11
Applicant: Dev V. Gupta , Kyung-Yeop Hong
Inventor： Dev V. Gupta , Kyung-Yeop Hong
CPC classification number: H04L25/4906 , H04L25/03343
Abstract: A quadrature coder for a two-wire digital loop communication system is described in which data is sampled and quadrature encoded by being divided into two bit streams, one of which comprises every other bit in the original bit stream and the other one comprises the remaining bits. One of the divided bit streams is delayed by 90.degree. from the other. The delayed and undelayed bit streams are then recombined and transmitted over a two-wire loop.
Abstract translation: 描述了一种用于二线数字环通信系统的正交编码器，其中数据被采样并通过被划分为两个比特流进行正交编码，其中一个比特流包括原始比特流中的每隔一个比特，另一个包括剩余比特 。 其中一个分流比特流从另一个延迟90度。 延迟和未延迟的比特流然后被重新组合并通过二线环路传输。
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公开(公告)号：US08866531B2
公开(公告)日：2014-10-21
申请号：US13576635
申请日：2011-02-11
Applicant: Dev V. Gupta , Zhiguo Lai
Inventor： Dev V. Gupta , Zhiguo Lai
CPC classification number: H03F3/45183 , H03F1/223 , H03F3/19 , H03F3/45188 , H03F3/45197 , H03F3/45201 , H03F2200/264 , H03F2200/36 , H03F2203/45318 , H03F2203/45374 , H03F2203/45644 , H03F2203/45686 , H03F2203/45702 , H03H7/24 , H03H7/25 , H03H7/482 , H03H7/487 , H03H11/1256 , H03H11/53 , H03H2210/017 , H03H2210/021 , H03H2210/028 , H03H2210/036 , H03H2210/04
Abstract: Broadband analog radio-frequency devices can be used to create building blocks for scalable analog signal processors that operate over bandwidths of 50 MHz to 20 GHz or more. Example devices include integrators (transconductors), digitally controlled attenuators, buffers, and scalable summers implemented using deep sub-micron CMOS technology. Because the devices are implemented in CMOS, the ratio of trace/component size to signal wavelength is about the same as that of low-frequency devices implemented in printed circuit boards. Combining this scaling with high gain/high bandwidth enables implementation of feedback and programmability for broadband analog signal processing.
Abstract translation: 宽带模拟射频设备可用于为可扩展的模拟信号处理器创建构建块，该处理器的工作频率可达50 MHz至20 GHz或更高。 示例器件包括使用深亚微米CMOS技术实现的积分器（跨导体），数字控制衰减器，缓冲器和可扩展的夏季。 由于器件是用CMOS实现的，所以迹线/器件尺寸与信号波长的比率与印刷电路板中实现的低频器件的比率大致相同。 将此扩展与高增益/高带宽相结合，可实现宽带模拟信号处理的反馈和可编程性。
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公开(公告)号：US20130293308A1
公开(公告)日：2013-11-07
申请号：US13882933
申请日：2011-11-01
Applicant: Dev V. Gupta
Inventor： Dev V. Gupta
IPC: H03F3/21
CPC classification number: H03F3/211 , H03F1/3229 , H03F3/195 , H03F3/245 , H03F3/45188 , H03F2200/405 , H03F2203/45644 , H03F2203/45684
Abstract: In an embodiment, a circuit includes a variable group delay configured to delay a wideband input signal to obtain a delayed input signal; a wideband operational amplifier configured to determine an error signal based on a difference between the delayed input signal and a linearized power amplifier output; a feedback amplifier configured to amplify the error signal to obtain an amplified error signal; and a directional combiner configured to combine the amplified error signal with the power amplifier output to obtain the linearized power amplifier output.
Abstract translation: 在一个实施例中，电路包括可变组延迟，其被配置为延迟宽带输入信号以获得延迟的输入信号; 宽带运算放大器，被配置为基于延迟输入信号和线性化功率放大器输出之间的差来确定误差信号; 反馈放大器，被配置为放大所述误差信号以获得放大的误差信号; 以及方向组合器，其被配置为将放大的误差信号与功率放大器输出组合以获得线性化的功率放大器输出。
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公开(公告)号：US08527003B2
公开(公告)日：2013-09-03
申请号：US11801421
申请日：2007-05-09
Applicant: Dev V. Gupta , Kenneth Wood , Abbie Mathew
Inventor： Dev V. Gupta , Kenneth Wood , Abbie Mathew
IPC: H04B1/38
CPC classification number: H04L25/03834 , H01Q1/2291 , H01Q9/0428 , H01Q13/0241 , H01Q15/244
Abstract: A system and apparatus including a wireless network architecture that provides broadband data network coverage over an expandable geographic area. A media access control layer is also provided that facilitates access to the broadband wireless network. A high-frequency wireless modem enables high data rate access to the wireless network in a spectrally-efficient manner using SSB modulation. A wideband millimeter-wave antenna includes a cosecant-squared reflector enabling signal propagation between network elements thereby enabling seamless wireless communications. A millimeter-wave polarizer, and a septum polarizer each convert between linear and circular polarization. A cross-shaped horn antenna adapted for circularly polarized signals can also be used in combination with the septum polarizer. A combined horn antenna is fed using a microstrip patch antenna.
Abstract translation: 一种包括在可扩展地理区域上提供宽带数据网络覆盖的无线网络架构的系统和装置。 还提供了便于接入宽带无线网络的媒体接入控制层。 高频无线调制解调器可以使用SSB调制以频谱有效的方式实现对无线网络的高数据速率接入。 宽带毫米波天线包括能够在网络元件之间进行信号传播的均方反射器，从而实现无缝无线通信。 毫米波偏振器和隔膜偏振器各自在线性和圆偏振之间转换。 适用于圆偏振信号的十字形喇叭天线也可以与隔膜偏振器组合使用。 使用微带贴片天线馈送组合喇叭天线。
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Patent Agency Ranking
公开(公告)号：US5099473A
公开(公告)日：1992-03-24
申请号：US556008
申请日：1990-07-20
Applicant: Dev V. Gupta , Y. Brian Chen , Keven Stiffler
Inventor： Dev V. Gupta , Y. Brian Chen , Keven Stiffler
IPC: H04L12/56
CPC classification number: H04L12/56
Abstract: A port concentrator communication system which allows a large number of end user stations to share a limited number of trunk lines to a packet switch network is described. Specifically, the system comprises a number of end user stations each coupled to a port concentration intelligent unit, with these units being coupled together in cascade fashion and the end unit in the cascade being coupled to a set of trunk lines leading to a packet switch network. Each of the trunk line ports corresponds to a channel in the DDS DSOB data streams network and in the reverse direction to the set of end user stations. Special code bytes, indicating the status of trunk line ports, appear in the DSOB data streams and play an integral role in the method whereby the port concentration intelligent units associated with the end user stations can request, obtain access to and communicate over, and relinquish trunk lines.
Abstract translation: 描述允许大量终端用户站共享有限数量的中继线到分组交换网络的端口集中器通信系统。 具体地，该系统包括多个终端用户站，每个终端用户站分别耦合到端口集中智能单元，其中这些单元以级联的方式耦合在一起，而级联中的终端单元耦合到一组中继线，通过分组交换网络 。 每个中继线端口对应于DDS DSOB数据流网络中的信道，并且与该组终端用户站相反。 指示中继线端口的状态的特殊代码字节出现在DSOB数据流中，并且在与最终用户站相关联的端口集中智能单元可以请求，获取和通信并放弃的方法中发挥不可或缺的作用 干线。
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公开(公告)号：US09007128B2
公开(公告)日：2015-04-14
申请号：US13882933
申请日：2011-11-01
Applicant: Dev V. Gupta
Inventor： Dev V. Gupta
CPC classification number: H03F3/211 , H03F1/3229 , H03F3/195 , H03F3/245 , H03F3/45188 , H03F2200/405 , H03F2203/45644 , H03F2203/45684
Abstract: In an embodiment, a circuit includes a variable group delay configured to delay a wideband input signal to obtain a delayed input signal; a wideband operational amplifier configured to determine an error signal based on a difference between the delayed input signal and a linearized power amplifier output; a feedback amplifier configured to amplify the error signal to obtain an amplified error signal; and a directional combiner configured to combine the amplified error signal with the power amplifier output to obtain the linearized power amplifier output.
Abstract translation: 在一个实施例中，电路包括可变组延迟，其被配置为延迟宽带输入信号以获得延迟的输入信号; 宽带运算放大器，被配置为基于延迟输入信号和线性化功率放大器输出之间的差来确定误差信号; 反馈放大器，被配置为放大所述误差信号以获得放大的误差信号; 以及方向组合器，其被配置为将放大的误差信号与功率放大器输出组合以获得线性化的功率放大器输出。
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公开(公告)号：US20120001660A1
公开(公告)日：2012-01-05
申请号：US13175260
申请日：2011-07-01
Applicant: Dev V. Gupta
Inventor： Dev V. Gupta
IPC: H03B21/00
CPC classification number: H04B1/0028
Abstract: Present software-defined radios (SDR) employ front end circuits that contain multiple receivers and transmitters for each band of interest, which is inflexible, expensive and power inefficient. A programmable front end circuit is implemented on a CMOS device and is configurable to transmit and receive signals in a wide band of frequencies, thereby providing an adaptable transmitter and receiver operable with current and future wireless networking technologies.
Abstract translation: 目前的软件定义无线电（SDR）采用前端电路，其中包含每个感兴趣的频带的多个接收机和发射机，这是不灵活，昂贵和功率低效的。 可编程前端电路在CMOS器件上实现，并且可配置为在宽频带内发送和接收信号，从而提供可适用于当前和未来无线网络技术的发射器和接收器。
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公开(公告)号：US06731627B1
公开(公告)日：2004-05-04
申请号：US09441587
申请日：1999-11-17
Applicant: Dev V. Gupta , Subra Dravida , Vikram Saksena , Paiman Nodoushani , Denis Claveloux , Sriram Narayan , Kyung-Yeop Hong , Anthony Monteiro , Wei Ye , David S. Yoon
Inventor： Dev V. Gupta , Subra Dravida , Vikram Saksena , Paiman Nodoushani , Denis Claveloux , Sriram Narayan , Kyung-Yeop Hong , Anthony Monteiro , Wei Ye , David S. Yoon
IPC: H04L1266
CPC classification number: H04L12/66
Abstract: A loop carrier system includes a home local area network having plural telephone modules and a hub coupled to in-home telephone wiring. The telephone modules and the hub communicate voice signals over the in-home wiring in a dedicated frequency band above baseband POTS. The hub converts between voice signals and voice packets and is connected to a network access device for transferring the voice packets from the home local area network to a telecommunications network which routes the voice packets to a gateway. The gateway converts between the voice packets and a circuit format compatible with a local digital voice switch.
Abstract translation: 环路载波系统包括具有多个电话模块的家庭局域网和耦合到家庭内电话线路的集线器。 电话模块和集线器在基带POTS之上的专用频带内通过家庭内线路传送语音信号。 集线器在语音信号和语音分组之间进行转换，并连接到网络接入设备，用于将语音分组从本地局域网传送到将语音分组路由到网关的电信网络。 网关在语音数据包和与本地数字语音交换机兼容的电路格式之间进行转换。
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公开(公告)号：US4887278A
公开(公告)日：1989-12-12
申请号：US100241
申请日：1987-09-23
Applicant: Dev V. Gupta
Inventor： Dev V. Gupta
Abstract: A post-equalizer and pre-equalizer circuit for use in communicating between nodes in a pulse amplitude modulated digital communication system is described. The post-equalizer circuit comprises a first variable zero circuit, a second variable circuit, and a gain shaper circuit wherein the gain and frequency location of the zeros in the zero circuits combined with the gain of the gain shaping circuit are simultaneously controlled by a control circuit which generates a control voltage which is a monotonically increasing function of cable loss. The control voltage generates a signal equal to the difference between the equalized signal and the original transmitted signal which is used to vary the resistance of voltage variable resistors in the form of FET's in each of the zero circuits and gain shaper circuits. If the cable loss is above a predetermined value, a pre-equalizer circuit is switched into the transmit path of the communication system and provides a gain, zero and pole at predetermined frequencies which pre-compensates for the extra loss incurred in transmission over length greater than can be equalized by the post-equalizer. Additionally, a bi-quad ACE circuit is described which provides a hyperbolic relationship between the zero frequency location and circuit gain utilizing a cascode amplifier and emitter follower circuit with a feedback loop through a voltage variable resistor.
Abstract translation: 描述了用于脉冲幅度调制数字通信系统中的节点之间的通信的后均衡器和预均衡器电路。 后均衡器电路包括第一可变零电路，第二可变电路和增益整形器电路，其中与增益整形电路的增益组合的零电路中的零的增益和频率位置同时由控制 电路产生电缆损耗单调递增的控制电压。 控制电压产生等于均衡信号和原始发送信号之间的差的信号，该信号用于改变在零电路和增益整形电路中的FET的形式的电压可变电阻器的电阻。 如果电缆损耗高于预定值，则预均衡器电路被切换到通信系统的发送路径，并且以预定频率提供增益零点和极点，其预先补偿在传输过程中产生的额外损耗更长 可以通过后均衡器进行均衡。 此外，描述了一种双二极管ACE电路，其利用具有通过电压可变电阻器的反馈回路的共源共栅放大器和射极跟随器电路在零频率位置和电路增益之间提供双曲线关系。
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