公开(公告)号：US09007128B2

公开(公告)日：2015-04-14

申请号：US13882933

申请日：2011-11-01

Applicant: Dev V. Gupta

Inventor： Dev V. Gupta

IPC: H03F1/08 ,  H03F3/21 ,  H03F1/32 ,  H03F3/195 ,  H03F3/24 ,  H03F3/45

CPC classification number: H03F3/211 ,  H03F1/3229 ,  H03F3/195 ,  H03F3/245 ,  H03F3/45188 ,  H03F2200/405 ,  H03F2203/45644 ,  H03F2203/45684

Abstract: In an embodiment, a circuit includes a variable group delay configured to delay a wideband input signal to obtain a delayed input signal; a wideband operational amplifier configured to determine an error signal based on a difference between the delayed input signal and a linearized power amplifier output; a feedback amplifier configured to amplify the error signal to obtain an amplified error signal; and a directional combiner configured to combine the amplified error signal with the power amplifier output to obtain the linearized power amplifier output.

Abstract translation: 在一个实施例中，电路包括可变组延迟，其被配置为延迟宽带输入信号以获得延迟的输入信号; 宽带运算放大器，被配置为基于延迟输入信号和线性化功率放大器输出之间的差来确定误差信号; 反馈放大器，被配置为放大所述误差信号以获得放大的误差信号; 以及方向组合器，其被配置为将放大的误差信号与功率放大器输出组合以获得线性化的功率放大器输出。

公开(公告)号：US20120001660A1

公开(公告)日：2012-01-05

申请号：US13175260

申请日：2011-07-01

Applicant: Dev V. Gupta

Inventor： Dev V. Gupta

IPC: H03B21/00

CPC classification number: H04B1/0028

Abstract: Present software-defined radios (SDR) employ front end circuits that contain multiple receivers and transmitters for each band of interest, which is inflexible, expensive and power inefficient. A programmable front end circuit is implemented on a CMOS device and is configurable to transmit and receive signals in a wide band of frequencies, thereby providing an adaptable transmitter and receiver operable with current and future wireless networking technologies.

Abstract translation: 目前的软件定义无线电（SDR）采用前端电路，其中包含每个感兴趣的频带的多个接收机和发射机，这是不灵活，昂贵和功率低效的。 可编程前端电路在CMOS器件上实现，并且可配置为在宽频带内发送和接收信号，从而提供可适用于当前和未来无线网络技术的发射器和接收器。

公开(公告)号：US06731627B1

公开(公告)日：2004-05-04

申请号：US09441587

申请日：1999-11-17

Applicant: Dev V. Gupta ,  Subra Dravida ,  Vikram Saksena ,  Paiman Nodoushani ,  Denis Claveloux ,  Sriram Narayan ,  Kyung-Yeop Hong ,  Anthony Monteiro ,  Wei Ye ,  David S. Yoon

Inventor： Dev V. Gupta ,  Subra Dravida ,  Vikram Saksena ,  Paiman Nodoushani ,  Denis Claveloux ,  Sriram Narayan ,  Kyung-Yeop Hong ,  Anthony Monteiro ,  Wei Ye ,  David S. Yoon

IPC: H04L1266

CPC classification number: H04L12/66

Abstract: A loop carrier system includes a home local area network having plural telephone modules and a hub coupled to in-home telephone wiring. The telephone modules and the hub communicate voice signals over the in-home wiring in a dedicated frequency band above baseband POTS. The hub converts between voice signals and voice packets and is connected to a network access device for transferring the voice packets from the home local area network to a telecommunications network which routes the voice packets to a gateway. The gateway converts between the voice packets and a circuit format compatible with a local digital voice switch.

Abstract translation: 环路载波系统包括具有多个电话模块的家庭局域网和耦合到家庭内电话线路的集线器。 电话模块和集线器在基带POTS之上的专用频带内通过家庭内线路传送语音信号。 集线器在语音信号和语音分组之间进行转换，并连接到网络接入设备，用于将语音分组从本地局域网传送到将语音分组路由到网关的电信网络。 网关在语音数据包和与本地数字语音交换机兼容的电路格式之间进行转换。

公开(公告)号：US4887278A

公开(公告)日：1989-12-12

申请号：US100241

申请日：1987-09-23

Applicant: Dev V. Gupta

Inventor： Dev V. Gupta

IPC: H04B3/06 ,  H04B3/14

CPC classification number: H04B3/145 ,  H04B3/06

Abstract: A post-equalizer and pre-equalizer circuit for use in communicating between nodes in a pulse amplitude modulated digital communication system is described. The post-equalizer circuit comprises a first variable zero circuit, a second variable circuit, and a gain shaper circuit wherein the gain and frequency location of the zeros in the zero circuits combined with the gain of the gain shaping circuit are simultaneously controlled by a control circuit which generates a control voltage which is a monotonically increasing function of cable loss. The control voltage generates a signal equal to the difference between the equalized signal and the original transmitted signal which is used to vary the resistance of voltage variable resistors in the form of FET's in each of the zero circuits and gain shaper circuits. If the cable loss is above a predetermined value, a pre-equalizer circuit is switched into the transmit path of the communication system and provides a gain, zero and pole at predetermined frequencies which pre-compensates for the extra loss incurred in transmission over length greater than can be equalized by the post-equalizer. Additionally, a bi-quad ACE circuit is described which provides a hyperbolic relationship between the zero frequency location and circuit gain utilizing a cascode amplifier and emitter follower circuit with a feedback loop through a voltage variable resistor.

Abstract translation: 描述了用于脉冲幅度调制数字通信系统中的节点之间的通信的后均衡器和预均衡器电路。 后均衡器电路包括第一可变零电路，第二可变电路和增益整形器电路，其中与增益整形电路的增益组合的零电路中的零的增益和频率位置同时由控制 电路产生电缆损耗单调递增的控制电压。 控制电压产生等于均衡信号和原始发送信号之间的差的信号，该信号用于改变在零电路和增益整形电路中的FET的形式的电压可变电阻器的电阻。 如果电缆损耗高于预定值，则预均衡器电路被切换到通信系统的发送路径，并且以预定频率提供增益零点和极点，其预先补偿在传输过程中产生的额外损耗更长 可以通过后均衡器进行均衡。 此外，描述了一种双二极管ACE电路，其利用具有通过电压可变电阻器的反馈回路的共源共栅放大器和射极跟随器电路在零频率位置和电路增益之间提供双曲线关系。

公开(公告)号：US07146630B2

公开(公告)日：2006-12-05

申请号：US09952374

申请日：2001-09-13

Applicant: Subrahmanyam Dravida ,  Prasad Dorbala ,  Dev V. Gupta ,  Satya V. Gupta

Inventor： Subrahmanyam Dravida ,  Prasad Dorbala ,  Dev V. Gupta ,  Satya V. Gupta

IPC: H04N7/173 ,  H04N7/16

CPC classification number: H04L61/2015 ,  H04L12/2801 ,  H04L12/2856 ,  H04L12/2859 ,  H04L12/2874 ,  H04L12/2876 ,  H04L12/4641 ,  H04L29/12216 ,  H04L41/12 ,  H04L41/5003 ,  H04L41/5022 ,  H04L41/5054 ,  H04L41/5087 ,  H04L41/509 ,  H04L47/10 ,  H04L47/15 ,  H04L47/20 ,  H04L47/24 ,  H04L47/2416 ,  H04L47/2425 ,  H04L47/2433 ,  H04L47/2441 ,  H04L47/2491 ,  H04L47/32 ,  H04L47/70 ,  H04L47/724 ,  H04L47/788 ,  H04L47/801 ,  H04L47/805 ,  H04L47/822 ,  H04L47/829 ,  H04L69/40 ,  H04L2012/5605 ,  H04L2012/5606 ,  H04L2012/561 ,  H04L2012/5651 ,  H04L2012/5679 ,  H04N7/10 ,  H04N7/17309 ,  H04N21/6118 ,  H04N21/6168 ,  H04Q3/0045

Abstract: Hybrid fiber/coax networks employ the existing cable plant used for cable TV and transmit data signals in a frequency bandwidth above that which is used for cable TV. As this cable plant was deployed in a tree and branch topology, data transmissions may be susceptible to noise, variable transmission loss and frequency dispersion, particularly in the upstream direction. Further, due to the tree and branch topology, homes at the far end of the network experience much greater loss than do the homes that are near to the headend/ONU. The present system, which uses point-to-point data links between intelligent network elements located in the feeder/distribution network to provide reliable, secure, bi-directional broadband access. Digital signals are terminated at the intelligent network elements, switched and regenerated for transmission across additional upstream or downstream data links as needed to connect a home to a headend or router. The intelligent network elements can be co-located with or replace the standard network elements to take advantage of existing network configurations. The standard network elements can be selectively replaced by the intelligent network elements in an incremental approach. In this manner, the data links are made over relatively short runs of coax cable, which can provide greater bandwidth than the typical end-to-end feeder/distribution connection between a home and the headend or optical network unit.

公开(公告)号：US5555244A

公开(公告)日：1996-09-10

申请号：US269370

申请日：1994-06-30

Applicant: Dev V. Gupta ,  Yu-Ren B. Chen ,  Craig A. Sharper ,  Alan E. Stone

Inventor： Dev V. Gupta ,  Yu-Ren B. Chen ,  Craig A. Sharper ,  Alan E. Stone

IPC: H04Q3/00 ,  H04L12/28 ,  H04L12/56 ,  H04L12/64 ,  H04L29/06 ,  H04N7/173 ,  H04N21/61 ,  H04N21/647 ,  H04Q11/04 ,  H04J3/02 ,  H04J3/16 ,  H04J3/22

CPC classification number: H04L65/1026 ,  H04L12/2801 ,  H04L12/2852 ,  H04L12/64 ,  H04L12/6402 ,  H04L29/06 ,  H04L49/107 ,  H04L65/1036 ,  H04N21/6118 ,  H04N21/64707 ,  H04N7/173 ,  H04N7/17309 ,  H04N7/17336 ,  H04N7/17345 ,  H04Q11/0478 ,  H04L2012/5612 ,  H04L2012/5613 ,  H04L2012/5614 ,  H04L2012/5615 ,  H04L2012/5627 ,  H04L2012/5638 ,  H04L2012/5651 ,  H04L2012/5652 ,  H04L2012/5679 ,  H04L2012/6427 ,  H04L2012/6443 ,  H04L2012/6448 ,  H04L2012/6459 ,  H04L2012/6464 ,  H04L2012/6483 ,  H04L2012/6486 ,  H04L2012/6489 ,  H04L29/06027 ,  H04L69/08

Abstract: A Scalable Multimedia Network providing integrated networking of data, voice, video and image services over a variety of access facilities including metallic loops, fiber/coax or digital fiber is disclosed herein.The SMN establishes customer initiated switched virtual circuits for all traffic types and directs them to the appropriate backbone network. The SMN is based on a distributed switching platform that enables carriers to economically provide service to a small number of customers and add capacity incrementally as the customer base increases. The platform has a protocol adaptation capability which permits communications between customer premises equipment and potentially incompatible backbone networks or network servers.

Abstract translation: 本文公开了一种通过各种接入设备（包括金属环路，光纤/同轴或数字光纤）提供数据，语音，视频和图像服务的集成网络的可扩展多媒体网络。 SMN为所有流量类型建立客户启动的交换虚拟电路，并将其引导到相应的骨干网络。 SMN基于分布式交换平台，使运营商能够经济地为少数客户提供服务，并随着客户群增加而逐步增加容量。 该平台具有允许客户端设备与潜在不兼容的骨干网络或网络服务器之间通信的协议适配能力。

公开(公告)号：US4862480A

公开(公告)日：1989-08-29

申请号：US036293

申请日：1987-04-09

Applicant: Dev V. Gupta

Inventor： Dev V. Gupta

IPC: H04L1/00 ,  H04L25/05 ,  H04L25/49

CPC classification number: H04L25/05 ,  H04L1/004 ,  H04L25/4925

Abstract: A digital data service transmission system is described in which 19.2 kbps data rate AMI encoded local loop signals are formatted for reliable transmission at 64 kbps rates over unqualified digital facilities and re-formatted for entry into DDS network hierarchy.

Abstract translation: 描述了一种数字数据业务传输系统，其中19.2kbps数据速率AMI编码的本地环路信号被格式化，以通过不合格的数字设施以64kbps的速率进行可靠的传输，并重新格式化以进入DDS网络层级。

公开(公告)号：US4745622A

公开(公告)日：1988-05-17

申请号：US891462

申请日：1986-07-29

Applicant: Dev V. Gupta

Inventor： Dev V. Gupta

IPC: H04B3/06 ,  H04B3/14 ,  H04B1/58 ,  H03F3/04

CPC classification number: H04B3/06 ,  H04B3/145

Abstract: A post-equalizer and pre-equalizer circuit for use in communicating between nodes in a Pulse Amplitude Modulated (PAM) digital or analog communication system is described. The post-equalizer circuit comprises a first variable zero circuit, a second variable zero circuit, and a gain shaper circuit wherein the gain and frequency location of the zeros in the zero circuits combined with the gain of the gain shaping circuit are simultaneously controlled by a control circuit which generates a control voltage which is a monotonically increasing function of cable loss. In the case of a PAM digital communication system, the control voltage generates a signal equal to the difference between the equalized signal and the original transmitted signal which is used to vary the resistance of voltage variable resistors in the form of FET's in each of the zero circuits and gain shaper circuits. In the case of an analog system, the control voltage is derived from the sealing current that is determined by the DC resistance of the cable to be equalized. If the cable loss is above a predetermined value, a pre-equalizer circuit is switched into the transmit path of the communication system and provides a gain, zero and pole at predetermined frequencies which pre-compensates for the extra loss incurred in transmission over length greater than can be equalized by the post-equalizer. Additionally, a bi-quad ACE circuit is described which provides a hyperbolic relationship between the zero frequency location and circuit gain utilizing a cascode amplifier and emitter follower circuit with a feedback loop through a voltage variable resistor.

Abstract translation: 描述了用于在脉冲幅度调制（PAM）数字或模拟通信系统中的节点之间通信的后均衡器和预均衡器电路。 后均衡器电路包括第一可变零电路，第二可变零电路和增益整形器电路，其中零电路中的零的增益和频率位置与增益整形电路的增益组合，同时由 控制电路，其产生电缆损耗单调递增功能的控制电压。 在PAM数字通信系统的情况下，控制电压产生等于均衡信号和原始发送信号之间的差异的信号，该信号用于改变零电压形式的电压可变电阻器的电阻 电路和增益整形电路。 在模拟系统的情况下，控制电压是由电缆的直流电阻所确定的密封电流导出的。 如果电缆损耗高于预定值，则预均衡器电路被切换到通信系统的发送路径，并且以预定频率提供增益零点和极点，其预先补偿在传输过程中产生的额外损耗更长 可以通过后均衡器进行均衡。 此外，描述了一种双二极管ACE电路，其利用具有通过电压可变电阻器的反馈回路的共源共栅放大器和射极跟随器电路在零频率位置和电路增益之间提供双曲线关系。

公开(公告)号：US08913652B2

公开(公告)日：2014-12-16

申请号：US12921987

申请日：2009-03-10

Applicant: Divi Gupta ,  Dev V. Gupta

Inventor： Divi Gupta ,  Dev V. Gupta

IPC: H03H7/30 ,  H03H7/40 ,  H03H11/12

CPC classification number: H03H11/1291 ,  H03H11/12 ,  H03H11/1252 ,  H03H2240/00

Abstract: Embodiments include methods, systems, and apparatuses capable of dynamically and adaptively operating on wideband signals. Examples include state variable filters whose center frequencies can be tuned using variable gain blocks coupled to outputs of filter integrators. First- and second-order state variable filters may operate on signals in parallel and their outputs combined to produce a filtered output. Filters may be tuned to pass or reject signals depending on the application; sample applications include, but are not limited to: agile filtering; spectrum analysis; interference detection and rejection; equalization; direct intermediate-frequency transmission; and single-sideband modulation and demodulation.

Abstract translation: 实施例包括能够在宽带信号上动态和自适应地操作的方法，系统和装置。 示例包括状态变量滤波器，其中心频率可以使用耦合到滤波器积分器的输出的可变增益块进行调谐。 一阶和二阶状态变量滤波器可以对并联的信号进行操作，并且它们的输出组合以产生滤波输出。 可以根据应用调整滤波器以通过或拒绝信号; 示例应用程序包括但不限于：敏捷过滤; 频谱分析; 干扰检测和拒绝; 均衡 直接中频传输; 和单边带调制解调。

公开(公告)号：US07835379B2

公开(公告)日：2010-11-16

申请号：US11180889

申请日：2005-07-12

Applicant: Subrahmanyam Dravida ,  Dev V. Gupta ,  Frederick Peralta ,  Kiran M. Rege ,  Manas Tandon

Inventor： Subrahmanyam Dravida ,  Dev V. Gupta ,  Frederick Peralta ,  Kiran M. Rege ,  Manas Tandon

IPC: H04L12/28

CPC classification number: H04L61/2015 ,  H04L12/2801 ,  H04L12/2856 ,  H04L12/2859 ,  H04L12/2861 ,  H04L12/4641 ,  H04L12/4645 ,  H04L29/12216 ,  H04L41/0806 ,  H04L41/0886 ,  H04L41/12 ,  H04L41/5003 ,  H04L47/10 ,  H04L47/20 ,  H04L47/2416 ,  H04L47/2425 ,  H04L47/2433 ,  H04L47/2441 ,  H04L47/2491 ,  H04L47/32 ,  H04L2012/5605 ,  H04L2012/5606 ,  H04L2012/561 ,  H04L2012/5651 ,  H04L2012/5679 ,  H04N7/10 ,  H04N7/17309 ,  H04Q3/0045

Abstract: The present system uses point-to-point data links between intelligent network elements located in the feeder/distribution network to provide reliable, secure, bidirectional broadband access. Digital signals are terminated at the intelligent network elements, switched and regenerated for transmission across additional upstream or downstream data links as needed to connect a home to a headend or router. The intelligent network elements are co-located with or replace the standard network elements to take advantage of existing network configurations. The standard network elements are selectively replaced by the intelligent network elements in an incremental approach. A tree-and-branch network architecture is established in which each intelligent network element is assigned a routing ID employed in the point-to-point transmissions while leaving legacy analog signals unimpeded. The data links are made over relatively short runs of coax cable, which provides greater bandwidth than typical end-to-end feeder/distribution connections between a home and the headend or optical network unit.

Abstract translation: 本系统使用位于馈线/分配网络中的智能网络元件之间的点对点数据链路，以提供可靠，安全的双向宽带接入。 数字信号在智能网络元件处被终止，被切换和再生以用于在将家庭连接到头端或路由器所需的附加上游或下游数据链路上传输。 智能网络元件与标准网络元件共同定位或替换，以利用现有的网络配置。 标准网元以增量方式由智能网元选择性地替代。 建立了一种树分支网络架构，其中每个智能网络元件被分配在点对点传输中使用的路由ID，同时保留传统模拟信号不受阻碍。 数据链路通过较短的同轴电缆运行进行，这提供了比家庭和头端或光网络单元之间的典型端到端馈线/分配连接更大的带宽。