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    Level-shifting amplifier
    2.
    发明授权
    Level-shifting amplifier 有权
    电平转换放大器

    公开(公告)号：US09374050B1

    公开(公告)日：2016-06-21

    申请号：US14610597

    申请日：2015-01-30

    Applicant: LINEAR TECHNOLOGY CORPORATION

    Inventor： Joseph Adut ,  John Perry Myers

    IPC: H03F3/45

    CPC classification number: H03F3/45502 ,  H03F3/45201 ,  H03F2203/45081 ,  H03F2203/45082

    Abstract: A differential amplifier may, when connected to a positive or negative supply voltage and to a ground voltage, provide a differential pair of outputs signals at a differential output that are an amplification of a differential pair of input signals at a differential input. A differential input stage may receive the differential pair of input signals from the differential input and may include a first transistor associated with one of the input signals and a second transistor associated with the other input signal. A differential output stage may generate the differential pair of output signals at the differential output and may include a third transistor associated with one of the output signals and a fourth transistor associated with the other output signal. The first, second, third, and fourth transistors may be all P type or all N type. The differential pair of output signals may have a common mode that is: near the ground voltage when the first, second, third, and fourth transistors are all N type and the supply voltage is positive with respect to the ground voltage; near the supply voltage when the first, second, third, and fourth transistors are all P type and the supply voltage is positive with respect to the ground voltage; near the ground voltage when the first, second, third, and fourth transistors are all P type and the supply voltage is negative with respect to the ground voltage; or near the supply voltage when the first, second, third, and fourth transistors are all N type and the supply voltage is negative with respect to the ground voltage.

    Abstract translation: 当差分放大器连接到正或负电源电压和接地电压时，可以在差分输出端提供差分输出信号差分输出信号，差分输出信号是差分输入端的差分输入信号对的放大。 差分输入级可以接收来自差分输入的差分输入信号对，并且可以包括与输入信号之一相关联的第一晶体管和与另一输入信号相关联的第二晶体管。 差分输出级可以在差分输出处产生差分输出信号对，并且可以包括与输出信号之一相关联的第三晶体管和与另一输出信号相关联的第四晶体管。 第一，第二，第三和第四晶体管可以是全P型或全N型。 输出信号的差分对可以具有共模，即当第一，第二，第三和第四晶体管都为N型时，接地电压附近，并且电源电压相对于接地电压为正; 当第一，第二，第三和第四晶体管都为P型并且电源电压相对于接地电压为正时在电源电压附近; 当第一，第二，第三和第四晶体管都为P型并且电源电压相对于接地电压为负时，接地电压附近; 或者当第一，第二，第三和第四晶体管都为N型并且电源电压相对于接地电压为负时，接近电源电压。

    High speed amplifier
    3.
    发明授权
    High speed amplifier 有权
    高速放大器

    公开(公告)号：US08576007B2

    公开(公告)日：2013-11-05

    申请号：US13229445

    申请日：2011-09-09

    Applicant: Marco Corsi ,  Victoria W. Limketkai ,  Venkatesh Srinivasan

    Inventor： Marco Corsi ,  Victoria W. Limketkai ,  Venkatesh Srinivasan

    IPC: H03F3/45

    CPC classification number: H03F1/223 ,  H03F3/45201 ,  H03F2203/45562 ,  H03F2203/45644

    Abstract: For high speed amplifiers, the parasitic capacitances from the differential input pair introduce a zero that can affect performance. Here, a neutralization network has been provided that compensates for this zero by shifting its position. This is generally accomplished by using a pair of capacitors that are cross-coupled across the differential input pair of the amplifier.

    Abstract translation: 对于高速放大器，差分输入对的寄生电容引入可影响性能的零。 这里提供了一个中和网络，通过改变其位置来补偿这个零点。 这通常通过使用跨越放大器的差分输入对交叉耦合的一对电容来实现。

    Frequency-variable filter
    4.
    发明授权
    Frequency-variable filter 有权
    变频滤波器

    公开(公告)号：US08482344B2

    公开(公告)日：2013-07-09

    申请号：US13614347

    申请日：2012-09-13

    Applicant: Kazuaki Oishi

    Inventor： Kazuaki Oishi

    IPC: H03B1/00

    CPC classification number: H03H11/1291 ,  H03F3/45201 ,  H03F3/45475 ,  H03F2203/45138 ,  H03H11/0422 ,  H03H11/1213 ,  H03H11/1252 ,  H03M7/3022

    Abstract: A frequency-variable filter has a GmC filter having a plurality of OTAs and a capacitor; and a pseudo-random value generator outputting pseudo-random value of which average value in a predetermined time corresponds to an input setting value. And at least an OTA for determining a cut-off frequency, out of the plurality of OTAs, is controlled so that transconductance thereof is variably-controlled according to the pseudo-random values, and the cut-off frequency is variably-controlled based on the input setting value.

    Abstract translation: 频率可变滤波器具有具有多个OTA和电容器的GmC滤波器; 输出预定时间内的平均值对应于输入设定值的伪随机值的伪随机值生成部。 并且至少用于确定多个OTA中的截止频率的OTA被控制，使得其跨导根据伪随机值可变地控制，并且截止频率基于 输入设定值。

    FREQUENCY-VARIABLE FILTER
    5.
    发明申请
    FREQUENCY-VARIABLE FILTER 有权
    频率可变滤波器

    公开(公告)号：US20130009699A1

    公开(公告)日：2013-01-10

    申请号：US13614347

    申请日：2012-09-13

    Applicant: Kazuaki OISHI

    Inventor： Kazuaki OISHI

    IPC: H03B1/00

    CPC classification number: H03H11/1291 ,  H03F3/45201 ,  H03F3/45475 ,  H03F2203/45138 ,  H03H11/0422 ,  H03H11/1213 ,  H03H11/1252 ,  H03M7/3022

    Abstract: A frequency-variable filter has a GmC filter having a plurality of OTAs and a capacitor; and a pseudo-random value generator outputting pseudo-random value of which average value in a predetermined time corresponds to an input setting value. And at least an OTA for determining a cut-off frequency, out of the plurality of OTAs, is controlled so that transconductance thereof is variably-controlled according to the pseudo-random values, and the cut-off frequency is variably-controlled based on the input setting value.

    Abstract translation: 频率可变滤波器具有具有多个OTA和电容器的GmC滤波器; 输出预定时间内的平均值对应于输入设定值的伪随机值的伪随机值生成部。 并且至少用于确定多个OTA中的截止频率的OTA被控制，使得其跨导根据伪随机值可变地控制，并且截止频率基于 输入设定值。

    Variable transconductance circuit
    7.
    发明授权
    Variable transconductance circuit 有权
    可变跨导电路

    公开(公告)号：US07911274B2

    公开(公告)日：2011-03-22

    申请号：US12195059

    申请日：2008-08-20

    Applicant: Hiroyasu Morikawa ,  Masamichi Katada ,  Marie Nishinaka

    Inventor： Hiroyasu Morikawa ,  Masamichi Katada ,  Marie Nishinaka

    IPC: H03F3/45

    CPC classification number: H03F3/45197 ,  H03F3/45201 ,  H03F2203/45288 ,  H03F2203/45356 ,  H03F2203/45471 ,  H03F2203/45652 ,  H03F2203/45668 ,  H03G1/0029 ,  H03G7/001

    Abstract: The variable transconductance circuit includes: a voltage-current conversion circuit for outputting a current signal linear with an input voltage signal; first and second MOS transistors for converting the current signal received to a square-root compressed voltage signal; and third and fourth MOS transistors for converting the square-root compressed voltage signal to a linear current signal. A bias current at the first and second MOS transistors and a bias current at the third and fourth MOS transistors are varied to control transconductance.

    Abstract translation: 可变跨导电路包括：电压电流转换电路，用于输出与输入电压信号成线性的电流信号; 用于将接收的电流信号转换为平方根压缩电压信号的第一和第二MOS晶体管; 以及用于将平方根压缩电压信号转换为线性电流信号的第三和第四MOS晶体管。 改变第一和第二MOS晶体管的偏置电流以及第三和第四MOS晶体管的偏置电流以控制跨导。

    Selective differential low-noise amplifier
    8.
    发明授权
    Selective differential low-noise amplifier 失效
    选择差分低噪声放大器

    公开(公告)号：US07378907B2

    公开(公告)日：2008-05-27

    申请号：US11519789

    申请日：2006-09-13

    Applicant: Jérémie Chabloz

    Inventor： Jérémie Chabloz

    IPC: H03F3/45

    CPC classification number: H03F3/45201 ,  H03F1/26 ,  H03F1/565 ,  H03F3/193 ,  H03F2200/294 ,  H03F2200/372 ,  H03F2200/451 ,  H03F2203/45606 ,  H03F2203/45608 ,  H03F2203/45704

    Abstract: A selective differential low-noise amplifier includes a pair of transistors, each transistor of the pair being connected by its source to a current source and by its gate and/or its source to a differential voltage source, a coupling circuit between the gate of each transistor and the source of the other transistor of the pair, and, for each transistor of the pair, at least one series resonance and parallel resonance resonator connected in series between the source and/or the gate of the transistor and the differential voltage source.

    Abstract translation: 选择性差分低噪声放大器包括一对晶体管，该对的每个晶体管由其源极连接到电流源，并且其栅极和/或其源极连接到差分电压源，每个晶体管的栅极之间的耦合电路 晶体管和该对的另一个晶体管的源极，并且对于该对中的每个晶体管，串联连接在晶体管的源极和/或栅极与差分电压源之间的至少一个串联谐振和并联谐振谐振器。

    Variable transconductance circuit
    10.
    发明申请
    Variable transconductance circuit 有权
    可变跨导电路

    公开(公告)号：US20070018725A1

    公开(公告)日：2007-01-25

    申请号：US11481861

    申请日：2006-07-07

    Applicant: Hiroyasu Morikawa ,  Masamichi Katada ,  Marie Nishinaka

    Inventor： Hiroyasu Morikawa ,  Masamichi Katada ,  Marie Nishinaka

    IPC: H03F3/45

    CPC classification number: H03F3/45197 ,  H03F3/45201 ,  H03F2203/45288 ,  H03F2203/45356 ,  H03F2203/45471 ,  H03F2203/45652 ,  H03F2203/45668 ,  H03G1/0029 ,  H03G7/001

    Abstract: The variable transconductance circuit includes: a voltage-current conversion circuit for outputting a current signal linear with an input voltage signal; first and second MOS transistors for converting the current signal received to a square-root compressed voltage signal; and third and fourth MOS transistors for converting the square-root compressed voltage signal to a linear current signal. A bias current at the first and second MOS transistors and a bias current at the third and fourth MOS transistors are varied to control transconductance.

    Abstract translation: 可变跨导电路包括：电压电流转换电路，用于输出与输入电压信号成线性的电流信号; 用于将接收到的电流信号转换成平方根压缩电压信号的第一和第二MOS晶体管; 以及用于将平方根压缩电压信号转换为线性电流信号的第三和第四MOS晶体管。 改变第一和第二MOS晶体管的偏置电流以及第三和第四MOS晶体管的偏置电流以控制跨导。

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