SEMICONDUCTOR STRUCTURES AND MANUFACTURING METHODS THEREOF

    公开(公告)号:US20230170408A1

    公开(公告)日:2023-06-01

    申请号:US17927606

    申请日:2020-09-22

    Inventor: Kai Cheng

    CPC classification number: H01L29/7786 H01L29/66431

    Abstract: Provided are a semiconductor structure and manufacturing method thereof, the semiconductor comprising: a base (10), wherein the base (10) comprises strip trenches (101) arranged parallelly; and a heterojunction structure (11) located on bottom walls and sidewalls of the strip trenches and on the base other than the strip trenches, wherein regions of the heterojunction structure located on the bottom walls and on the base other than the strip trenches are polarized regions, regions of the heterojunction structure on the sidewalls are non-polarized regions, and the polarized regions contain carriers; the heterojunction structure comprises a source region (11a) and a drain region (11b) respectively located at both ends of each of the strip trenches, and a gate region (11c) between the source region and the drain region; and the carriers between the source region and the drain region are confined to flow in each of the polarized regions.

    SEMICONDUCTOR STRUCTURE
    22.
    发明公开

    公开(公告)号:US20230141244A1

    公开(公告)日:2023-05-11

    申请号:US17912822

    申请日:2020-11-02

    Inventor: Kai Cheng

    Abstract: The present disclosure provides a semiconductor structure, including: a substrate and a heterojunction structure disposed on the substrate, where the heterojunction structure includes a source region, a drain region, and a gate region disposed between the source region and the drain region, and the drain region is provided with a quantum well structure. The quantum well structure is provided in the drain region of the heterojunction structure, and the quantum well structure is used to generate photons by recombination luminescence, the photons can be radiated not only on the surface region of the potential barrier layer but also into the interior of the heterojunction structure, thereby the release process of electrons captured by the defects can be accelerated to reduce the current collapse effect as well as the dynamic on-resistance.

    LIGHT-EMITTING STRUCTURES AND MANUFACTURING METHODS THEREOF

    公开(公告)号:US20230124769A1

    公开(公告)日:2023-04-20

    申请号:US17968066

    申请日:2022-10-18

    Inventor: Kai Cheng

    Abstract: The present disclosure provides a light-emitting structure and a manufacturing method thereof. The light-emitting structure includes: a GaN-based LED structure and a nitrogen-containing passivation layer located on a sidewall of the GaN-based LED structure; wherein the GaN-based LED structure includes: a first semiconductor layer, a second semiconductor layer, and a light-emitting layer located between the first semiconductor layer and the second semiconductor layer, conductivity types of the first semiconductor layer and the second semiconductor layer are opposite.

    SCHOTTKY DIODE AND MANUFACTURING METHOD THEREOF

    公开(公告)号:US20230118944A1

    公开(公告)日:2023-04-20

    申请号:US18061598

    申请日:2022-12-05

    Inventor: Kai CHENG

    Abstract: Disclosed are a Schottky diode and a manufacturing method thereof. The Schottky diode includes a substrate, a first semiconductor layer, a heterostructure layer, and a passivation layer, where the passivation layer includes a first groove and a second groove, and the first groove and the second groove penetrate the passivation layer and expose the heterostructure layer; a second semiconductor layer, where the second semiconductor layer is located in the first groove, and the second semiconductor layer does not fully fill the first groove in a horizontal direction; a first electrode, where the first electrode is at least located on a heterostructure layer and the second semiconductor layer that are corresponding to the first groove; and a second electrode located in the second groove.

    FULL-COLOR LED EPITAXIAL STRUCTURE
    25.
    发明申请

    公开(公告)号:US20230085021A1

    公开(公告)日:2023-03-16

    申请号:US17988956

    申请日:2022-11-17

    Inventor: Kai CHENG

    Abstract: Disclosed is a full-color LED epitaxial structure, having different area ratios of pillars corresponding to an unit area of a substrate, which is utilized to realize different flow rates of reaction gas around each of the pillars when a light-emitting layer is grown, and different doping efficiency of each element in the growing light-emitting layer, which in turn realizes different composition ratios of each element in the growing light-emitting layer and different light-emitting wavelengths of LED. The above process is simple and the full-color LED semiconductor structure can be produced on a single substrate. And light-emitting wavelengths of LED can be adjusted only by adjusting the area ratio of the pillars to adjust a composition ratio of the light-emitting layer, thus reducing manufacturing processes of the full-color LED.

    PREPARATION METHOD FOR SEMICONDUCTOR STRUCTURE

    公开(公告)号:US20230038176A1

    公开(公告)日:2023-02-09

    申请号:US17968981

    申请日:2022-10-19

    Abstract: Disclosed is a preparation method for a semiconductor structure. The semiconductor structure includes: a substrate; an epitaxial layer and an epitaxial structure that are stacked on the substrate in sequence. The epitaxial layer is doped with a doping element. In the forming process, a sacrificial layer is formed on the epitaxial layer, and the sacrificial layer is repeatedly etched, such that a concentration of the doping element in the epitaxial layer is lower than a preset value. In this application, the sacrificial layer is formed on the epitaxial layer, and the sacrificial layer is repeatedly etched, such that the concentration of the doping element in the epitaxial layer is lower than the preset value, so as to prevent the doping element in the epitaxial layer from being precipitated upward into an upper-layer structure, ensure the mobility of electrons in a channel layer, and improve the performance of a device.

    SEMICONDUCTOR STRUCTURES AND METHODS OF MANUFACTURING THE SAME

    公开(公告)号:US20230006091A1

    公开(公告)日:2023-01-05

    申请号:US17781357

    申请日:2020-06-11

    Abstract: This application provides semiconductor structures and methods of manufacturing the same. A semiconductor structure includes: an N-type semiconductor layer, a light emitting layer, and a P-type ion doped layer that are disposed from bottom to up, wherein the P-type ion doped layer comprises an activated region and non-activated regions located on two sides of the activated region, P-type doping ions in the activated region are activated, and P-type doping ions in the non-activated region are passivated. The layout of the activated region and the non-activated regions makes an LED include: a high-efficiency light emitting region and light emitting obstacle regions located on two sides of the high-efficiency light emitting region.

    Optoelectronic Device and Preparation Method Thereof

    公开(公告)号:US20220416129A1

    公开(公告)日:2022-12-29

    申请号:US17897397

    申请日:2022-08-29

    Abstract: Disclosed are an optoelectronic device and a preparation method thereof. The optoelectronic device includes a first semiconductor layer, an active layer, and a second semiconductor layer stacked in sequence. The conductivity type of the first semiconductor layer is opposite to that of the second semiconductor layer, and the second semiconductor layer is provided with a layer of nano-diamond structure, and the nano-diamond structure has the same conductivity type as the second semiconductor layer. The method for preparing the optoelectronic device is used to make the optoelectronic device. In the present application, by providing a layer of nano-diamond structure in the second semiconductor layer, the absorption of UV light emitted by the active layer can be effectively avoided, and the beneficial effect of greatly improving the light extraction efficiency of the UV LED can be achieved.

    SCHOTTKY DIODE AND MANUFACTURING METHOD THEREFOR

    公开(公告)号:US20220416092A1

    公开(公告)日:2022-12-29

    申请号:US17779064

    申请日:2020-10-30

    Inventor: Kai Cheng

    Abstract: Provided are a Schottky diode and a manufacturing method therefor. The Schottky diode (100) includes a nitride channel layer (1); a nitride barrier layer (2) formed on the nitride channel layer (1); a nitride cap layer (3) formed on the nitride barrier layer (2), wherein the nitride cap layer (3) includes an active region (31) and an inactive region (32); a passivation layer (4) formed on the nitride cap layer (3), where the passivation layer (4) includes a first groove penetrating through the passivation layer (4) to expose the nitride cap layer (3), and the first groove corresponds to the active region (31); a dielectric layer (5) located on the passivation layer (4) and an inner wall of the first groove, wherein the dielectric layer (5) forms a second groove, and the dielectric layer (5) includes a third groove penetrating through the dielectric layer (5) to expose a part of the active region (31) of the nitride cap layer (3); and an anode layer (6) formed in the second groove and the third groove and in contact with the active region (31).

    DIODE AND MANUFACTURING METHOD THEREFOR

    公开(公告)号:US20220406949A1

    公开(公告)日:2022-12-22

    申请号:US17779115

    申请日:2020-10-30

    Inventor: Kai Cheng

    Abstract: Provided are a diode and a manufacturing method therefor. The diode includes: a nitride channel layer; a nitride barrier layer, formed on the nitride channel layer; an oxidation forming layer, wherein a part of the oxidation forming layer is positioned in the nitride barrier layer, and a surface of the oxidation forming layer away from the nitride channel layer is flush with a surface of the nitride barrier layer away from the nitride channel layer; a passivation layer, formed on the nitride barrier layer, wherein the passivation layer includes a first groove penetrating through the passivation layer to expose the oxidation forming layer and a part of the nitride barrier layer; and a first electrode, formed in the first groove, wherein the first electrode is in contact with the nitride barrier layer and the oxidation forming layer.

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