公开(公告)号：US5872960A

公开(公告)日：1999-02-16

申请号：US624879

申请日：1996-03-27

申请人： Oved Oz ,  Gideon Intrater ,  Yachin Afek

发明人： Oved Oz ,  Gideon Intrater ,  Yachin Afek

IPC分类号： G06F9/32 ,  G06F9/38 ,  G06F11/36 ,  G06F13/24 ,  G06F15/78 ,  H04L27/38 ,  G06F1/04

CPC分类号： G06F11/3648 ,  G06F11/3656 ,  G06F11/3664 ,  G06F13/24 ,  G06F15/7842 ,  G06F9/30167 ,  G06F9/32 ,  G06F9/3879 ,  H04L27/38

摘要： An integrated data processing system includes a shared internal bus for transferring both instructions and data. A shared bus interface unit is connected to the shared internal bus and connectable via a shared external bus to a shared external memory array such that instructions and data held in the shared external memory array are transferrable to the shared internal bus via the shared bus interface unit. A general purpose (GP) central processing unit (CPU) is connected to the shared internal bus for retrieving GP instructions. The GP CPU includes an execution unit for executing GP instructions to process data retrieved by the GP CPU from the shared internal bus. A digital signal processor (DSP) module connected to the shared internal bus, the DSP module includes a signal processor for processing an externally-provided digital signal received by the DSP module by executing DSP command-list instructions. Execution of DSP command-list code instructions by the DSP module is independent of and in parallel with execution of GP instructions by the GP CPU. A shared internal memory that holds command-list code instructions and is connected for access by the DSP module for retrieval of command-list code instructions for execution by the DSP module and for access by the GP CPU for storage and retrieval of instructions and data.

摘要翻译： 集成数据处理系统包括用于传送指令和数据的共享内部总线。 共享总线接口单元连接到共享内部总线，并通过共享外部总线连接到共享外部存储器阵列，使得保存在共享外部存储器阵列中的指令和数据可经由共享总线接口单元传送到共享内部总线 。 通用（GP）中央处理单元（CPU）连接到共享内部总线，用于检索GP指令。 GP CPU包括一个执行单元，用于执行GP指令以处理由GP CPU从共享内部总线检索的数据。 连接到共享内部总线的数字信号处理器（DSP）模块，DSP模块包括用于通过执行DSP命令列表指令来处理由DSP模块接收的外部提供的数字信号的信号处理器。 DSP模块执行DSP命令列表代码指令与GP CPU执行GP指令无关，并行执行GP指令。 共享的内部存储器，其保存命令列表代码指令，并且被连接以供DSP模块访问，用于检索由DSP模块执行的命令列表代码指令，并由GP CPU访问用于存储和检索指令和数据。

公开(公告)号：US5638306A

公开(公告)日：1997-06-10

申请号：US583538

申请日：1996-01-05

申请人： Gideon Intrater ,  Oved Oz ,  Alberto Sandbank

发明人： Gideon Intrater ,  Oved Oz ,  Alberto Sandbank

IPC分类号： G06F9/32 ,  G06F9/38 ,  G06F11/36 ,  G06F13/24 ,  G06F15/78 ,  H04L27/38 ,  G06F11/00

CPC分类号： G06F11/3648 ,  G06F11/3656 ,  G06F11/3664 ,  G06F13/24 ,  G06F15/7842 ,  G06F9/30167 ,  G06F9/32 ,  G06F9/3879 ,  H04L27/38

摘要： The present invention is directed to various features of an integrated data processing system that includes a general purpose (GP) CPU core for processing data in accordance with a GP instruction set and a digital signal processor (DSP) module for processing data in accordance with command-list code. The DSP module is operable to execute the command-list code independent of and in parallel with execution of the GP instruction set by the CPU core. The system also includes test hook functions for facilitating production testing of the system.

摘要翻译： 本发明涉及集成数据处理系统的各种特征，其包括用于根据GP指令集处理数据的通用（GP）CPU核和用于根据命令处理数据的数字信号处理器（DSP）模块 列表代码 DSP模块可操作以独立于执行由CPU核心的GP指令集执行的命令列表代码。 该系统还包括用于促进系统的生产测试的测试钩功能。

公开(公告)号：US5613149A

公开(公告)日：1997-03-18

申请号：US546187

申请日：1995-10-20

申请人： Yachin Afek ,  Oved Oz ,  Gideon Intrater

发明人： Yachin Afek ,  Oved Oz ,  Gideon Intrater

IPC分类号： G06F9/32 ,  G06F9/38 ,  G06F11/36 ,  G06F13/24 ,  G06F15/78 ,  H04L27/38 ,  G06F11/00 ,  G06F15/16

CPC分类号： G06F11/3648 ,  G06F11/3656 ,  G06F11/3664 ,  G06F13/24 ,  G06F15/7842 ,  G06F9/30167 ,  G06F9/32 ,  G06F9/3879 ,  H04L27/38

摘要： An integrated circuit structure for use in identifying a value of an analog signal includes a central processing unit that executes instructions to perform data processing operations. The data processing operations include a successive approximation analog-to-dialog conversion operation to provide a digital value based upon an input data signal. A pulse with modulation (PWM) element converts the digital value to a square-wave output signal having a duty cycle corresponding to the digital value. A PWM element is adapted for connection to a low pass filter such that the square-wave output signal is provided as an input to the low pass filter. The low pass filter provides an output analog signal corresponding to the duty cycle of the square-wave output signal. An input port is adapted for connection to an output of a comparator. The comparator receives as inputs the output analog signal the low pass filter and the analog signal. The input port is connected to provide the output of the comparator as the input data signal to the central processing unit.

摘要翻译： 用于识别模拟信号的值的集成电路结构包括执行指令以执行数据处理操作的中央处理单元。 数据处理操作包括逐次近似模拟对话转换操作，以基于输入数据信号提供数字值。 具有调制（PWM）元件的脉冲将数字值转换成具有对应于数字值的占空比的方波输出信号。 PWM元件适于连接到低通滤波器，使得方波输出信号被提供为低通滤波器的输入。 低通滤波器提供与方波输出信号的占空比对应的输出模拟信号。 输入端口适于连接到比较器的输出。 比较器接收低通滤波器和模拟信号的输出模拟信号作为输入。 连接输入端口，将比较器的输出作为输入数据信号提供给中央处理单元。

公开(公告)号：US5491828A

公开(公告)日：1996-02-13

申请号：US307399

申请日：1994-09-16

申请人： Gideon Intrater ,  Oved Oz ,  Yachin Afek

发明人： Gideon Intrater ,  Oved Oz ,  Yachin Afek

IPC分类号： G06F9/32 ,  G06F9/38 ,  G06F11/36 ,  G06F13/24 ,  G06F15/78 ,  H04L27/38 ,  G06F11/00 ,  G06F15/16

CPC分类号： G06F11/3648 ,  G06F11/3656 ,  G06F11/3664 ,  G06F13/24 ,  G06F15/7842 ,  G06F9/30167 ,  G06F9/32 ,  G06F9/3879 ,  H04L27/38

摘要： An integrated data processing system includes a shared internal bus for transferring both instructions and data. A shared bus interface unit is connected to the shared internal bus and connectable via a shared external bus to a shared external memory array such that instructions and data held in the shared external memory array are transferrable to the shared internal bus via the shared bus interface unit. A general purpose (GP) central processing unit (CPU) is connected to the shared internal bus for retrieving GP instructions. The GP CPU includes an execution unit for executing GP instructions to process data retrieved by the GP CPU from the shared internal bus. A digital signal processor (DSP) module connected to the shared internal bus, the DSP module includes a signal processor for processing an externally-provided digital signal received by the DSP module by executing DSP command-list instructions. Execution of DSP command-list code instructions by the DSP module is independent of and in parallel with execution of GP instructions by the GP CPU. A shared internal memory that holds command-list code instructions and is connected for access by the DSP module for retrieval of command-list code instructions for execution by the DSP module and for access by the GP CPU for storage and retrieval of instructions and data.

摘要翻译： 集成数据处理系统包括用于传送指令和数据的共享内部总线。 共享总线接口单元连接到共享内部总线，并通过共享外部总线连接到共享外部存储器阵列，使得保存在共享外部存储器阵列中的指令和数据可经由共享总线接口单元传送到共享内部总线 。 通用（GP）中央处理单元（CPU）连接到共享内部总线，用于检索GP指令。 GP CPU包括一个执行单元，用于执行GP指令以处理由GP CPU从共享内部总线检索的数据。 连接到共享内部总线的数字信号处理器（DSP）模块，DSP模块包括用于通过执行DSP命令列表指令来处理由DSP模块接收的外部提供的数字信号的信号处理器。 DSP模块执行DSP命令列表代码指令与GP CPU执行GP指令无关，并行执行GP指令。 共享的内部存储器，其保存命令列表代码指令，并且被连接以供DSP模块访问，用于检索由DSP模块执行的命令列表代码指令，并由GP CPU访问用于存储和检索指令和数据。