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    Gate driving circuit and display device having the gate driving circuit
    21.
    发明授权
    Gate driving circuit and display device having the gate driving circuit 有权
    栅极驱动电路和具有栅极驱动电路的显示装置

    公开(公告)号：US08243058B2

    公开(公告)日：2012-08-14

    申请号：US12616604

    申请日：2009-11-11

    Applicant: Jae-Hoon Lee ,  Jun-Yong Song ,  Hoi-Sik Moon ,  Yong-Soon Lee

    Inventor： Jae-Hoon Lee ,  Jun-Yong Song ,  Hoi-Sik Moon ,  Yong-Soon Lee

    IPC: G06F3/038

    CPC classification number: G09G3/3677 ,  G09G2310/0286 ,  G11C19/184 ,  G11C19/28

    Abstract: A gate driving circuit includes a plurality of stages connected to each other. An m-th stage (‘m’ is a natural number) of the stages includes a pull-up part, a pull-down part, a first holding part and a second holding part. The pull-up part outputs a high voltage of a clock signal as a high voltage of an m-th gate signal in response to a high voltage applied to a first output control part. The pull-down part pulls down the high voltage of the m-th gate signal to a first low voltage in response to a high voltage of an (m+1)-th gate signal. The first holding part holds a voltage applied to the first output control part as a second low voltage having a level lower than the first low voltage. The second holding part holds a low voltage of the m-th gate signal to the first low voltage.

    Abstract translation: 栅极驱动电路包括彼此连接的多个级。 第m级（“m”是自然数）级包括上拉部分，下拉部分，第一保持部分和第二保持部分。 响应于施加到第一输出控制部分的高电压，上拉部分输出作为第m门信号的高电压的时钟信号的高电压。 下拉部分响应于第（m + 1）门信号的高电压将第m门信号的高电压下拉到第一低电压。 第一保持部分将施加到第一输出控制部分的电压保持为具有低于第一低电压电平的第二低电压。 第二保持部将第m栅极信号的低电压保持为第一低电压。

    AUDIO/VIDEO DEVICE HAVING A VOLUME CONTROL FUNCTION FOR AN EXTERNAL AUDIO REPRODUCTION UNIT BY USING VOLUME CONTROL BUTTONS OF A REMOTE CONTROLLER AND VOLUME CONTROL METHOD THEREFOR
    23.
    发明申请
    AUDIO/VIDEO DEVICE HAVING A VOLUME CONTROL FUNCTION FOR AN EXTERNAL AUDIO REPRODUCTION UNIT BY USING VOLUME CONTROL BUTTONS OF A REMOTE CONTROLLER AND VOLUME CONTROL METHOD THEREFOR 有权

    公开(公告)号：US20120162520A1

    公开(公告)日：2012-06-28

    申请号：US13411339

    申请日：2012-03-02

    Applicant: Jae-hoon Lee

    Inventor： Jae-hoon Lee

    IPC: H04N5/60 ,  H04N5/50

    CPC classification number: H04R5/02 ,  H04R5/04

    Abstract: An audio/video (A/V) device having a volume control function for external audio reproduction units by using volume control buttons of a remote controller is provided. The A/V device includes speakers, an audio output port for externally outputting an audio signal, an audio signal processing unit for reproducing and amplifying the audio signal and applying the amplified audio signal to the speakers or the audio output port, a memory unit for storing volume control values, and a control unit for applying to the audio signal processing unit any of the volume control values stored in the memory based on whether the external audio reproduction unit is plugged in the audio output port. The control unit controls the audio signal processing unit to adjust the volume control values for the audio output port by the volume control buttons when the external audio reproduction unit is plugged in the audio output port.

    GATE DRIVE CIRCUIT AND DISPLAY APPARATUS HAVING THE SAME
    24.
    发明申请
    GATE DRIVE CIRCUIT AND DISPLAY APPARATUS HAVING THE SAME 有权
    门控驱动电路和显示装置

    公开(公告)号：US20120162187A1

    公开(公告)日：2012-06-28

    申请号：US13274939

    申请日：2011-10-17

    Applicant: Jae-Hoon LEE ,  Chang-Ho LEE ,  Jun-Yong SONG ,  Yu-Han BAE

    Inventor： Jae-Hoon LEE ,  Chang-Ho LEE ,  Jun-Yong SONG ,  Yu-Han BAE

    IPC: G09G5/00 ,  H03B1/00

    CPC classification number: G09G3/007 ,  G09G3/29 ,  G09G2300/0838 ,  G09G2300/0871 ,  G09G2310/0286 ,  G09G2310/0289

    Abstract: A gate drive circuit includes a plurality of driving stages. An n-th (‘n’ is a natural number) driving stage includes a pull-up part, a carry part, a first pull-down part, a first pull-up/down control part and a second pull-up/down control part. The first pull-up/down control part applies a first power signal of an ON voltage to a control terminal of the pull-up part in a forward direction mode, and applies the first power signal of a second OFF voltage to a control terminal of the pull-up part in a reverse direction mode. The second pull-up/down control part applies a second power signal of the second OFF voltage to the control terminal of the pull-up part in the forward direction mode, and applies the second power signal of the ON voltage to the control terminal of the pull-up part in the reverse direction mode.

    Abstract translation: 栅极驱动电路包括多个驱动级。 第n（'n'是自然数）驱动级包括上拉部分，进位部分，第一下拉部分，第一上拉/下拉控制部分和第二上拉/下拉 控制部分。 第一上拉/下拉控制部分向前向模式向上拉部分的控制端施加导通电压的第一电源信号，并将第二OFF电压的第一电源信号施加到 上拉部分处于反向模式。 第二上拉/下拉控制部分将第二OFF电压的第二功率信号以正向模式施加到上拉部分的控制端，并将接通电压的第二功率信号施加到 上拉部分处于反向模式。

    GATE DRIVE CIRCUIT, DISPLAY SUBSTRATE HAVING THE SAME AND METHOD OF MANUFACTURING THE DISPLAY SUBSTRATE
    25.
    发明申请
    GATE DRIVE CIRCUIT, DISPLAY SUBSTRATE HAVING THE SAME AND METHOD OF MANUFACTURING THE DISPLAY SUBSTRATE 有权
    栅极驱动电路，具有该栅极的显示基板和制造显示基板的方法

    公开(公告)号：US20120161820A1

    公开(公告)日：2012-06-28

    申请号：US13288893

    申请日：2011-11-03

    Applicant: Bon-Yong Koo ,  Sung-Man Kim ,  Jae-Hoon Lee

    Inventor： Bon-Yong Koo ,  Sung-Man Kim ,  Jae-Hoon Lee

    IPC: H03K3/00 ,  H01L33/08

    CPC classification number: H01L27/1259 ,  G09G3/3611 ,  H01L27/1255 ,  H01L29/41733

    Abstract: A gate drive circuit includes plural stages connected together one after each other. Each of the plural stages includes a circuit transistor, a capacitor part, a first connection part and a second connection part. The circuit transistor outputs the gate signal through a source electrode in response to a control signal applied through a gate electrode. The capacitor part includes a first electrode, a second electrode formed on the first electrode, and a third electrode formed on the second electrode. The first connection part electrically connects the gate electrode of the circuit transistor and the second electrode of the capacitor part. The second connection part electrically connects the source electrode of the circuit transistor and the first electrode of the capacitor part. Thus, an integrated size of a gate drive circuit may be decreased, and a reliability of a gate drive circuit may be enhanced.

    Abstract translation: 栅极驱动电路包括一个接一个地连接在一起的多个级。 多级中的每一个包括电路晶体管，电容器部分，第一连接部分和第二连接部分。 响应于通过栅电极施加的控制信号，电路晶体管通过源电极输出栅极信号。 电容器部分包括第一电极，形成在第一电极上的第二电极和形成在第二电极上的第三电极。 第一连接部电连接电路晶体管的栅电极和电容器部的第二电极。 第二连接部分电连接电路晶体管的源电极和电容器部分的第一电极。 因此，可以减小栅极驱动电路的集成尺寸，并且可以提高栅极驱动电路的可靠性。

    GATE DRIVE CIRCUIT AND METHOD OF DRIVING THE SAME
    29.
    发明申请
    GATE DRIVE CIRCUIT AND METHOD OF DRIVING THE SAME 有权
    门驱动电路及其驱动方法

    公开(公告)号：US20100277206A1

    公开(公告)日：2010-11-04

    申请号：US12764433

    申请日：2010-04-21

    Applicant: Jae-Hoon LEE ,  Seung-Hwan MOON

    Inventor： Jae-Hoon LEE ,  Seung-Hwan MOON

    IPC: H03K3/00

    CPC classification number: G09G3/3677 ,  G09G2310/0286 ,  G11C19/184 ,  G11C19/28

    Abstract: In a gate drive circuit including stages which are cascaded and which output gate signals each of the stages includes a first node, an output part, a first holding part and a second holding part. A voltage of the first node is converted to a high voltage in response to one of a vertical start signal and a carry signal of one of previous stages. The output part outputs a first clock signal as a gate signal through an output terminal in response to the high voltage of the first node. The first holding part applies a first low voltage to the output terminal, in response to a gate signal output from at least one of following stages. The second holding part applies a second low voltage, which is less than the first low voltage, to the first node in response to a gate signal output from at least one stage among following stages.

    Abstract translation: 在包括级联的级的栅极驱动电路和每个级的输出门信号包括第一节点，输出部分，第一保持部分和第二保持部分。 响应于先前级之一的垂直起始信号和进位信号之一，第一节点的电压被转换成高电压。 输出部分响应于第一节点的高电压，通过输出端子输出第一时钟信号作为门信号。 响应于从至少一个后续级输出的门信号，第一保持部分向输出端施加第一低电压。 第二保持部分响应于从后续阶段中的至少一个级输出的门信号，向第一节点施加小于第一低电压的第二低电压。

    Reliability evaluation circuit and reliability evaluation system
    30.
    发明申请
    Reliability evaluation circuit and reliability evaluation system 有权
    可靠性评估电路和可靠性评估系统

    公开(公告)号：US20100231227A1

    公开(公告)日：2010-09-16

    申请号：US12659444

    申请日：2010-03-09

    Applicant: Sang-jin Kwon ,  Jae-hoon Lee ,  Yong-ha Kang ,  Jong-won Lee

    Inventor： Sang-jin Kwon ,  Jae-hoon Lee ,  Yong-ha Kang ,  Jong-won Lee

    IPC: G01R31/30

    CPC classification number: G01R31/3004

    Abstract: A reliability evaluation system comprises a reliability evaluation circuit and a reliability evaluation control circuit. The reliability evaluation circuit includes a stress device array and a stress voltage generating block configured to receive a control voltage, generate stress voltages generated by using two reference voltages, and apply the stress voltages to the unit devices in a stress mode via first I/O lines according to the control voltage. The stress device array includes the unit devices that are matrix-arrayed. Each of the unit devices has a first terminal connected to one of the first I/O lines and a second terminal connected to one of second I/O lines. The reliability evaluation control circuit is configured to generate the control voltage and the two reference voltages, and test reliability of the unit devices by using the first I/O lines and the second I/O lines.

    Abstract translation: 可靠性评估系统包括可靠性评估电路和可靠性评估控制电路。 可靠性评估电路包括应力器件阵列和应力电压产生块，其被配置为接收控制电压，产生通过使用两个参考电压产生的应力电压，并且通过第一I / O将应力电压施加到应力模式中的单位器件 线根据控制电压。 应力装置阵列包括矩阵排列的单位装置。 每个单元设备具有连接到第一I / O线之一的第一端子和连接到第二I / O线之一的第二端子。 可靠性评估控制电路被配置为通过使用第一I / O线和第二I / O线来产生控制电压和两个参考电压以及单元器件的测试可靠性。

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