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    Gate driving circuit and display device having the gate driving circuit
    1.
    发明授权
    Gate driving circuit and display device having the gate driving circuit 有权
    栅极驱动电路和具有栅极驱动电路的显示装置

    公开(公告)号：US08243058B2

    公开(公告)日：2012-08-14

    申请号：US12616604

    申请日：2009-11-11

    申请人： Jae-Hoon Lee ,  Jun-Yong Song ,  Hoi-Sik Moon ,  Yong-Soon Lee

    发明人： Jae-Hoon Lee ,  Jun-Yong Song ,  Hoi-Sik Moon ,  Yong-Soon Lee

    IPC分类号： G06F3/038

    CPC分类号： G09G3/3677 ,  G09G2310/0286 ,  G11C19/184 ,  G11C19/28

    摘要： A gate driving circuit includes a plurality of stages connected to each other. An m-th stage (‘m’ is a natural number) of the stages includes a pull-up part, a pull-down part, a first holding part and a second holding part. The pull-up part outputs a high voltage of a clock signal as a high voltage of an m-th gate signal in response to a high voltage applied to a first output control part. The pull-down part pulls down the high voltage of the m-th gate signal to a first low voltage in response to a high voltage of an (m+1)-th gate signal. The first holding part holds a voltage applied to the first output control part as a second low voltage having a level lower than the first low voltage. The second holding part holds a low voltage of the m-th gate signal to the first low voltage.

    摘要翻译： 栅极驱动电路包括彼此连接的多个级。 第m级（“m”是自然数）级包括上拉部分，下拉部分，第一保持部分和第二保持部分。 响应于施加到第一输出控制部分的高电压，上拉部分输出作为第m门信号的高电压的时钟信号的高电压。 下拉部分响应于第（m + 1）门信号的高电压将第m门信号的高电压下拉到第一低电压。 第一保持部分将施加到第一输出控制部分的电压保持为具有低于第一低电压电平的第二低电压。 第二保持部将第m栅极信号的低电压保持为第一低电压。

    Gate Driving Circuit and Display Device Having the Gate Driving Circuit
    2.
    发明申请
    Gate Driving Circuit and Display Device Having the Gate Driving Circuit 有权
    具有栅极驱动电路的栅极驱动电路和显示装置

    公开(公告)号：US20100207928A1

    公开(公告)日：2010-08-19

    申请号：US12616604

    申请日：2009-11-11

    申请人： Jae-Hoon Lee ,  Jun-Yong Song ,  Hoi-Sik Moon ,  Yong-Soon Lee

    发明人： Jae-Hoon Lee ,  Jun-Yong Song ,  Hoi-Sik Moon ,  Yong-Soon Lee

    IPC分类号： G09G5/00

    CPC分类号： G09G3/3677 ,  G09G2310/0286 ,  G11C19/184 ,  G11C19/28

    摘要： A gate driving circuit includes a plurality of stages connected to each other. An m-th stage (‘m’ is a natural number) of the stages includes a pull-up part, a pull-down part, a first holding part and a second holding part. The pull-up part outputs a high voltage of a clock signal as a high voltage of an m-th gate signal in response to a high voltage applied to a first output control part. The pull-down part pulls down the high voltage of the m-th gate signal to a first low voltage in response to a high voltage of an (m+1)-th gate signal. The first holding part holds a voltage applied to the first output control part as a second low voltage having a level lower than the first low voltage. The second holding part holds a low voltage of the m-th gate signal to the first low voltage.

    摘要翻译： 栅极驱动电路包括彼此连接的多个级。 第m级（“m”是自然数）级包括上拉部分，下拉部分，第一保持部分和第二保持部分。 响应于施加到第一输出控制部分的高电压，上拉部分输出作为第m门信号的高电压的时钟信号的高电压。 下拉部分响应于第（m + 1）门信号的高电压将第m门信号的高电压下拉到第一低电压。 第一保持部分将施加到第一输出控制部分的电压保持为具有低于第一低电压电平的第二低电压。 第二保持部将第m栅极信号的低电压保持为第一低电压。

    Display device and method of manufacturing the same
    5.
    发明授权
    Display device and method of manufacturing the same 有权
    显示装置及其制造方法

    公开(公告)号：US08629827B2

    公开(公告)日：2014-01-14

    申请号：US12762470

    申请日：2010-04-19

    申请人： Jae-Hoon Lee ,  Yong-Soon Lee ,  Young-Su Kim ,  Yu-Han Bae

    发明人： Jae-Hoon Lee ,  Yong-Soon Lee ,  Young-Su Kim ,  Yu-Han Bae

    IPC分类号： G06F3/038 ,  H01J9/00

    CPC分类号： G09G3/3614 ,  G09G3/3607 ,  G09G2300/0426 ,  G09G2320/0209

    摘要： A display device includes a display panel, a data driving part and a gate driving part. The display panel includes a first pixel row. The first pixel row includes a first pixel connected to an (n+1)-th gate line and an (m+1)-th data line (where ‘n’ and ‘m’ are natural numbers), and a second pixel connected to an n-th gate line and an (m+2)-th data line. The data driving part applies a data voltage having a first polarity with respect to a reference voltage to the (m+1)-th data line, and applies a data voltage having a second polarity with respect to the reference voltage to the (m+2)-th data line. The gate driving part sequentially applies a gate signal to the n-th gate line and the (n+1)-th gate line.

    摘要翻译： 显示装置包括显示面板，数据驱动部和门驱动部。 显示面板包括第一像素行。 第一像素行包括连接到第（n + 1）栅极线和第（m + 1）数据线（其中'n'和'm'是自然数）的第一像素，并且第二像素连接 到第n个栅极线和第（m + 2）个数据线。 数据驱动部分对第（m + 1）数据线施加相对于参考电压具有第一极性的数据电压，并将相对于参考电压具有第二极性的数据电压施加到第（m + 2）数据线。 栅极驱动部分顺序地对第n条栅极线和第（n + 1）栅极线施加栅极信号。

    Display panel and display apparatus having the same
    6.
    发明授权
    Display panel and display apparatus having the same 有权
    显示面板和具有该显示面板的显示装置

    公开(公告)号：US08963818B2

    公开(公告)日：2015-02-24

    申请号：US13212782

    申请日：2011-08-18

    申请人： Chang-Sin Kim ,  Byeong-Doo Kang ,  Yong-Soon Lee ,  Ock-Jin Kim ,  Sang-Gon Lee

    发明人： Chang-Sin Kim ,  Byeong-Doo Kang ,  Yong-Soon Lee ,  Ock-Jin Kim ,  Sang-Gon Lee

    IPC分类号： G09G3/36 ,  G02F1/1343

    CPC分类号： G09G3/3688 ,  G09G3/3648 ,  G09G2300/0413 ,  G09G2310/0232

    摘要： A display panel includes a plurality of data lines, a plurality of gate lines, a plurality of dummy loads, a pad portion and a fanout portion. The data lines are disposed in a display area, on which a plurality of pixels are disposed. The gate lines are disposed in the display area and cross the data lines. The dummy loads are disposed in a peripheral area surrounding the display area. The pad portion is disposed in the peripheral area and includes signal pads and dummy pads. The fanout portion includes a first fanout line portion connecting the data lines to the signal pads, and a second fanout line portion connecting the dummy loads to the dummy pads.

    摘要翻译： 显示面板包括多条数据线，多条栅极线，多个虚拟负载，焊盘部分和扇出部分。 数据线设置在其上设置有多个像素的显示区域中。 栅极线设置在显示区域中并与数据线交叉。 虚拟负载设置在显示区域周围的周边区域中。 焊盘部分设置在周边区域中，并且包括信号焊盘和虚拟焊盘。 扇出部分包括将数据线连接到信号焊盘的第一扇出线部分和将虚拟负载连接到虚拟焊盘的第二扇出线部分。

    Drive voltage generating circuit and liquid crystal display including the same
    7.
    发明授权
    Drive voltage generating circuit and liquid crystal display including the same 有权
    驱动电压发生电路和包括其的液晶显示器

    公开(公告)号：US08730146B2

    公开(公告)日：2014-05-20

    申请号：US12539032

    申请日：2009-08-11

    申请人： Yong-Soon Lee

    发明人： Yong-Soon Lee

    IPC分类号： G09G3/36

    CPC分类号： G09G3/3696 ,  G09G2330/02

    摘要： A drive voltage generating circuit which has a first shifter receiving an input voltage and outputting a first drive voltage obtained by first shifting a voltage level of the input voltage; a second shifter receiving outputting the second drive voltage obtained by second shifting a voltage level of the first drive voltage; and a drive voltage controller adjusting one of a shifting amount of the first shifter and a shifting amount of the second shifter in accordance with a surrounding temperature, wherein the second drive voltage is continuously varied in an analog manner, in accordance with the surrounding temperature.

    摘要翻译： 驱动电压产生电路，其具有接收输入电压的第一移位器，并输出通过首先移位输入电压的电压电平而获得的第一驱动电压; 接收第二移位器，接收输出通过第二移位第一驱动电压的电压电平而获得的第二驱动电压; 以及驱动电压控制器，其根据周围温度调整第一移位器的移位量和移位量中的一个，其中第二驱动电压根据周围温度以模拟方式连续变化。

    Display panel and display apparatus having the same
    8.
    发明授权
    Display panel and display apparatus having the same 有权
    显示面板和具有该显示面板的显示装置

    公开(公告)号：US08558776B2

    公开(公告)日：2013-10-15

    申请号：US11999329

    申请日：2007-12-04

    申请人： Min-Cheol Lee ,  Hee-Bum Park ,  Yong-Soon Lee ,  Seung-Soo Baek ,  Sang-Jin Jeon

    发明人： Min-Cheol Lee ,  Hee-Bum Park ,  Yong-Soon Lee ,  Seung-Soo Baek ,  Sang-Jin Jeon

    IPC分类号： G09G3/36

    CPC分类号： G09G3/3611 ,  G09G3/3677 ,  G09G2320/0223

    摘要： In a display panel and a display apparatus having the display panel, the display panel includes array and opposite substrates. The array substrate includes display and peripheral areas. Gate and source lines are formed in the display area. A gate driving part and first and second clock lines are formed in the peripheral area. The gate driving part outputs gate signals to the gate line. The first and second clock lines respectively transmit first and second clock signals to the gate driving part. The opposite substrate is combined with the array substrate and includes a common electrode layer. The common electrode layer has an opening portion patterned to expose the first and second clock lines. The exposed portions of the first and second clock lines have substantially the same area. Thus, delays of the gate signals may be minimized and distortion of the gate signals may be prevented.

    摘要翻译： 在具有显示面板的显示面板和显示装置中，显示面板包括阵列和相对的基板。 阵列基板包括显示器和外围区域。 栅极和源极线形成在显示区域中。 在周边区域中形成栅极驱动部分和第一和第二时钟线。 栅极驱动部分将栅极信号输出到栅极线。 第一和第二时钟线分别将第一和第二时钟信号发送到门驱动部分。 相对的衬底与阵列衬底组合并且包括公共电极层。 公共电极层具有图案化以暴露第一和第二时钟线的开口部分。 第一和第二时钟线的暴露部分具有基本上相同的面积。 因此，可以使门信号的延迟最小化并且可以防止门信号的失真。

    Thin film transistor array panel and display device including the same
    10.
    发明授权
    Thin film transistor array panel and display device including the same 有权
    薄膜晶体管阵列面板和显示装置包括它们

    公开(公告)号：US07692617B2

    公开(公告)日：2010-04-06

    申请号：US11111093

    申请日：2005-04-20

    申请人： Dong-Gyu Kim ,  Seung-Hwan Moon ,  Yong-Soon Lee ,  Nam-Soo Kang ,  Haeng-Won Park

    发明人： Dong-Gyu Kim ,  Seung-Hwan Moon ,  Yong-Soon Lee ,  Nam-Soo Kang ,  Haeng-Won Park

    IPC分类号： G09G3/36

    CPC分类号： G02F1/13454 ,  G02F1/1339 ,  G02F1/1345 ,  G02F1/136286 ,  G02F2001/13629 ,  H01L27/1222 ,  H01L27/124 ,  H01L27/1255 ,  H01L29/78669 ,  H01L29/78678

    摘要： Gate-driving circuitry of a thin film transistor array panel is formed on the same plane as a display area of the transistor array panel. The gate-driving circuitry includes driving circuitry and signal lines having apertures. Thus, a sufficient amount of light, even though illuminated from the thin film transistor array panel side, can reach a photosetting sealant overlapping at least in part the gate-driving circuitry. The thin film transistor array panel and the counter panel are put together air-tight and moisture-tight. Consequently, the gate-driving circuitry can avoid corrosion by moisture introduced from outside. Gate-driving circuitry malfunctions can also be reduced.

    摘要翻译： 薄膜晶体管阵列面板的栅极驱动电路形成在与晶体管阵列面板的显示区域相同的平面上。 栅极驱动电路包括具有孔径的驱动电路和信号线。 因此，尽管从薄膜晶体管阵列面板侧照明，足够量的光可以到达与栅极驱动电路至少部分重叠的光固化密封剂。 将薄膜晶体管阵列面板和对面板放在一起，气密和防潮。 因此，栅极驱动电路可以避免从外部引入的湿气的腐蚀。 栅极驱动电路故障也可以减少。