公开(公告)号：US20070001974A1

公开(公告)日：2007-01-04

申请号：US11270665

申请日：2005-11-10

申请人： Takashi Kumagai ,  Hisanobu Ishiyama ,  Kazuhiro Maekawa ,  Satoru Ito ,  Takashi Fujise ,  Junichi Karasawa ,  Satoru Kodaira ,  Katsuhiko Maki

发明人： Takashi Kumagai ,  Hisanobu Ishiyama ,  Kazuhiro Maekawa ,  Satoru Ito ,  Takashi Fujise ,  Junichi Karasawa ,  Satoru Kodaira ,  Katsuhiko Maki

IPC分类号： G09G3/36

CPC分类号： G09G3/20 ,  G09G3/3688 ,  G09G2300/0426 ,  G09G2310/0267 ,  G09G2310/027 ,  G09G2310/0278 ,  G09G2310/08 ,  G09G2320/0276 ,  G09G2320/0673 ,  G09G2330/028

摘要： An integrated circuit device includes: first to Nth circuit blocks CB1 to CBN disposed along a first direction D1, when the direction D1 is a direction from a first side of the integrated circuit device toward a third side which is opposite to the first side, the first side being a short side, and when a second direction D2 is a direction from a second side of the integrated circuit device toward a fourth side which is opposite to the second side, the second side being a long side. The first to Nth circuit blocks CB1 to CBN includes a logic circuit block LB which sets grayscale characteristic adjustment data; and a grayscale voltage generation circuit block GB which generates grayscale voltages based on the set adjustment data. The logic circuit block LB and the grayscale voltage generation circuit block GB are disposed adjacent to each other along the direction D1.

摘要翻译： 集成电路装置包括：当方向D 1是从集成电路装置的第一侧朝向与第一方向相反的第三侧的方向时，沿着第一方向D 1布置的第一至第N电路块CB 1至CBN 所述第一侧为短边，当第二方向D 2为从所述集成电路器件的第二侧朝向与所述第二侧相反的第四侧的方向时，所述第二侧为长边。 第一至第N电路块CB 1至CBN包括设置灰度特性调整数据的逻辑电路块LB; 以及基于设定的调整数据生成灰度电压的灰度级电压发生电路块GB。 逻辑电路块LB和灰度级电压产生电路块GB沿着方向D1彼此相邻设置。

公开(公告)号：US07151520B2

公开(公告)日：2006-12-19

申请号：US10342109

申请日：2003-01-13

申请人： Katsuhiko Maki

发明人： Katsuhiko Maki

IPC分类号： G09G3/36

CPC分类号： G09G3/3688 ,  G09G3/3614 ,  G09G2310/027 ,  G09G2310/0297

摘要： A liquid crystal driver circuit is equipped with a memory circuit that temporarily stores inputted image data, a first selector circuit that successively selects image data of multiple channels that are read from the memory circuit and outputs the same in a time-divided manner, a digital/analog conversion circuit that converts the image data output in a time-divided manner from the first selector circuit into analog image signals, an amplification circuit that amplifies the analog image signals obtained by the digital/analog conversion circuit, and a second selector circuit that successively selects a plurality of output terminals and distributes the analog image signals amplified by the amplification circuit in a time-divided manner to the plurality of output terminals.

公开(公告)号：US20060038764A1

公开(公告)日：2006-02-23

申请号：US11171736

申请日：2005-06-30

申请人： Masami Takahashi ,  Katsuhiko Maki

发明人： Masami Takahashi ,  Katsuhiko Maki

IPC分类号： G09G3/36

CPC分类号： G09G3/3688 ,  G09G2310/027

摘要： A source driver for driving a plurality of source lines of an electro-optic device, including a plurality of impedance conversion circuits each driving a respective one of the plurality of source lines in accordance with a grayscale voltage corresponding to display data; and a plurality of power save data storing circuits each storing power save data, wherein Each of the plurality of power save data storing circuits is provided for one of each of the plurality of impedance conversion circuits and a number of impedance conversion circuits, the number corresponding to the number of dots forming a pixel, each of the plurality of impedance conversion circuits includes a voltage follower circuit for driving one of the plurality of source lines and having a smaller phase margin without a load connected to an output thereof than with a load connected to the output thereof, and, an operating current of the voltage follower circuit included in the impedance conversion circuit is one of stopped and limited in accordance with the power save data stored in the power save data storing circuit corresponding to the impedance conversion circuit.

摘要翻译： 一种用于驱动电光装置的多条源极线的源极驱动器，包括多个阻抗转换电路，每个阻抗转换电路根据对应于显示数据的灰度电压驱动多个源极线中的相应一个源极线; 以及多个省电数据存储电路，各存储节电数据，其中，为多个阻抗变换电路和多个阻抗变换电路中的每一个设置多个省电数据存储电路的各个，所述数量对应 多个阻抗转换电路中的每一个包括一个电压跟随器电路，用于驱动多个源极线之一，并且具有较小的相位裕度，而没有负载连接到其输出而不是负载连接 并且阻抗转换电路中包括的电压跟随器电路的工作电流根据存储在与阻抗转换电路相对应的省电数据存储电路中的省电数据而停止和限制。

公开(公告)号：US20060033694A1

公开(公告)日：2006-02-16

申请号：US11176773

申请日：2005-07-07

申请人： Katsuhiko Maki

发明人： Katsuhiko Maki

IPC分类号： G09G3/36

CPC分类号： G09G3/3688 ,  G09G2310/027

摘要： An impedance conversion circuit for outputting a voltage corresponding to (j+K) (j, k: positive integers) bits of gray scale data, including: an input for receiving an input voltage selected from 2j levels of voltages in accordance with high j bit(s) of the gray scale data; and an output for outputting an output voltage corresponding to low k bit(s) of the gray scale data from 2k levels of voltages obtained by changing a potential of the input voltage.

摘要翻译： 一种用于输出对应于灰度数据的（j + K）（j，k：正整数）比特的电压的阻抗转换电路，包括：用于接收从2个电平等级中选择的输入电压的输入 根据灰度数据的高j位的电压; 以及输出，用于通过改变输入电压的电位而获得的电压电平的2级电压输出与灰度级数据的低k位相对应的输出电压。

公开(公告)号：US07764278B2

公开(公告)日：2010-07-27

申请号：US11270551

申请日：2005-11-10

申请人： Takashi Kumagai ,  Hisanobu Ishiyama ,  Kazuhiro Maekawa ,  Satoru Ito ,  Takashi Fujise ,  Junichi Karasawa ,  Satoru Kodaira ,  Katsuhiko Maki

发明人： Takashi Kumagai ,  Hisanobu Ishiyama ,  Kazuhiro Maekawa ,  Satoru Ito ,  Takashi Fujise ,  Junichi Karasawa ,  Satoru Kodaira ,  Katsuhiko Maki

IPC分类号： G06F3/038 ,  G06F13/14 ,  G09G5/00 ,  G09G3/18 ,  G09G3/36

CPC分类号： G09G3/3688 ,  G09G2310/0267 ,  G09G2310/027

摘要： An integrated circuit device including first to Nth circuit blocks CB1 to CBN disposed along a first direction D1, when the first direction D1 is a direction from a first side of the integrated circuit device toward a third side which is opposite to the first side, the first side being a short side, and when a second direction D2 is a direction from a second side of the integrated circuit device toward a fourth side which is opposite to the second side, the second side being a long side. The circuit blocks CB1 to CBN include at least one memory block MB which stores image data, and at least one data driver block DB which drives data lines. The memory block MB and the data driver block DB are disposed adjacent to each other along the first direction D1.

摘要翻译： 一种集成电路装置，包括沿着第一方向D1设置的第一至第N电路块CB1至CBN，当第一方向D1是从集成电路器件的第一侧朝向与第一侧相反的第三侧的方向时， 第一侧为短边，当第二方向D2为从集成电路器件的第二侧向与第二侧相反的第四侧的方向时，第二侧为长边。 电路块CB1至CBN包括存储图像数据的至少一个存储器块MB和驱动数据线的至少一个数据驱动器块DB。 存储器块MB和数据驱动器块DB沿着第一方向D1彼此相邻地布置。

公开(公告)号：US07561478B2

公开(公告)日：2009-07-14

申请号：US11270632

申请日：2005-11-10

申请人： Takashi Kumagai ,  Hisanobu Ishiyama ,  Kazuhiro Maekawa ,  Satoru Ito ,  Takashi Fujise ,  Junichi Karasawa ,  Satoru Kodaira ,  Katsuhiko Maki

发明人： Takashi Kumagai ,  Hisanobu Ishiyama ,  Kazuhiro Maekawa ,  Satoru Ito ,  Takashi Fujise ,  Junichi Karasawa ,  Satoru Kodaira ,  Katsuhiko Maki

IPC分类号： G11C5/14

CPC分类号： G09G3/3611 ,  G09G3/3688 ,  G09G3/3696 ,  G09G2360/18

摘要： An integrated circuit device including first to Nth circuit blocks CB1 to CBN disposed along a first direction D1, when the first direction D1 is a direction from a first side of the integrated circuit device toward a third side which is opposite to the first side, the first side being a short side, and when a second direction D2 is a direction from a second side of the integrated circuit device toward a fourth side which is opposite to the second side, the second side being a long side. The circuit blocks CB1 to CBN include a logic circuit block LB, a grayscale voltage generation circuit block GB, data driver blocks DB1 to DB4, and a power supply circuit block PB. The data driver blocks DB1 to DB4 are disposed between the logic circuit block LB and the grayscale voltage generation circuit block GB, and the power supply circuit block PB.

摘要翻译： 一种集成电路装置，包括沿着第一方向D1设置的第一至第N电路块CB1至CBN，当第一方向D1是从集成电路器件的第一侧朝向与第一侧相反的第三侧的方向时， 第一侧为短边，当第二方向D2为从集成电路器件的第二侧向与第二侧相反的第四侧的方向时，第二侧为长边。 电路块CB1至CBN包括逻辑电路块LB，灰度级电压产生电路块GB，数据驱动器块DB1至DB4和电源电路块PB。 数据驱动器块DB1至DB4设置在逻辑电路块LB和灰度级电压产生电路块GB之间，以及电源电路块PB。

公开(公告)号：US20090160882A1

公开(公告)日：2009-06-25

申请号：US12339742

申请日：2008-12-19

申请人： Hiroshi KIYA ,  Chihiro SHIN ,  Haruo KAMIJO ,  Motoaki NISHIMURA ,  Katsuhiko MAKI

发明人： Hiroshi KIYA ,  Chihiro SHIN ,  Haruo KAMIJO ,  Motoaki NISHIMURA ,  Katsuhiko MAKI

IPC分类号： G09G5/10 ,  G09G5/00

CPC分类号： G09G3/3685 ,  G09G3/2007 ,  G09G3/3696 ,  G09G2300/0426 ,  G09G2300/0857 ,  G09G2310/027 ,  G09G2310/0275 ,  G09G2310/0294 ,  G09G2330/028 ,  G09G2370/08

摘要： An integrated circuit device includes first to Nth memory blocks disposed along a first direction, a power supply circuit, and a data driver disposed in a second direction with respect to the first to Nth memory blocks. The power supply circuit includes an analog reference power supply voltage output circuit that outputs an analog reference power supply voltage. The analog reference power supply voltage output circuit is disposed between an Mth memory block and an (M+1)th memory block among the first to Nth memory blocks. An analog reference power supply line is provided in an area of the data driver along the first direction,

摘要翻译： 集成电路装置包括沿着第一方向布置的第一至第N存储块，电源电路和与第一至第N存储器块相对的第二方向的数据驱动器。 电源电路包括输出模拟基准电源电压的模拟基准电源电压输出电路。 模拟基准电源电压输出电路设置在第一至第N存储块之间的第M个存储块和第（M + 1）个存储器块之间。 在数据驱动器的沿着第一方向的区域中提供模拟参考电源线，

公开(公告)号：US20090160849A1

公开(公告)日：2009-06-25

申请号：US12340025

申请日：2008-12-19

申请人： Hiroshi KIYA ,  Chihiro SHIN ,  Haruo KAMIJO ,  Motoaki NISHIMURA ,  Katsuhiko MAKI

发明人： Hiroshi KIYA ,  Chihiro SHIN ,  Haruo KAMIJO ,  Motoaki NISHIMURA ,  Katsuhiko MAKI

IPC分类号： G09G5/00

CPC分类号： G09G3/3685 ,  G09G3/2007 ,  G09G3/3696 ,  G09G2300/0426 ,  G09G2300/0857 ,  G09G2310/027 ,  G09G2310/0275 ,  G09G2310/0294 ,  G09G2330/028 ,  G09G2370/08

摘要： An integrated circuit device includes first to Nth data driver blocks that are disposed along a first direction. Each of the first to Nth data driver blocks includes first to Mth sub-driver blocks. Each of the sub-driver blocks includes a D/A conversion circuit that receives image data and D/A-converts the image data, and first to Lth data line driver circuits that are disposed along the first direction in a second direction with respect to the D/A conversion circuit and share the D/A conversion circuit.

摘要翻译： 集成电路装置包括沿第一方向设置的第一至第N数据驱动器块。 第一至第N数据驱动器块中的每一个包括第一至第M子驱动器块。 每个子驱动器块包括接收图像数据并对图像数据进行D / A转换的D / A转换电路，以及第一至第L数据线驱动器电路，其相对于第二方向沿第一方向设置在第二方向上 D / A转换电路并共享D / A转换电路。

公开(公告)号：US07522148B2

公开(公告)日：2009-04-21

申请号：US11220346

申请日：2005-09-06

申请人： Katsuhiko Maki

发明人： Katsuhiko Maki

IPC分类号： G09G3/36

CPC分类号： G09G3/3688 ,  G09G2310/0232 ,  G09G2330/021

摘要： A source driver for driving a source line included in an electro-optical device, includes: an impedance conversion circuit which drives the source line based on a grayscale voltage corresponding to display data; a first switch circuit including one end to which a non-display voltage is supplied and another end coupled to an output of the impedance conversion circuit; a power save data holding circuit provided corresponding to each impedance conversion circuit or to impedance conversion circuits corresponding to a plurality of dots making up a pixel, and for holding power save data; and a first mask circuit for masking the power save data based on a first mask control signal that varies in unit of a horizontal scan period. When power save control is performed based on an output from the first mask circuit, an operational current of the impedance conversion circuit is suspended or restricted to set an output of the impedance conversion circuit as a high impedance state and the first switch circuit is set to a conducting state. When power save control is not performed based on an output from the first mask circuit, the impedance conversion circuit drives the output of the impedance conversion circuit based on the grayscale voltage and the first switch circuit is set to a non-conducting state.

摘要翻译： 一种用于驱动包括在电光装置中的源极线的源极驱动器，包括：阻抗转换电路，其基于与显示数据相对应的灰度电压驱动源极线; 第一开关电路，包括提供非显示电压的一端和耦合到阻抗转换电路的输出的另一端; 与每个阻抗转换电路相对应地设置的电力保存数据保持电路或与构成像素的多个点相对应的阻抗变换电路，并且用于保持省电数据; 以及第一掩模电路，用于基于以水平扫描周期为单位变化的第一掩模控制信号来屏蔽功率节省数据。 当基于第一掩模电路的输出执行省电控制时，阻抗转换电路的工作电流被暂停或限制，以将阻抗转换电路的输出设置为高阻抗状态，并将第一开关电路设置为 一个进行状态。 当不基于第一掩模电路的输出执行省电控制时，阻抗转换电路基于灰度电压驱动阻抗转换电路的输出，并且将第一开关电路设置为非导通状态。

公开(公告)号：US20090096818A1

公开(公告)日：2009-04-16

申请号：US12251907

申请日：2008-10-15

申请人： Motoaki NISHIMURA ,  Chihiro SHIN ,  Haruo KAMIJO ,  Katsuhiko MAKI

发明人： Motoaki NISHIMURA ,  Chihiro SHIN ,  Haruo KAMIJO ,  Katsuhiko MAKI

IPC分类号： G06F3/038

CPC分类号： G09G3/3291 ,  G09G2310/0291 ,  G09G2310/0294

摘要： A data driver includes a D/A conversion circuit, a switch circuit, and a data line driver circuit. The switch circuit includes a first switch element provided between a first voltage output node of the D/A conversion circuit and a first input node of a grayscale generation amplifier, a second switch element that is provided between a second voltage output node of the D/A conversion circuit and the first input node and is exclusively turned ON/OFF with respect to the first switch element, a third switch element provided between the first voltage output node and a second input node, and a fourth switch element that is provided between the second voltage output node and the second input node and is exclusively turned ON/OFF with respect to the third switch element.

摘要翻译： 数据驱动器包括D / A转换电路，开关电路和数据线驱动电路。 开关电路包括设置在D / A转换电路的第一电压输出节点与灰阶发生放大器的第一输入节点之间的第一开关元件，设置在D / A转换电路的第二电压输出节点之间的第二开关元件， A转换电路和第一输入节点，并且相对于第一开关元件专门地接通/断开，设置在第一电压输出节点和第二输入节点之间的第三开关元件和设置在第一开关元件之间的第四开关元件 第二电压输出节点和第二输入节点，并且相对于第三开关元件专门地接通/断开。