中科微点-全球专利检索

  1. Login
  2. Sign Up

Search Results

50 records (took 0.046 seconds)

    Declarative Animation Timelines
    21.
    发明申请
    Declarative Animation Timelines 审中-公开
    声明性动画时间轴

    公开(公告)号：US20130132840A1

    公开(公告)日：2013-05-23

    申请号：US13036297

    申请日：2011-02-28

    Applicant: Joaquin Cruz Blas, JR. ,  Mark Anders ,  James W. Doubek ,  Joshua Hatwich

    Inventor： Joaquin Cruz Blas, JR. ,  Mark Anders ,  James W. Doubek ,  Joshua Hatwich

    IPC: G06F3/01

    CPC classification number: G06T13/00 ,  G06T2213/08

    Abstract: Methods and systems for declarative animation timelines are disclosed. In some embodiments, a method includes generating a declarative timeline data structure, creating an animation of an image along the timeline, and adding a declarative command corresponding to the animation into the declarative data structure. The method also includes, in response to a request to render the animation, generating a run-time command corresponding to the declarative command and executing the run-time command. In other embodiments, a method includes receiving a request to render an animation, wherein the animation includes a declarative timeline data structure having a plurality of commands, parsing the plurality of commands, passing each of the parsed plurality of commands to an animation function, receiving a plurality of run-time commands in response to said passing, and causing a rendering the animation by causing an execution of the plurality of run-time commands.

    Abstract translation: 公开了用于声明性动画时间线的方法和系统。 在一些实施例中，一种方法包括生成声明性时间轴数据结构，沿时间线创建图像的动画，以及将与动画对应的声明性命令添加到声明性数据结构中。 该方法还响应于呈现动画的请求，生成与声明性命令相对应的运行时命令并执行运行时命令。 在其他实施例中，一种方法包括接收呈现动画的请求，其中动画包括具有多个命令的声明性时间轴数据结构，解析多个命令，将所解析的多个命令中的每一个传递给动画功能，接收 响应于所述通过的多个运行时命令，并且通过引起多个运行时命令的执行而导致动画呈现。

    User interfaces, methods, and systems for developing computer applications using artwork
    22.
    发明授权
    User interfaces, methods, and systems for developing computer applications using artwork 有权
    使用艺术品开发计算机应用程序的用户界面，方法和系统

    公开(公告)号：US08417728B1

    公开(公告)日：2013-04-09

    申请号：US12242052

    申请日：2008-09-30

    Applicant: Mark Anders ,  Adam Cath ,  Narciso B. Jaramillo ,  Allan Padgett

    Inventor： Mark Anders ,  Adam Cath ,  Narciso B. Jaramillo ,  Allan Padgett

    IPC: G06F7/00 ,  G06F17/30 ,  G06F12/00 ,  G06F15/16 ,  G06F3/048

    CPC classification number: G06F8/38 ,  G06F8/34 ,  G06Q10/06

    Abstract: Methods and systems for using artwork to develop computer applications in ways that preserve the artwork's appearance and layout, including by importing the artwork and selectively replacing potions with functional components. One embodiment comprises a method for developing an application that involves displaying artwork in a design view area. The method may involve displaying artwork comprising a list representation comprising a plurality of list item representations and identifying each list item representation as a group of one or more subitem representations. The method may further comprise determining a list layout for list items using the list item representations of the artwork and inserting a list as a component in the design view area. This list may determine or otherwise be used to determine the positions of either the list item representations or list items replacing the list item representations. These positions may be determined based on the list layout that was determined.

    Abstract translation: 使用艺术品开发计算机应用程序的方法和系统，以保持艺术品的外观和布局，包括通过导入艺术品并用功能组件选择性地替换药水。 一个实施例包括用于开发涉及在设计视图区域中显示艺术品的应用的方法。 该方法可以包括显示包括包括多个列表项表示的列表表示的图形，并将每个列表项表示识别为一个或多个子项表示的组。 该方法可以进一步包括使用艺术品的列表项表示来确定列表项的列表布局，并将列表作为组件插入到设计视图区域中。 该列表可以确定或以其他方式用于确定替换列表项表示的列表项表示或列表项的位置。 这些位置可以基于确定的列表布局来确定。

    Transition encoded dynamic bus circuit
    24.
    发明授权
    Transition encoded dynamic bus circuit 有权
    转换编码动态总线电路

    公开(公告)号：US07161992B2

    公开(公告)日：2007-01-09

    申请号：US10035574

    申请日：2001-10-18

    Applicant: Mark Anders ,  Ram Krishnamurthy

    Inventor： Mark Anders ,  Ram Krishnamurthy

    IPC: H03K9/00

    CPC classification number: H04L25/493 ,  H04L25/0272 ,  H04L25/028 ,  H04L25/0292 ,  H04L25/14

    Abstract: A transition encoded dynamic bus includes an encoder circuit at the input to the bus and a decoder circuit at the output to the bus. The encoder circuit generates a signal indicative of a transition at the input to the bus rather than the actual value at the input. The decoder circuit decodes the transition encoded information to track the appropriate value to be output from the bus.

    Abstract translation: 转换编码的动态总线包括总线输入端的编码器电路和总线输出端的解码器电路。 编码器电路产生指示在总线的输入处的转变而不是输入端的实际值的信号。 解码器电路解码转换编码信息以跟踪从总线输出的适当值。

    Data converter and a delay threshold comparator
    25.
    发明申请
    Data converter and a delay threshold comparator 失效
    数据转换器和延迟阈值比较器

    公开(公告)号：US20060221724A1

    公开(公告)日：2006-10-05

    申请号：US11094811

    申请日：2005-03-31

    Applicant: Atul Maheshwari ,  Sanu Mathew ,  Mark Anders ,  Ram Krishnamurthy

    Inventor： Atul Maheshwari ,  Sanu Mathew ,  Mark Anders ,  Ram Krishnamurthy

    IPC: G11C7/06

    CPC classification number: G06F9/3869 ,  G06F7/74

    Abstract: For one disclosed embodiment, a converter converts 2N-bit data into an N-bit value indicating a number of bits in the data that have a predetermined logical value. The converter includes N comparators, each determining whether the number of bits in the data having the predetermined logical value exceeds a respective one of a plurality of reference values. The N-bit value is generated based on the outputs of the comparators. For another disclosed embodiment, a first delay element delays a signal based on a number of bits in a data value having a predetermined logical value, and a second delay element delays the signal based on a number of bits in a reference value having the predetermined logical value. A comparator then generates a bit value based on the delayed signals.

    Abstract translation: 对于一个所公开的实施例，转换器将2个N位数据转换为指示具有预定逻辑值的数据中的位数的N位值。 转换器包括N个比较器，每个比较器确定具有预定逻辑值的数据中的位数是否超过多个参考值中的相应一个。 基于比较器的输出产生N位值。 对于另一个公开的实施例，第一延迟元件基于具有预定逻辑值的数据值中的位数来延迟信号，并且第二延迟元件基于具有预定逻辑的参考值中的位数来延迟该信号 值。 比较器然后基于延迟信号产生位值。

    Apparatus and method for an address generation circuit
    27.
    发明申请
    Apparatus and method for an address generation circuit 有权
    地址生成电路的装置和方法

    公开(公告)号：US20060069901A1

    公开(公告)日：2006-03-30

    申请号：US10956164

    申请日：2004-09-30

    Applicant: Sanu Mathew ,  Mark Anders ,  Sarvesh Kulkarni ,  Ram Krishnamurthy

    Inventor： Sanu Mathew ,  Mark Anders ,  Sarvesh Kulkarni ,  Ram Krishnamurthy

    IPC: G06F12/04

    CPC classification number: G06F7/507 ,  G06F7/508

    Abstract: A method and apparatus for an address generation circuit. In one embodiment, the method includes computing a carry-in for at least one group of a predetermined number of bits of a propagate and a generate signal formed from a plurality of logical address components. Once the carry-in is computed, a plurality of conditional sums are generated for a logic 0 carry-in and a logic 1 carry-in. Subsequently, a sum is selected from the plurality of conditional sums to form a first portion of an effective address from the logical address components in a first stage and a second portion of the effective address in a second stage. In one embodiment, a fully dynamic high-performance sparse tree adder circuit that generates one in four carries, is used to form an address generation circuit, in accordance with one embodiment. Other embodiments are described and claimed.

    Abstract translation: 一种用于地址产生电路的方法和装置。 在一个实施例中，该方法包括计算由多个逻辑地址分量形成的传播信号和生成信号的预定位数的至少一组的进位。 一旦计算了进位，则为逻辑0进位和逻辑1进位产生多个条件和。 随后，从多个条件和中选出一个和，以在第二阶段中从第一阶段的逻辑地址分量和有效地址的第二部分形成有效地址的第一部分。 在一个实施例中，根据一个实施例，使用产生四分之一载波的完全动态的高性能稀疏树加法器电路来形成地址生成电路。 描述和要求保护其他实施例。

    Controlling the structure of animated documents
    29.
    发明授权
    Controlling the structure of animated documents 有权

    公开(公告)号：US09773336B2

    公开(公告)日：2017-09-26

    申请号：US13153114

    申请日：2011-06-03

    Applicant: Mark Anders ,  Joshua Hatwich ,  James W. Doubek ,  Joaquin Cruz Blas, Jr.

    Inventor： Mark Anders ,  Joshua Hatwich ,  James W. Doubek ,  Joaquin Cruz Blas, Jr.

    IPC: G06F17/00 ,  G06T13/00 ,  G06F17/21

    CPC classification number: G06T13/00 ,  G06F17/214

    Abstract: Methods and systems for controlling the structure of animated documents are disclosed. In some embodiments, a method includes displaying, via a graphical user interface, a representation of a document, where the document includes a programmatic component configured to create an animation by manipulating a structure of the document, a static structure of the document corresponds to the structure of the document when the animation is not performed, and the animation, upon execution, is rendered starting from an original base state that at least partially defines the static structure. The method also includes, in response to receiving a selection corresponding to a state of the animation, designating the selected state as a new base state, wherein the new base state is different from the original base state. The method further includes altering the static structure of the document to correspond to the new base state.

    Localized exploded view
    30.
    发明授权
    Localized exploded view 有权
    本地化分解图

    公开(公告)号：US08739063B2

    公开(公告)日：2014-05-27

    申请号：US13098838

    申请日：2011-05-02

    Applicant: Dexter Reid ,  Narciso B. Jaramillo ,  Mark Anders

    Inventor： Dexter Reid ,  Narciso B. Jaramillo ,  Mark Anders

    IPC: G06F3/048 ,  G06F3/00 ,  G09G5/00

    CPC classification number: G06F8/38 ,  G06F8/34 ,  G06F17/50

    Abstract: A method for providing an Integrated Development Environment comprises receiving input from a user identifying an area containing an edge shared by two or more objects, wherein said shared edge includes two or more individual edges corresponding to said objects, and visibly separating said two or more individual edges in a localized exploded view responsive to said receiving.

    Abstract translation: 一种用于提供集成开发环境的方法，包括从用户接收识别包含由两个或多个对象共享的边缘的区域的输入，其中所述共享边缘包括对应于所述对象的两个或多个单独边缘，并且可视地分离所述两个或更多个体 响应于所述接收的局部分解图中的边缘。

Patent Agency Ranking